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Refs #378. Reconfigured CAN acceptance filter to receive just one CAN message in the STM32F1 and STM32F4 ports. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@513 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2018-06-05 20:47:43 +00:00
parent 8116572e29
commit 433aab64c5
2 changed files with 80 additions and 13 deletions
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35
Target/Source/ARMCM3_STM32F1/can.c
View File

@ -123,6 +123,14 @@ typedef struct
#define CAN_BIT_TXRQ ((blt_int32u)0x00000001) #define CAN_BIT_TXRQ ((blt_int32u)0x00000001)
/** \brief Release FIFO 0 mailbox bit. */ /** \brief Release FIFO 0 mailbox bit. */
#define CAN_BIT_RFOM0 ((blt_int32u)0x00000020) #define CAN_BIT_RFOM0 ((blt_int32u)0x00000020)
/** \brief Standard 11-bit identifier bit mask. */
#define CAN_BIT_STDID_MASK (0x7FFu << CAN_BIT_STDID_POS)
/** \brief Standard 11-bit identifier bits position. */
#define CAN_BIT_STDID_POS (21u)
/** \brief Extended 29-bit identifier bit mask. */
#define CAN_BIT_EXTID_MASK (0x1FFFFFFFu << CAN_BIT_EXTID_POS)
/** \brief Extended 29-bit identifier bits position. */
#define CAN_BIT_EXTID_POS (3u)
/**************************************************************************************** /****************************************************************************************
@ -229,6 +237,8 @@ void CanInit(void)
blt_int8u tseg1, tseg2; blt_int8u tseg1, tseg2;
blt_bool result; blt_bool result;
blt_int32u timeout; blt_int32u timeout;
blt_int32u rxMsgId = BOOT_COM_CAN_RX_MSG_ID;
blt_int32u rxFilterId, rxFilterMask;
/* the current implementation supports CAN1. throw an assertion error in case a /* the current implementation supports CAN1. throw an assertion error in case a
* different CAN channel is configured. * different CAN channel is configured.
@ -290,15 +300,34 @@ void CanInit(void)
break; break;
} }
} }
/* determine the reception filter mask and id values such that it only leaves one
* CAN identifier through (BOOT_COM_CAN_RX_MSG_ID).
*/
if ((rxMsgId & 0x80000000) == 0)
{
rxFilterId = rxMsgId << CAN_BIT_STDID_POS;
rxFilterMask = (CAN_BIT_STDID_MASK) | CAN_BIT_IDE;
}
else
{
/* negate the ID-type bit */
rxMsgId &= ~0x80000000;
rxFilterId = (rxMsgId << CAN_BIT_EXTID_POS) | CAN_BIT_IDE;
rxFilterMask = (CAN_BIT_EXTID_MASK) | CAN_BIT_IDE;
}
/* enter initialisation mode for the acceptance filter */ /* enter initialisation mode for the acceptance filter */
CANx->FMR |= CAN_BIT_FINIT; CANx->FMR |= CAN_BIT_FINIT;
/* deactivate filter 0 */ /* deactivate filter 0 */
CANx->FA1R &= ~CAN_BIT_FILTER0; CANx->FA1R &= ~CAN_BIT_FILTER0;
/* 32-bit scale for the filter */ /* 32-bit scale for the filter */
CANx->FS1R |= CAN_BIT_FILTER0; CANx->FS1R |= CAN_BIT_FILTER0;
/* open up the acceptance filter to receive all messages */ /* Configure identifier mask mode for the filter */
CANx->sFilterRegister[0].FR1 = 0; CANx->FM1R &= ~CAN_BIT_FILTER0;
CANx->sFilterRegister[0].FR2 = 0; /* configure the acceptance filter to receive just one message */
CANx->sFilterRegister[0].FR1 = rxFilterId;
CANx->sFilterRegister[0].FR2 = rxFilterMask;
/* select id/mask mode for the filter */ /* select id/mask mode for the filter */
CANx->FM1R &= ~CAN_BIT_FILTER0; CANx->FM1R &= ~CAN_BIT_FILTER0;
/* FIFO 0 assignation for the filter */ /* FIFO 0 assignation for the filter */

58
Target/Source/ARMCM4_STM32F4/can.c
View File

@ -125,6 +125,18 @@ typedef struct
#define CAN_BIT_TXRQ ((blt_int32u)0x00000001) #define CAN_BIT_TXRQ ((blt_int32u)0x00000001)
/** \brief Release FIFO 0 mailbox bit. */ /** \brief Release FIFO 0 mailbox bit. */
#define CAN_BIT_RFOM0 ((blt_int32u)0x00000020) #define CAN_BIT_RFOM0 ((blt_int32u)0x00000020)
/** \brief CAN2 start bank bit mask. */
#define CAN_BIT_CAN2SB_MASK (0x3Fu << CAN_BIT_CAN2SB_POS)
/** \brief CAN2 start bank position. */
#define CAN_BIT_CAN2SB_POS (8u)
/** \brief Standard 11-bit identifier bit mask. */
#define CAN_BIT_STDID_MASK (0x7FFu << CAN_BIT_STDID_POS)
/** \brief Standard 11-bit identifier bits position. */
#define CAN_BIT_STDID_POS (21u)
/** \brief Extended 29-bit identifier bit mask. */
#define CAN_BIT_EXTID_MASK (0x1FFFFFFFu << CAN_BIT_EXTID_POS)
/** \brief Extended 29-bit identifier bits position. */
#define CAN_BIT_EXTID_POS (3u)
/**************************************************************************************** /****************************************************************************************
@ -238,6 +250,8 @@ void CanInit(void)
blt_int8u tseg1, tseg2; blt_int8u tseg1, tseg2;
blt_bool result; blt_bool result;
blt_int32u timeout; blt_int32u timeout;
blt_int32u rxMsgId = BOOT_COM_CAN_RX_MSG_ID;
blt_int32u rxFilterId, rxFilterMask;
/* the current implementation supports CAN1 and 2. throw an assertion error in case a /* the current implementation supports CAN1 and 2. throw an assertion error in case a
* different CAN channel is configured. * different CAN channel is configured.
@ -301,24 +315,46 @@ void CanInit(void)
} }
} }
#if (BOOT_COM_CAN_CHANNEL_INDEX == 0) /* determine the reception filter mask and id values such that it only leaves one
* CAN identifier through (BOOT_COM_CAN_RX_MSG_ID).
*/
if ((rxMsgId & 0x80000000) == 0)
{
rxFilterId = rxMsgId << CAN_BIT_STDID_POS;
rxFilterMask = (CAN_BIT_STDID_MASK) | CAN_BIT_IDE;
}
else
{
/* negate the ID-type bit */
rxMsgId &= ~0x80000000;
rxFilterId = (rxMsgId << CAN_BIT_EXTID_POS) | CAN_BIT_IDE;
rxFilterMask = (CAN_BIT_EXTID_MASK) | CAN_BIT_IDE;
}
/* enter initialisation mode for the acceptance filter */ /* enter initialisation mode for the acceptance filter */
CAN1->FMR |= CAN_BIT_FINIT; CAN1->FMR |= CAN_BIT_FINIT;
/* set that CAN2 start bank to 14. This means that filters 0..13 are available
* for CAN1 and 14..27 for CAN2. it is also the default value after reset. first
* reset the active configuration.
*/
CAN1->FMR &= ~CAN_BIT_CAN2SB_MASK;
CAN1->FMR |= ((blt_int32u)(14 << CAN_BIT_CAN2SB_POS));
#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
/* deactivate filter 0 */ /* deactivate filter 0 */
CAN1->FA1R &= ~CAN_BIT_FILTER0; CAN1->FA1R &= ~CAN_BIT_FILTER0;
/* 32-bit scale for the filter */ /* 32-bit scale for the filter */
CAN1->FS1R |= CAN_BIT_FILTER0; CAN1->FS1R |= CAN_BIT_FILTER0;
/* open up the acceptance filter to receive all messages */ /* Configure identifier mask mode for the filter */
CAN1->sFilterRegister[0].FR1 = 0; CAN1->FM1R &= ~CAN_BIT_FILTER0;
CAN1->sFilterRegister[0].FR2 = 0; /* configure the acceptance filter to receive just one message */
CAN1->sFilterRegister[0].FR1 = rxFilterId;
CAN1->sFilterRegister[0].FR2 = rxFilterMask;
/* select id/mask mode for the filter */ /* select id/mask mode for the filter */
CAN1->FM1R &= ~CAN_BIT_FILTER0; CAN1->FM1R &= ~CAN_BIT_FILTER0;
/* FIFO 0 assignation for the filter */ /* FIFO 0 assignation for the filter */
CAN1->FFA1R &= ~CAN_BIT_FILTER0; CAN1->FFA1R &= ~CAN_BIT_FILTER0;
/* filter activation */ /* filter activation */
CAN1->FA1R |= CAN_BIT_FILTER0; CAN1->FA1R |= CAN_BIT_FILTER0;
/* leave initialisation mode for the acceptance filter */
CAN1->FMR &= ~CAN_BIT_FINIT;
#else #else
/* enter initialisation mode for the acceptance filter */ /* enter initialisation mode for the acceptance filter */
CAN1->FMR |= CAN_BIT_FINIT; CAN1->FMR |= CAN_BIT_FINIT;
@ -326,18 +362,20 @@ void CanInit(void)
CAN1->FA1R &= ~CAN_BIT_FILTER14; CAN1->FA1R &= ~CAN_BIT_FILTER14;
/* 32-bit scale for the filter */ /* 32-bit scale for the filter */
CAN1->FS1R |= CAN_BIT_FILTER14; CAN1->FS1R |= CAN_BIT_FILTER14;
/* open up the acceptance filter to receive all messages */ /* Configure identifier mask mode for the filter */
CAN1->sFilterRegister[14].FR1 = 0; CAN1->FM1R &= ~CAN_BIT_FILTER14;
CAN1->sFilterRegister[14].FR2 = 0; /* configure the acceptance filter to receive just one message */
CAN1->sFilterRegister[14].FR1 = rxFilterId;
CAN1->sFilterRegister[14].FR2 = rxFilterMask;
/* select id/mask mode for the filter */ /* select id/mask mode for the filter */
CAN1->FM1R &= ~CAN_BIT_FILTER14; CAN1->FM1R &= ~CAN_BIT_FILTER14;
/* FIFO 0 assignation for the filter */ /* FIFO 0 assignation for the filter */
CAN1->FFA1R &= ~CAN_BIT_FILTER14; CAN1->FFA1R &= ~CAN_BIT_FILTER14;
/* filter activation */ /* filter activation */
CAN1->FA1R |= CAN_BIT_FILTER14; CAN1->FA1R |= CAN_BIT_FILTER14;
#endif
/* leave initialisation mode for the acceptance filter */ /* leave initialisation mode for the acceptance filter */
CAN1->FMR &= ~CAN_BIT_FINIT; CAN1->FMR &= ~CAN_BIT_FINIT;
#endif
} /*** end of CanInit ***/ } /*** end of CanInit ***/