diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs index 5686e7c8..c3cead79 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs differ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs.phy b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs.phy index 17dc1be3..79ec193b 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs.phy +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.abs.phy @@ -1,142 +1,150 @@ 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100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.map +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/bin/openblt_evbplus_dragon12p.map @@ -24,10 +24,10 @@ cpu.c.o Model: SMALL, Lang: ANSI-C flash.c.o Model: SMALL, Lang: ANSI-C nvm.c.o Model: SMALL, Lang: ANSI-C timer.c.o Model: SMALL, Lang: ANSI-C -uart.c.o Model: SMALL, Lang: ANSI-C start12.c.o Model: SMALL, Lang: ANSI-C vectors.c.o Model: SMALL, Lang: ANSI-C assert.c.o Model: SMALL, Lang: ANSI-C +can.c.o Model: SMALL, Lang: ANSI-C ********************************************************************************************* STARTUP SECTION @@ -36,8 +36,8 @@ Entry point: 0xE829 (_Startup) _startupData is allocated at 0xE831 and uses 6 Bytes extern struct _tagStartup { unsigned nofZeroOut 1 - _Range pZeroOut 0x3900 1276 - _Copy *toCopyDownBeg 0xF8C3 + _Range pZeroOut 0x3900 1097 + _Copy *toCopyDownBeg 0xF9D2 } _startupData; ********************************************************************************************* @@ -46,10 +46,10 @@ Section Name Size Type From To Segment --------------------------------------------------------------------------------------------- .init 49 R 0xE800 0xE830 ROM_C000 .startData 10 R 0xE831 0xE83A ROM_C000 -.rodata 190 R 0xE83B 0xE8F8 ROM_C000 -.rodata1 190 R 0xE8F9 0xE9B6 ROM_C000 -.text 3564 R 0xE9B7 0xF7A2 ROM_C000 -.copy 2 R 0xF8C3 0xF8C4 ROM_C000 +.rodata 226 R 0xE83B 0xE91C ROM_C000 +.rodata1 189 R 0xE91D 0xE9D9 ROM_C000 +.text 3800 R 0xE9DA 0xF8B1 ROM_C000 +.copy 2 R 0xF9D2 0xF9D3 ROM_C000 ENTRY 12 R 0xFEF0 0xFEFB ENTRY_SEG .stack 256 R/W 0x3800 0x38FF RAM .abs_section_8 1 N/I 0x8 0x8 .absSeg0 @@ -394,12 +394,12 @@ ENTRY 12 R 0xFEF0 0xFEFB ENTRY_SEG .abs_section_2ae 2 N/I 0x2AE 0x2AF .absSeg339 .abs_section_2be 2 N/I 0x2BE 0x2BF .absSeg340 .abs_section_ff80 128 R 0xFF80 0xFFFF .absSeg341 -.bss 1276 R/W 0x3900 0x3DFB RAM -RUNTIME 288 R 0xF7A3 0xF8C2 ROM_C000 +.bss 1097 R/W 0x3900 0x3D48 RAM +RUNTIME 288 R 0xF8B2 0xF9D1 ROM_C000 Summary of section sizes per section type: -READ_ONLY (R): 1151 (dec: 4433) -READ_WRITE (R/W): 5FC (dec: 1532) +READ_ONLY (R): 1260 (dec: 4704) +READ_WRITE (R/W): 549 (dec: 1353) NO_INIT (N/I): 190 (dec: 400) ********************************************************************************************* @@ -413,15 +413,15 @@ OBJECT-ALLOCATION SECTION --------------------------------------------------------------------------------------------- MODULE: -- rtshc12.c.o (ansisi.lib) -- - PROCEDURES: - _LSHL F7A3 11 17 3 RUNTIME - _LSHRU F7B4 11 17 5 RUNTIME - _LCMP F7C5 19 25 4 RUNTIME - _LINC F7DE 5 5 4 RUNTIME - _LDEC F7E3 8 8 6 RUNTIME - _lDivMod F7EB BE 190 1 RUNTIME - _LDIVU F8A9 E 14 1 RUNTIME - _ILSEXT F8B7 7 7 1 RUNTIME - _CASE_DIRECT_BYTE F8BE 5 5 3 RUNTIME + _LSHL F8B2 11 17 3 RUNTIME + _LSHRU F8C3 11 17 6 RUNTIME + _LCMP F8D4 19 25 4 RUNTIME + _LINC F8ED 5 5 4 RUNTIME + _LDEC F8F2 8 8 6 RUNTIME + _lDivMod F8FA BE 190 1 RUNTIME + _LDIVU F9B8 E 14 1 RUNTIME + _ILSEXT F9C6 7 7 1 RUNTIME + _CASE_DIRECT_BYTE F9CD 5 5 3 RUNTIME - VARIABLES: MODULE: -- mc9s12dg256.c.o -- - PROCEDURES: @@ -769,125 +769,113 @@ MODULE: -- mc9s12dg256.c.o -- _CAN4TXTSR 2BE 2 2 0 .abs_section_2be MODULE: -- main.c.o -- - PROCEDURES: - main E9B7 B 11 3 .text - Init E9C2 79 121 1 .text + main E9DA B 11 3 .text + Init E9E5 79 121 1 .text - VARIABLES: - STRING.C..Work.software.Ope.1 E8F9 55 85 1 .rodata1 + STRING.C..Work.software.Ope.1 E91D 55 85 1 .rodata1 MODULE: -- backdoor.c.o -- - PROCEDURES: - BackDoorInit EA3B 11 17 1 .text - BackDoorCheck EA4C 31 49 2 .text + BackDoorInit EA5E 11 17 1 .text + BackDoorCheck EA6F 31 49 2 .text - VARIABLES: backdoorOpen 3900 1 1 3 .bss backdoorOpenTime 3901 4 4 4 .bss MODULE: -- boot.c.o -- - PROCEDURES: - BootInit EA7D F 15 1 .text - BootTask EA8C C 12 1 .text + BootInit EAA0 F 15 1 .text + BootTask EAAF C 12 1 .text - VARIABLES: MODULE: -- com.c.o -- - PROCEDURES: - ComInit EA98 19 25 1 .text - ComTask EAB1 10 16 1 .text - ComFree EAC1 1 1 1 .text - ComTransmitPacket EAC2 F 15 1 .text - ComSetConnectEntryState EAD1 6 6 1 .text - ComIsConnected EAD7 4 4 1 .text + ComInit EABB 19 25 1 .text + ComTask EAD4 10 16 1 .text + ComFree EAE4 1 1 1 .text + ComTransmitPacket EAE5 F 15 1 .text + ComSetConnectEntryState EAF4 6 6 1 .text + ComIsConnected EAFA 4 4 1 .text - VARIABLES: comEntryStateConnect 3905 1 1 2 .bss - xcpCtoReqPacket.1 3906 40 64 2 .bss + xcpCtoReqPacket.1 3906 8 8 2 .bss MODULE: -- cop.c.o -- - PROCEDURES: - CopInit EADB 1 1 1 .text - CopService EADC 1 1 8 .text + CopInit EAFE 1 1 1 .text + CopService EAFF 1 1 8 .text - VARIABLES: MODULE: -- xcp.c.o -- - PROCEDURES: - XcpInit EADD 15 21 1 .text - XcpIsConnected EAF2 9 9 1 .text - XcpPacketTransmitted EAFB 4 4 1 .text - XcpPacketReceived EAFF E7 231 2 .text - XcpTransmitPacket EBE6 C 12 1 .text - XcpComputeChecksum EBF2 43 67 1 .text - XcpProtectResources EC35 4 4 2 .text - XcpSetCtoError EC39 10 16 9 .text - XcpCmdConnect EC49 2A 42 1 .text - XcpCmdDisconnect EC73 10 16 1 .text - XcpCmdGetStatus EC83 1A 26 1 .text - XcpCmdSynch EC9D 4 4 1 .text - XcpCmdGetId ECA1 22 34 1 .text - XcpCmdSetMta ECC3 1A 26 1 .text - XcpCmdUpload ECDD 4E 78 1 .text - XcpCmdShortUpload ED2B 55 85 1 .text - XcpCmdBuildCheckSum ED80 2C 44 1 .text - XcpCmdProgramStart EDAC 19 25 1 .text - XcpCmdProgramMax EDC5 43 67 1 .text - XcpCmdProgram EE08 5B 91 1 .text - XcpCmdProgramClear EE63 2A 42 1 .text - XcpCmdProgramReset EE8D E 14 1 .text - XcpCmdProgramPrepare EE9B 5 5 1 .text + XcpInit EB00 15 21 1 .text + XcpIsConnected EB15 9 9 1 .text + XcpPacketTransmitted EB1E 4 4 1 .text + XcpPacketReceived EB22 E7 231 2 .text + XcpTransmitPacket EC09 C 12 1 .text + XcpComputeChecksum EC15 43 67 1 .text + XcpProtectResources EC58 4 4 2 .text + XcpSetCtoError EC5C 10 16 9 .text + XcpCmdConnect EC6C 29 41 1 .text + XcpCmdDisconnect EC95 10 16 1 .text + XcpCmdGetStatus ECA5 1A 26 1 .text + XcpCmdSynch ECBF 4 4 1 .text + XcpCmdGetId ECC3 22 34 1 .text + XcpCmdSetMta ECE5 1A 26 1 .text + XcpCmdUpload ECFF 4E 78 1 .text + XcpCmdShortUpload ED4D 55 85 1 .text + XcpCmdBuildCheckSum EDA2 2C 44 1 .text + XcpCmdProgramStart EDCE 18 24 1 .text + XcpCmdProgramMax EDE6 43 67 1 .text + XcpCmdProgram EE29 5B 91 1 .text + XcpCmdProgramClear EE84 2A 42 1 .text + XcpCmdProgramReset EEAE E 14 1 .text + XcpCmdProgramPrepare EEBC 5 5 1 .text - VARIABLES: xcpStationId E83B 8 8 1 .rodata - xcpInfo 3946 4A 74 102 .bss + xcpInfo 390E 12 18 102 .bss MODULE: -- cpu.c.o -- - PROCEDURES: - CpuStartUserProgram EEA0 18 24 1 .text - CpuMemCopy EEB8 27 39 4 .text - CpuReset EEDF 3 3 1 .text + CpuStartUserProgram EEC1 18 24 1 .text + CpuMemCopy EED9 27 39 3 .text + CpuReset EF00 3 3 1 .text - VARIABLES: MODULE: -- flash.c.o -- - PROCEDURES: - FlashInit EEE2 74 116 1 .text - FlashWrite EF56 B6 182 2 .text - FlashErase F00C DD 221 1 .text - FlashWriteChecksum F0E9 67 103 1 .text - FlashVerifyChecksum F150 8A 138 1 .text - FlashDone F1DA 35 53 1 .text - FlashInitBlock F20F 51 81 2 .text - FlashSwitchBlock F260 4E 78 2 .text - FlashAddToBlock F2AE BD 189 1 .text - FlashWriteBlock F36B 78 120 3 .text - FlashGetLinearAddrByte F3E3 1D 29 5 .text - FlashGetPhysPage F400 C 12 3 .text - FlashGetPhysAddr F40C 6 6 3 .text - FlashExecuteCommand F412 1F 31 1 .text - FlashOperate F431 54 84 2 .text + FlashInit EF03 74 116 1 .text + FlashWrite EF77 B6 182 2 .text + FlashErase F02D DD 221 1 .text + FlashWriteChecksum F10A 67 103 1 .text + FlashVerifyChecksum F171 8A 138 1 .text + FlashDone F1FB 35 53 1 .text + FlashInitBlock F230 51 81 2 .text + FlashSwitchBlock F281 4E 78 2 .text + FlashAddToBlock F2CF BD 189 1 .text + FlashWriteBlock F38C 78 120 3 .text + FlashGetLinearAddrByte F404 1D 29 5 .text + FlashGetPhysPage F421 C 12 3 .text + FlashGetPhysAddr F42D 6 6 3 .text + FlashExecuteCommand F433 1F 31 1 .text + FlashOperate F452 54 84 2 .text - VARIABLES: flashLayout E843 A0 160 39 .rodata flashExecCmd E8E3 16 22 1 .rodata - STRING.C..Work.software.Ope.1 E94E 35 53 1 .rodata1 - blockInfo 3990 204 516 7 .bss - bootBlockInfo 3B94 204 516 11 .bss - flashExecCmdRam 3D98 16 22 2 .bss - flashMaxNrBlocks 3DAE 1 1 1 .bss + STRING.C..Work.software.Ope.1 E972 35 53 1 .rodata1 + blockInfo 3920 204 516 7 .bss + bootBlockInfo 3B24 204 516 11 .bss + flashExecCmdRam 3D28 16 22 2 .bss + flashMaxNrBlocks 3D3E 1 1 1 .bss MODULE: -- nvm.c.o -- - PROCEDURES: - NvmInit F485 3 3 1 .text - NvmWrite F488 16 22 2 .text - NvmErase F49E 12 18 1 .text - NvmVerifyChecksum F4B0 4 4 1 .text - NvmDone F4B4 B 11 1 .text + NvmInit F4A6 3 3 1 .text + NvmWrite F4A9 16 22 2 .text + NvmErase F4BF 12 18 1 .text + NvmVerifyChecksum F4D1 4 4 1 .text + NvmDone F4D5 B 11 1 .text - VARIABLES: MODULE: -- timer.c.o -- - PROCEDURES: - TimerInit F4BF 1D 29 1 .text - TimerReset F4DC 1C 28 2 .text - TimerUpdate F4F8 1F 31 2 .text - TimerGet F517 9 9 2 .text + TimerInit F4E0 1D 29 1 .text + TimerReset F4FD 1C 28 2 .text + TimerUpdate F519 1F 31 2 .text + TimerGet F538 9 9 2 .text - VARIABLES: - millisecond_counter 3DAF 4 4 8 .bss -MODULE: -- uart.c.o -- -- PROCEDURES: - UartInit F520 19 25 1 .text - UartTransmitPacket F539 5E 94 1 .text - UartReceivePacket F597 50 80 1 .text - UartReceiveByte F5E7 11 17 2 .text - UartTransmitByte F5F8 14 20 2 .text -- VARIABLES: - STRING.C..Work.software.Ope.1 E983 34 52 3 .rodata1 - xcpCtoRxInProgress.4 3DB3 1 1 3 .bss - xcpCtoReqPacket.2 3DB4 41 65 4 .bss - xcpCtoRxLength.3 3DF5 1 1 5 .bss + millisecond_counter 3D3F 4 4 8 .bss MODULE: -- start12.c.o -- - PROCEDURES: Init E800 29 41 1 .init @@ -898,79 +886,88 @@ MODULE: -- start12.c.o -- __SEG_END_SSTACK 3900 0 0 3 MODULE: -- vectors.c.o -- - PROCEDURES: - reset_handler F60C 9 9 2 .text - Vector0_handler F615 6 6 1 .text - Vector1_handler F61B 6 6 1 .text - Vector2_handler F621 6 6 1 .text - Vector3_handler F627 6 6 1 .text - Vector4_handler F62D 6 6 1 .text - Vector5_handler F633 6 6 1 .text - Vector6_handler F639 6 6 1 .text - Vector7_handler F63F 6 6 1 .text - Vector8_handler F645 6 6 1 .text - Vector9_handler F64B 6 6 1 .text - Vector10_handler F651 6 6 1 .text - Vector11_handler F657 6 6 1 .text - Vector12_handler F65D 6 6 1 .text - Vector13_handler F663 6 6 1 .text - Vector14_handler F669 6 6 1 .text - Vector15_handler F66F 6 6 1 .text - Vector16_handler F675 6 6 1 .text - Vector17_handler F67B 6 6 1 .text - Vector18_handler F681 6 6 1 .text - Vector19_handler F687 6 6 1 .text - Vector20_handler F68D 6 6 1 .text - Vector21_handler F693 6 6 1 .text - Vector22_handler F699 6 6 1 .text - Vector23_handler F69F 6 6 1 .text - Vector24_handler F6A5 6 6 1 .text - Vector25_handler F6AB 6 6 1 .text - Vector26_handler F6B1 6 6 1 .text - Vector27_handler F6B7 6 6 1 .text - Vector28_handler F6BD 6 6 1 .text - Vector29_handler F6C3 6 6 1 .text - Vector30_handler F6C9 6 6 1 .text - Vector31_handler F6CF 6 6 1 .text - Vector32_handler F6D5 6 6 1 .text - Vector33_handler F6DB 6 6 1 .text - Vector34_handler F6E1 6 6 1 .text - Vector35_handler F6E7 6 6 1 .text - Vector36_handler F6ED 6 6 1 .text - Vector37_handler F6F3 6 6 1 .text - Vector38_handler F6F9 6 6 1 .text - Vector39_handler F6FF 6 6 1 .text - Vector40_handler F705 6 6 1 .text - Vector41_handler F70B 6 6 1 .text - Vector42_handler F711 6 6 1 .text - Vector43_handler F717 6 6 1 .text - Vector44_handler F71D 6 6 1 .text - Vector45_handler F723 6 6 1 .text - Vector46_handler F729 6 6 1 .text - Vector47_handler F72F 6 6 1 .text - Vector48_handler F735 6 6 1 .text - Vector49_handler F73B 6 6 1 .text - Vector50_handler F741 6 6 1 .text - Vector51_handler F747 6 6 1 .text - Vector52_handler F74D 6 6 1 .text - Vector53_handler F753 6 6 1 .text - Vector54_handler F759 6 6 1 .text - Vector55_handler F75F 6 6 1 .text - Vector56_handler F765 6 6 1 .text - Vector57_handler F76B 6 6 1 .text - Vector58_handler F771 6 6 1 .text - Vector59_handler F777 6 6 1 .text - Vector60_handler F77D 6 6 1 .text - Vector61_handler F783 6 6 1 .text - Vector62_handler F789 6 6 1 .text + reset_handler F541 9 9 2 .text + Vector0_handler F54A 6 6 1 .text + Vector1_handler F550 6 6 1 .text + Vector2_handler F556 6 6 1 .text + Vector3_handler F55C 6 6 1 .text + Vector4_handler F562 6 6 1 .text + Vector5_handler F568 6 6 1 .text + Vector6_handler F56E 6 6 1 .text + Vector7_handler F574 6 6 1 .text + Vector8_handler F57A 6 6 1 .text + Vector9_handler F580 6 6 1 .text + Vector10_handler F586 6 6 1 .text + Vector11_handler F58C 6 6 1 .text + Vector12_handler F592 6 6 1 .text + Vector13_handler F598 6 6 1 .text + Vector14_handler F59E 6 6 1 .text + Vector15_handler F5A4 6 6 1 .text + Vector16_handler F5AA 6 6 1 .text + Vector17_handler F5B0 6 6 1 .text + Vector18_handler F5B6 6 6 1 .text + Vector19_handler F5BC 6 6 1 .text + Vector20_handler F5C2 6 6 1 .text + Vector21_handler F5C8 6 6 1 .text + Vector22_handler F5CE 6 6 1 .text + Vector23_handler F5D4 6 6 1 .text + Vector24_handler F5DA 6 6 1 .text + Vector25_handler F5E0 6 6 1 .text + Vector26_handler F5E6 6 6 1 .text + Vector27_handler F5EC 6 6 1 .text + Vector28_handler F5F2 6 6 1 .text + Vector29_handler F5F8 6 6 1 .text + Vector30_handler F5FE 6 6 1 .text + Vector31_handler F604 6 6 1 .text + Vector32_handler F60A 6 6 1 .text + Vector33_handler F610 6 6 1 .text + Vector34_handler F616 6 6 1 .text + Vector35_handler F61C 6 6 1 .text + Vector36_handler F622 6 6 1 .text + Vector37_handler F628 6 6 1 .text + Vector38_handler F62E 6 6 1 .text + Vector39_handler F634 6 6 1 .text + Vector40_handler F63A 6 6 1 .text + Vector41_handler F640 6 6 1 .text + Vector42_handler F646 6 6 1 .text + Vector43_handler F64C 6 6 1 .text + Vector44_handler F652 6 6 1 .text + Vector45_handler F658 6 6 1 .text + Vector46_handler F65E 6 6 1 .text + Vector47_handler F664 6 6 1 .text + Vector48_handler F66A 6 6 1 .text + Vector49_handler F670 6 6 1 .text + Vector50_handler F676 6 6 1 .text + Vector51_handler F67C 6 6 1 .text + Vector52_handler F682 6 6 1 .text + Vector53_handler F688 6 6 1 .text + Vector54_handler F68E 6 6 1 .text + Vector55_handler F694 6 6 1 .text + Vector56_handler F69A 6 6 1 .text + Vector57_handler F6A0 6 6 1 .text + Vector58_handler F6A6 6 6 1 .text + Vector59_handler F6AC 6 6 1 .text + Vector60_handler F6B2 6 6 1 .text + Vector61_handler F6B8 6 6 1 .text + Vector62_handler F6BE 6 6 1 .text reset_connected_handler FEF0 C 12 0 ENTRY - VARIABLES: _vectab FF80 80 128 0 .abs_section_ff80 MODULE: -- assert.c.o -- - PROCEDURES: - AssertFailure F78F 14 20 5 .text + AssertFailure F6C4 14 20 4 .text - VARIABLES: - assert_failure_file 3DF6 2 2 1 .bss - assert_failure_line 3DF8 4 4 2 .bss + assert_failure_file 3D43 2 2 1 .bss + assert_failure_line 3D45 4 4 2 .bss +MODULE: -- can.c.o -- +- PROCEDURES: + CanInit F6D8 9C 156 1 .text + CanTransmitPacket F774 51 81 1 .text + CanReceivePacket F7C5 84 132 1 .text + CanGetSpeedConfig F849 69 105 1 .text +- VARIABLES: + canTiming E8F9 24 36 4 .rodata + STRING.C..Work.software.Ope.1 E9A7 33 51 2 .rodata1 ********************************************************************************************* MODULE STATISTIC @@ -981,17 +978,17 @@ MODULE STATISTIC main.c.o 0 132 85 backdoor.c.o 5 66 0 boot.c.o 0 27 0 - com.c.o 65 67 0 + com.c.o 9 67 0 cop.c.o 0 2 0 - xcp.c.o 74 963 8 + xcp.c.o 18 961 8 cpu.c.o 0 66 0 flash.c.o 1055 1443 235 nvm.c.o 0 58 0 timer.c.o 4 97 0 - uart.c.o 67 236 52 start12.c.o 0 49 0 vectors.c.o 0 399 128 assert.c.o 6 20 0 + can.c.o 0 474 87 other 256 10 2 ********************************************************************************************* @@ -1010,8 +1007,7 @@ SECTION: ".text" FlashVerifyChecksum FlashDone FlashInitBlock FlashSwitchBlock FlashAddToBlock FlashWriteBlock FlashGetLinearAddrByte FlashGetPhysPage FlashGetPhysAddr FlashExecuteCommand FlashOperate NvmInit NvmWrite NvmErase NvmVerifyChecksum - NvmDone TimerInit TimerReset TimerUpdate TimerGet UartInit UartTransmitPacket - UartReceivePacket UartReceiveByte UartTransmitByte reset_handler + NvmDone TimerInit TimerReset TimerUpdate TimerGet reset_handler Vector0_handler Vector1_handler Vector2_handler Vector3_handler Vector4_handler Vector5_handler Vector6_handler Vector7_handler Vector8_handler Vector9_handler Vector10_handler Vector11_handler @@ -1027,16 +1023,16 @@ SECTION: ".text" Vector48_handler Vector49_handler Vector50_handler Vector51_handler Vector52_handler Vector53_handler Vector54_handler Vector55_handler Vector56_handler Vector57_handler Vector58_handler Vector59_handler - Vector60_handler Vector61_handler Vector62_handler AssertFailure + Vector60_handler Vector61_handler Vector62_handler AssertFailure CanInit + CanTransmitPacket CanReceivePacket CanGetSpeedConfig SECTION: ".bss" backdoorOpen backdoorOpenTime comEntryStateConnect xcpCtoReqPacket.1 xcpInfo blockInfo bootBlockInfo flashExecCmdRam flashMaxNrBlocks millisecond_counter - xcpCtoRxInProgress.4 xcpCtoReqPacket.2 xcpCtoRxLength.3 assert_failure_file - assert_failure_line + assert_failure_file assert_failure_line SECTION: ".init" Init _Startup SECTION: ".rodata" - xcpStationId flashLayout flashExecCmd + xcpStationId flashLayout flashExecCmd canTiming SECTION: ".rodata1" STRING.C..Work.software.Ope.1 STRING.C..Work.software.Ope.1 STRING.C..Work.software.Ope.1 @@ -2077,169 +2073,166 @@ OBJECT LIST SORTED BY ADDRESS backdoorOpen 3900 1 1 3 .bss backdoorOpenTime 3901 4 4 4 .bss comEntryStateConnect 3905 1 1 2 .bss - xcpCtoReqPacket.1 3906 40 64 2 .bss - xcpInfo 3946 4A 74 102 .bss - blockInfo 3990 204 516 7 .bss - bootBlockInfo 3B94 204 516 11 .bss - flashExecCmdRam 3D98 16 22 2 .bss - flashMaxNrBlocks 3DAE 1 1 1 .bss - millisecond_counter 3DAF 4 4 8 .bss - xcpCtoRxInProgress.4 3DB3 1 1 3 .bss - xcpCtoReqPacket.2 3DB4 41 65 4 .bss - xcpCtoRxLength.3 3DF5 1 1 5 .bss - assert_failure_file 3DF6 2 2 1 .bss - assert_failure_line 3DF8 4 4 2 .bss + xcpCtoReqPacket.1 3906 8 8 2 .bss + xcpInfo 390E 12 18 102 .bss + blockInfo 3920 204 516 7 .bss + bootBlockInfo 3B24 204 516 11 .bss + flashExecCmdRam 3D28 16 22 2 .bss + flashMaxNrBlocks 3D3E 1 1 1 .bss + millisecond_counter 3D3F 4 4 8 .bss + assert_failure_file 3D43 2 2 1 .bss + assert_failure_line 3D45 4 4 2 .bss Init E800 29 41 1 .init _Startup E829 8 8 2 .init xcpStationId E83B 8 8 1 .rodata flashLayout E843 A0 160 39 .rodata flashExecCmd E8E3 16 22 1 .rodata - STRING.C..Work.software.Ope.1 E8F9 55 85 1 .rodata1 - STRING.C..Work.software.Ope.1 E94E 35 53 1 .rodata1 - STRING.C..Work.software.Ope.1 E983 34 52 3 .rodata1 - main E9B7 B 11 3 .text - Init E9C2 79 121 1 .text - BackDoorInit EA3B 11 17 1 .text - BackDoorCheck EA4C 31 49 2 .text - BootInit EA7D F 15 1 .text - BootTask EA8C C 12 1 .text - ComInit EA98 19 25 1 .text - ComTask EAB1 10 16 1 .text - ComFree EAC1 1 1 1 .text - ComTransmitPacket EAC2 F 15 1 .text - ComSetConnectEntryState EAD1 6 6 1 .text - ComIsConnected EAD7 4 4 1 .text - CopInit EADB 1 1 1 .text - CopService EADC 1 1 8 .text - XcpInit EADD 15 21 1 .text - XcpIsConnected EAF2 9 9 1 .text - XcpPacketTransmitted EAFB 4 4 1 .text - XcpPacketReceived EAFF E7 231 2 .text - XcpTransmitPacket EBE6 C 12 1 .text - XcpComputeChecksum EBF2 43 67 1 .text - XcpProtectResources EC35 4 4 2 .text - XcpSetCtoError EC39 10 16 9 .text - XcpCmdConnect EC49 2A 42 1 .text - XcpCmdDisconnect EC73 10 16 1 .text - XcpCmdGetStatus EC83 1A 26 1 .text - XcpCmdSynch EC9D 4 4 1 .text - XcpCmdGetId ECA1 22 34 1 .text - XcpCmdSetMta ECC3 1A 26 1 .text - XcpCmdUpload ECDD 4E 78 1 .text - XcpCmdShortUpload ED2B 55 85 1 .text - XcpCmdBuildCheckSum ED80 2C 44 1 .text - XcpCmdProgramStart EDAC 19 25 1 .text - XcpCmdProgramMax EDC5 43 67 1 .text - XcpCmdProgram EE08 5B 91 1 .text - XcpCmdProgramClear EE63 2A 42 1 .text - XcpCmdProgramReset EE8D E 14 1 .text - XcpCmdProgramPrepare EE9B 5 5 1 .text - CpuStartUserProgram EEA0 18 24 1 .text - CpuMemCopy EEB8 27 39 4 .text - CpuReset EEDF 3 3 1 .text - FlashInit EEE2 74 116 1 .text - FlashWrite EF56 B6 182 2 .text - FlashErase F00C DD 221 1 .text - FlashWriteChecksum F0E9 67 103 1 .text - FlashVerifyChecksum F150 8A 138 1 .text - FlashDone F1DA 35 53 1 .text - FlashInitBlock F20F 51 81 2 .text - FlashSwitchBlock F260 4E 78 2 .text - FlashAddToBlock F2AE BD 189 1 .text - FlashWriteBlock F36B 78 120 3 .text - FlashGetLinearAddrByte F3E3 1D 29 5 .text - FlashGetPhysPage F400 C 12 3 .text - FlashGetPhysAddr F40C 6 6 3 .text - FlashExecuteCommand F412 1F 31 1 .text - FlashOperate F431 54 84 2 .text - NvmInit F485 3 3 1 .text - NvmWrite F488 16 22 2 .text - NvmErase F49E 12 18 1 .text - NvmVerifyChecksum F4B0 4 4 1 .text - NvmDone F4B4 B 11 1 .text - TimerInit F4BF 1D 29 1 .text - TimerReset F4DC 1C 28 2 .text - TimerUpdate F4F8 1F 31 2 .text - TimerGet F517 9 9 2 .text - UartInit F520 19 25 1 .text - UartTransmitPacket F539 5E 94 1 .text - UartReceivePacket F597 50 80 1 .text - UartReceiveByte F5E7 11 17 2 .text - UartTransmitByte F5F8 14 20 2 .text - reset_handler F60C 9 9 2 .text - Vector0_handler F615 6 6 1 .text - Vector1_handler F61B 6 6 1 .text - Vector2_handler F621 6 6 1 .text - Vector3_handler F627 6 6 1 .text - Vector4_handler F62D 6 6 1 .text - Vector5_handler F633 6 6 1 .text - Vector6_handler F639 6 6 1 .text - Vector7_handler F63F 6 6 1 .text - Vector8_handler F645 6 6 1 .text - Vector9_handler F64B 6 6 1 .text - Vector10_handler F651 6 6 1 .text - Vector11_handler F657 6 6 1 .text - Vector12_handler F65D 6 6 1 .text - Vector13_handler F663 6 6 1 .text - Vector14_handler F669 6 6 1 .text - Vector15_handler F66F 6 6 1 .text - Vector16_handler F675 6 6 1 .text - Vector17_handler F67B 6 6 1 .text - Vector18_handler F681 6 6 1 .text - Vector19_handler F687 6 6 1 .text - Vector20_handler F68D 6 6 1 .text - Vector21_handler F693 6 6 1 .text - Vector22_handler F699 6 6 1 .text - Vector23_handler F69F 6 6 1 .text - Vector24_handler F6A5 6 6 1 .text - Vector25_handler F6AB 6 6 1 .text - Vector26_handler F6B1 6 6 1 .text - Vector27_handler F6B7 6 6 1 .text - Vector28_handler F6BD 6 6 1 .text - Vector29_handler F6C3 6 6 1 .text - Vector30_handler F6C9 6 6 1 .text - Vector31_handler F6CF 6 6 1 .text - Vector32_handler F6D5 6 6 1 .text - Vector33_handler F6DB 6 6 1 .text - Vector34_handler F6E1 6 6 1 .text - Vector35_handler F6E7 6 6 1 .text - Vector36_handler F6ED 6 6 1 .text - Vector37_handler F6F3 6 6 1 .text - Vector38_handler F6F9 6 6 1 .text - Vector39_handler F6FF 6 6 1 .text - Vector40_handler F705 6 6 1 .text - Vector41_handler F70B 6 6 1 .text - Vector42_handler F711 6 6 1 .text - Vector43_handler F717 6 6 1 .text - Vector44_handler F71D 6 6 1 .text - Vector45_handler F723 6 6 1 .text - Vector46_handler F729 6 6 1 .text - Vector47_handler F72F 6 6 1 .text - Vector48_handler F735 6 6 1 .text - Vector49_handler F73B 6 6 1 .text - Vector50_handler F741 6 6 1 .text - Vector51_handler F747 6 6 1 .text - Vector52_handler F74D 6 6 1 .text - Vector53_handler F753 6 6 1 .text - Vector54_handler F759 6 6 1 .text - Vector55_handler F75F 6 6 1 .text - Vector56_handler F765 6 6 1 .text - Vector57_handler F76B 6 6 1 .text - Vector58_handler F771 6 6 1 .text - Vector59_handler F777 6 6 1 .text - Vector60_handler F77D 6 6 1 .text - Vector61_handler F783 6 6 1 .text - Vector62_handler F789 6 6 1 .text - AssertFailure F78F 14 20 5 .text - _LSHL F7A3 11 17 3 RUNTIME - _LSHRU F7B4 11 17 5 RUNTIME - _LCMP F7C5 19 25 4 RUNTIME - _LINC F7DE 5 5 4 RUNTIME - _LDEC F7E3 8 8 6 RUNTIME - _lDivMod F7EB BE 190 1 RUNTIME - _LDIVU F8A9 E 14 1 RUNTIME - _ILSEXT F8B7 7 7 1 RUNTIME - _CASE_DIRECT_BYTE F8BE 5 5 3 RUNTIME + canTiming E8F9 24 36 4 .rodata + STRING.C..Work.software.Ope.1 E91D 55 85 1 .rodata1 + STRING.C..Work.software.Ope.1 E972 35 53 1 .rodata1 + STRING.C..Work.software.Ope.1 E9A7 33 51 2 .rodata1 + main E9DA B 11 3 .text + Init E9E5 79 121 1 .text + BackDoorInit EA5E 11 17 1 .text + BackDoorCheck EA6F 31 49 2 .text + BootInit EAA0 F 15 1 .text + BootTask EAAF C 12 1 .text + ComInit EABB 19 25 1 .text + ComTask EAD4 10 16 1 .text + ComFree EAE4 1 1 1 .text + ComTransmitPacket EAE5 F 15 1 .text + ComSetConnectEntryState EAF4 6 6 1 .text + ComIsConnected EAFA 4 4 1 .text + CopInit EAFE 1 1 1 .text + CopService EAFF 1 1 8 .text + XcpInit EB00 15 21 1 .text + XcpIsConnected EB15 9 9 1 .text + XcpPacketTransmitted EB1E 4 4 1 .text + XcpPacketReceived EB22 E7 231 2 .text + XcpTransmitPacket EC09 C 12 1 .text + XcpComputeChecksum EC15 43 67 1 .text + XcpProtectResources EC58 4 4 2 .text + XcpSetCtoError EC5C 10 16 9 .text + XcpCmdConnect EC6C 29 41 1 .text + XcpCmdDisconnect EC95 10 16 1 .text + XcpCmdGetStatus ECA5 1A 26 1 .text + XcpCmdSynch ECBF 4 4 1 .text + XcpCmdGetId ECC3 22 34 1 .text + XcpCmdSetMta ECE5 1A 26 1 .text + XcpCmdUpload ECFF 4E 78 1 .text + XcpCmdShortUpload ED4D 55 85 1 .text + XcpCmdBuildCheckSum EDA2 2C 44 1 .text + XcpCmdProgramStart EDCE 18 24 1 .text + XcpCmdProgramMax EDE6 43 67 1 .text + XcpCmdProgram EE29 5B 91 1 .text + XcpCmdProgramClear EE84 2A 42 1 .text + XcpCmdProgramReset EEAE E 14 1 .text + XcpCmdProgramPrepare EEBC 5 5 1 .text + CpuStartUserProgram EEC1 18 24 1 .text + CpuMemCopy EED9 27 39 3 .text + CpuReset EF00 3 3 1 .text + FlashInit EF03 74 116 1 .text + FlashWrite EF77 B6 182 2 .text + FlashErase F02D DD 221 1 .text + FlashWriteChecksum F10A 67 103 1 .text + FlashVerifyChecksum F171 8A 138 1 .text + FlashDone F1FB 35 53 1 .text + FlashInitBlock F230 51 81 2 .text + FlashSwitchBlock F281 4E 78 2 .text + FlashAddToBlock F2CF BD 189 1 .text + FlashWriteBlock F38C 78 120 3 .text + FlashGetLinearAddrByte F404 1D 29 5 .text + FlashGetPhysPage F421 C 12 3 .text + FlashGetPhysAddr F42D 6 6 3 .text + FlashExecuteCommand F433 1F 31 1 .text + FlashOperate F452 54 84 2 .text + NvmInit F4A6 3 3 1 .text + NvmWrite F4A9 16 22 2 .text + NvmErase F4BF 12 18 1 .text + NvmVerifyChecksum F4D1 4 4 1 .text + NvmDone F4D5 B 11 1 .text + TimerInit F4E0 1D 29 1 .text + TimerReset F4FD 1C 28 2 .text + TimerUpdate F519 1F 31 2 .text + TimerGet F538 9 9 2 .text + reset_handler F541 9 9 2 .text + Vector0_handler F54A 6 6 1 .text + Vector1_handler F550 6 6 1 .text + Vector2_handler F556 6 6 1 .text + Vector3_handler F55C 6 6 1 .text + Vector4_handler F562 6 6 1 .text + Vector5_handler F568 6 6 1 .text + Vector6_handler F56E 6 6 1 .text + Vector7_handler F574 6 6 1 .text + Vector8_handler F57A 6 6 1 .text + Vector9_handler F580 6 6 1 .text + Vector10_handler F586 6 6 1 .text + Vector11_handler F58C 6 6 1 .text + Vector12_handler F592 6 6 1 .text + Vector13_handler F598 6 6 1 .text + Vector14_handler F59E 6 6 1 .text + Vector15_handler F5A4 6 6 1 .text + Vector16_handler F5AA 6 6 1 .text + Vector17_handler F5B0 6 6 1 .text + Vector18_handler F5B6 6 6 1 .text + Vector19_handler F5BC 6 6 1 .text + Vector20_handler F5C2 6 6 1 .text + Vector21_handler F5C8 6 6 1 .text + Vector22_handler F5CE 6 6 1 .text + Vector23_handler F5D4 6 6 1 .text + Vector24_handler F5DA 6 6 1 .text + Vector25_handler F5E0 6 6 1 .text + Vector26_handler F5E6 6 6 1 .text + Vector27_handler F5EC 6 6 1 .text + Vector28_handler F5F2 6 6 1 .text + Vector29_handler F5F8 6 6 1 .text + Vector30_handler F5FE 6 6 1 .text + Vector31_handler F604 6 6 1 .text + Vector32_handler F60A 6 6 1 .text + Vector33_handler F610 6 6 1 .text + Vector34_handler F616 6 6 1 .text + Vector35_handler F61C 6 6 1 .text + Vector36_handler F622 6 6 1 .text + Vector37_handler F628 6 6 1 .text + Vector38_handler F62E 6 6 1 .text + Vector39_handler F634 6 6 1 .text + Vector40_handler F63A 6 6 1 .text + Vector41_handler F640 6 6 1 .text + Vector42_handler F646 6 6 1 .text + Vector43_handler F64C 6 6 1 .text + Vector44_handler F652 6 6 1 .text + Vector45_handler F658 6 6 1 .text + Vector46_handler F65E 6 6 1 .text + Vector47_handler F664 6 6 1 .text + Vector48_handler F66A 6 6 1 .text + Vector49_handler F670 6 6 1 .text + Vector50_handler F676 6 6 1 .text + Vector51_handler F67C 6 6 1 .text + Vector52_handler F682 6 6 1 .text + Vector53_handler F688 6 6 1 .text + Vector54_handler F68E 6 6 1 .text + Vector55_handler F694 6 6 1 .text + Vector56_handler F69A 6 6 1 .text + Vector57_handler F6A0 6 6 1 .text + Vector58_handler F6A6 6 6 1 .text + Vector59_handler F6AC 6 6 1 .text + Vector60_handler F6B2 6 6 1 .text + Vector61_handler F6B8 6 6 1 .text + Vector62_handler F6BE 6 6 1 .text + AssertFailure F6C4 14 20 4 .text + CanInit F6D8 9C 156 1 .text + CanTransmitPacket F774 51 81 1 .text + CanReceivePacket F7C5 84 132 1 .text + CanGetSpeedConfig F849 69 105 1 .text + _LSHL F8B2 11 17 3 RUNTIME + _LSHRU F8C3 11 17 6 RUNTIME + _LCMP F8D4 19 25 4 RUNTIME + _LINC F8ED 5 5 4 RUNTIME + _LDEC F8F2 8 8 6 RUNTIME + _lDivMod F8FA BE 190 1 RUNTIME + _LDIVU F9B8 E 14 1 RUNTIME + _ILSEXT F9C6 7 7 1 RUNTIME + _CASE_DIRECT_BYTE F9CD 5 5 3 RUNTIME reset_connected_handler FEF0 C 12 0 ENTRY _vectab FF80 80 128 0 .abs_section_ff80 @@ -2262,7 +2255,7 @@ rtshc12.c.o (ansisi.lib): ********************************************************************************************* COPYDOWN SECTION --------------------------------------------------------------------------------------------- -------- ROM-ADDRESS: 0xF8C3 ---- SIZE 2 --- +------- ROM-ADDRESS: 0xF9D2 ---- SIZE 2 --- Filling bytes inserted 0000 @@ -2280,11 +2273,11 @@ BackDoorCheck USES ComIsConnected backdoorOpen TimerGet backdoorOpenTime _LCMP CpuStartUserProgram BootInit USES CopInit TimerInit NvmInit ComInit BackDoorInit BootTask USES CopService TimerUpdate ComTask BackDoorCheck -ComInit USES XcpInit UartInit comEntryStateConnect +ComInit USES XcpInit CanInit comEntryStateConnect XcpPacketReceived -ComTask USES xcpCtoReqPacket.1 UartReceivePacket +ComTask USES xcpCtoReqPacket.1 CanReceivePacket XcpPacketReceived -ComTransmitPacket USES UartTransmitPacket XcpPacketTransmitted +ComTransmitPacket USES CanTransmitPacket XcpPacketTransmitted ComSetConnectEntryState USES comEntryStateConnect ComIsConnected USES XcpIsConnected XcpInit USES xcpInfo @@ -2347,14 +2340,15 @@ NvmDone USES FlashWriteChecksum FlashDone TimerInit USES TimerReset millisecond_counter TimerUpdate USES millisecond_counter _LINC TimerGet USES TimerUpdate millisecond_counter -UartTransmitPacket USES STRING.C..Work.software.Ope.1 AssertFailure - UartTransmitByte CopService -UartReceivePacket USES xcpCtoRxInProgress.4 xcpCtoReqPacket.2 - UartReceiveByte xcpCtoRxLength.3 CpuMemCopy -UartTransmitByte USES CopService reset_handler USES __SEG_END_SSTACK _Startup main AssertFailure USES assert_failure_file assert_failure_line CopService +CanInit USES CanGetSpeedConfig STRING.C..Work.software.Ope.1 + AssertFailure +CanTransmitPacket USES STRING.C..Work.software.Ope.1 AssertFailure + CopService +CanReceivePacket USES _LSHRU +CanGetSpeedConfig USES canTiming CopService _LDIVU USES _lDivMod reset_connected_handler USES __SEG_END_SSTACK _Startup ComSetConnectEntryState main @@ -2418,8 +2412,14 @@ DEPENDENCY TREE | | | | | | | +- XcpInit | | | | - | | | +- UartInit - | | | | + | | | +- CanInit + | | | | | + | | | | +- CanGetSpeedConfig + | | | | | | + | | | | | +- CopService (see above) + | | | | | + | | | | +- AssertFailure (see above) + | | | | | | | +- XcpPacketReceived (recursive dependency) | | | | | | | +- XcpCmdConnect @@ -2588,14 +2588,10 @@ DEPENDENCY TREE | | | | | | | +- ComTransmitPacket | | | | - | | | +- UartTransmitPacket + | | | +- CanTransmitPacket | | | | | | | | | +- AssertFailure (see above) | | | | | - | | | | +- UartTransmitByte - | | | | | | - | | | | | +- CopService (see above) - | | | | | | | | | +- CopService (see above) | | | | | | | +- XcpPacketTransmitted @@ -2640,11 +2636,9 @@ DEPENDENCY TREE | | | +- ComTask | | | - | | +- UartReceivePacket + | | +- CanReceivePacket | | | | - | | | +- UartReceiveByte - | | | | - | | | +- CpuMemCopy (see above) + | | | +- _LSHRU (see above) | | | | | +- XcpPacketReceived (see above) (recursive dependency) | | @@ -2797,5 +2791,5 @@ STATISTIC SECTION ExeFile: -------- Number of blocks to be downloaded: 7 -Total size of all blocks to be downloaded: 4433 +Total size of all blocks to be downloaded: 4704 diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/blt_conf.h b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/blt_conf.h index faa32ccd..a820e7d0 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/blt_conf.h +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/blt_conf.h @@ -61,6 +61,33 @@ /**************************************************************************************** * C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N ****************************************************************************************/ +/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE + * configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed + * in bits/second. Two CAN messages are reserved for communication with the host. The + * message identifier for sending data from the target to the host is configured with + * BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with + * BOOT_COM_CAN_RXMSG_ID. The maximum amount of data bytes in a message for data + * transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and + * BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more + * than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the + * CAN controller channel. + * + */ +/** \brief Enable/disable CAN transport layer. */ +#define BOOT_COM_CAN_ENABLE (1) +/** \brief Configure the desired CAN baudrate. */ +#define BOOT_COM_CAN_BAUDRATE (500000) +/** \brief Configure CAN message ID target->host. */ +#define BOOT_COM_CAN_TX_MSG_ID (0x7E1) +/** \brief Configure number of bytes in the target->host CAN message. */ +#define BOOT_COM_CAN_TX_MAX_DATA (8) +/** \brief Configure CAN message ID host->target. */ +#define BOOT_COM_CAN_RX_MSG_ID (0x667) +/** \brief Configure number of bytes in the host->target CAN message. */ +#define BOOT_COM_CAN_RX_MAX_DATA (8) +/** \brief Select the desired CAN peripheral as a zero based index. */ +#define BOOT_COM_CAN_CHANNEL_INDEX (0) + /* The UART communication interface is selected by setting the BOOT_COM_UART_ENABLE * configurable to 1. Configurable BOOT_COM_UART_BAUDRATE selects the communication speed * in bits/second. The maximum amount of data bytes in a message for data transmission @@ -70,7 +97,7 @@ * */ /** \brief Enable/disable UART transport layer. */ -#define BOOT_COM_UART_ENABLE (1) +#define BOOT_COM_UART_ENABLE (0) /** \brief Configure the desired communication speed. */ #define BOOT_COM_UART_BAUDRATE (57600) /** \brief Configure number of bytes in the target->host data packet. */ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12.mcp b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12.mcp index 62ee82fa..e5243522 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12.mcp and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12.mcp differ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/CWSettingsWindows.stg b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/CWSettingsWindows.stg index bc0bc92b..6ab5086e 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/CWSettingsWindows.stg and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/CWSettingsWindows.stg differ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/Standard/TargetDataWindows.tdt b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/Standard/TargetDataWindows.tdt index 7e6a1c89..cc44f0b5 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/Standard/TargetDataWindows.tdt and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/ide/hcs12_Data/Standard/TargetDataWindows.tdt differ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/main.c b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/main.c index 41b3267c..8fdc36e6 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/main.c +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Boot/main.c @@ -52,11 +52,6 @@ static void Init(void); ****************************************************************************************/ void main(void) { - /* ##Vg TODO basic bootloader works, including the timed backdoor. next steps: - * - bootloader activation from user program - * - support for CAN - */ - /* initialize the microcontroller */ Init(); diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs index e4125047..7f6b1052 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs differ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs.sx b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs.sx index 45afe593..d8480501 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs.sx +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.abs.sx @@ -1,21 +1,30 @@ S0730000433A5C576F726B5C736F6674776172655C4F70656E424C545C5461726765745C44656D6F5C48435331325F457662706C75735F447261676F6E3132705F436F646557617272696F725C50726F675C62696E5C64656D6F70726F675F657662706C75735F647261676F6E3132702E616273F8 S2240FC000FEC033FDC031270E35ED31EC3169700434FB310326F2FEC035EC31270BED3118B8 -S2240FC0200A30700434F920F13DCF110007D206C1120001C037C1AC1100004C3B16C147CC4A -S2240FC040FEF06C8015F300003A3D7900CB7900CA7900C87900C9C61A873B5AC85BC94CCB6A -S2240FC060043A3DF611002612CC110116C0A7042135C6017B11007911423DF6114287C3004E -S2240FC0800187C3110116C0A704211B721142F61142F111012610791100F6110204A107F6F6 -S2240FC0A01103260207953D3B4FCC2009D6CFEE806B00C60121C7303D10EF3D1C026A021D5B -S2240FC0C00268024C03014D01013D1B9C16C16A6C826E80B31146B7C5F21145B21144CD018D -S2240FC0E0F435B746C7873BB754B76516C18E251FF61143260AC6017B11434C0101200679B0 -S2240FC10011434D0101EC827C1146EC807C11441B843D16C12016C04A16C0CA16C06320F806 -S2240FC12016C0BB16C12906C0B816C1474C4001C6015B4EDC44C35DC05C504C4C014C46806A -S2240FC140C787B74506C16379004C79004679004D79004079004779004879004979004A79D5 -S2240FC160004B3D7C114A7E11483DFC114AFE11483DC6015B4EDC50C35DC05C50FC114AFED0 -S2240FC180114816C1A77C114A7E11480B20FEAC84270E34B7C5E285A284B7C510FB30200262 -S2120FC1A0AE82311B84054004A401083D00004A -S2240FE77EAA55C18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CE5 -S2240FE79EC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18C77 -S2240FE7BEC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18CC18C57 -S2240FE7DEC18CC18CC18CC18CC18CC18CC18CC18CC171C18CC18CC18CC18CC18CC18CC18C52 +S2240FC0200A30700434F920F13DCF110007D206C2280001C037C2D31100000905020602065E +S2240FC0400307030803090309040A040B040C040C050D050E050F050F061006100710083B8F +S2240FC06016C25DCCFEF06C8015F300003A3D6CAC3B6984E6848759B745E6E2C03B87B74685 +S2240FC080E6E2C03C19EE02B764ED8A136C80CC1F40B756EE80181004642ECC1F40EE801819 +S2240FC0A010B7516B852721C140221D53EE886B00E6EAC03C53861012A6EAC03B4337AAB082 +S2240FC0C0EE826A00C60120096284E684C11225A3C71B863D1B96C6017B01401F014101FB61 +S2240FC0E0C6807B0141CC01F43B1A82341A85B75416C06E1B8404210AE6807B0142E6817B9B +S2240FC10001431D014B101D014B20C7876C886C8653436C84861F6C82790150C6087B015113 +S2240FC120790152790153C6FF7B0154C6F77B0155C6FF7B0156587B0157790158790159794F +S2240FC140015A79015B577B015CC6E77B015D79015E79015F1D0140011E014101FB1B8A3D98 +S2240FC1601B9C1F014401641E01610810FC016049494949496C82C7876C80202EFE0162FCF6 +S2240FC1800160C4078749B7C54656CD00003BFC0160C4E03BC60334EE8216C2A4EA85AA84AD +S2240FC1A06C88B754EA81AA806CA5EC828C06672616EC802612F6016404A10CF601652607EA +S2240FC1C01D0144FE16C05F1D0144FE1B843D10EF3D1C026A021D0268024C03014D01013D4F +S2240FC1E01B9C16C2806C826E80B31103B7C5F21102B21101CD01F435B746C7873BB754B7F5 +S2240FC2006516C2B5251FF61100260AC6017B11004C010120067911004D0101EC827C1103FF +S2240FC220EC807C11011B843D16C23616C0D416C1E016C16020F816C1D116C23F06C1CE16EC +S2240FC240C25D4C4001C6015B4EDC44C35DC05C504C4C014C4680C787B74506C27979004C07 +S2240FC26079004679004D79004079004779004879004979004A79004B3D7C11077E11053D00 +S2240FC280FC1107FE11053DC6015B4EDC50C35DC05C50FC1107FE110516C2CE7C11077E110C +S2240FC2A0050B20FE87D7B7C6270AB7C549B7C546560436F63DAC84270E34B7C5E285A28444 +S2190FC2C0B7C510FB302002AE82311B84054004A401083D000049 +S2240FE77EAA55C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A28C +S2240FE79EC2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A207 +S2240FE7BEC2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2E7 +S2240FE7DEC2A2C2A2C2A2C2A2C2A2C2A2C2A2C2A2C287C2A2C2A2C2A2C2A2C2A2C2A2C2A2E2 S2060FE7FEC0291C S9030000FC diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.map b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.map index 637abcab..e2eeb233 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.map +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/bin/demoprog_evbplus_dragon12p.map @@ -29,8 +29,8 @@ Entry point: 0xC029 (_Startup) _startupData is allocated at 0xC031 and uses 6 Bytes extern struct _tagStartup { unsigned nofZeroOut 1 - _Range pZeroOut 0x1100 76 - _Copy *toCopyDownBeg 0xC1AC + _Range pZeroOut 0x1100 9 + _Copy *toCopyDownBeg 0xC2D3 } _startupData; ********************************************************************************************* @@ -39,8 +39,9 @@ Section Name Size Type From To Segment --------------------------------------------------------------------------------------------- .init 49 R 0xC000 0xC030 ROM_C000 .startData 10 R 0xC031 0xC03A ROM_C000 -.text 339 R 0xC03B 0xC18D ROM_C000 -.copy 2 R 0xC1AC 0xC1AD ROM_C000 +.rodata 36 R 0xC03B 0xC05E ROM_C000 +.text 581 R 0xC05F 0xC2A3 ROM_C000 +.copy 2 R 0xC2D3 0xC2D4 ROM_C000 .stack 256 R/W 0x1000 0x10FF RAM .abs_section_8 1 N/I 0x8 0x8 .absSeg0 .abs_section_9 1 N/I 0x9 0x9 .absSeg1 @@ -384,12 +385,12 @@ Section Name Size Type From To Segment .abs_section_2ae 2 N/I 0x2AE 0x2AF .absSeg339 .abs_section_2be 2 N/I 0x2BE 0x2BF .absSeg340 .abs_section_e77e 130 R 0xE77E 0xE7FF .absSeg341 -.bss 76 R/W 0x1100 0x114B RAM -RUNTIME 30 R 0xC18E 0xC1AB ROM_C000 +.bss 9 R/W 0x1100 0x1108 RAM +RUNTIME 47 R 0xC2A4 0xC2D2 ROM_C000 Summary of section sizes per section type: -READ_ONLY (R): 230 (dec: 560) -READ_WRITE (R/W): 14C (dec: 332) +READ_ONLY (R): 357 (dec: 855) +READ_WRITE (R/W): 109 (dec: 265) NO_INIT (N/I): 190 (dec: 400) ********************************************************************************************* @@ -403,8 +404,9 @@ OBJECT-ALLOCATION SECTION --------------------------------------------------------------------------------------------- MODULE: -- rtshc12.c.o (ansisi.lib) -- - PROCEDURES: - _LCMP C18E 19 25 1 RUNTIME - _LINC C1A7 5 5 1 RUNTIME + _LSHRU C2A4 11 17 1 RUNTIME + _LCMP C2B5 19 25 1 RUNTIME + _LINC C2CE 5 5 1 RUNTIME - VARIABLES: MODULE: -- mc9s12dg256.c.o -- - PROCEDURES: @@ -484,12 +486,12 @@ MODULE: -- mc9s12dg256.c.o -- _PWMSCLA A8 1 1 0 .abs_section_a8 _PWMSCLB A9 1 1 0 .abs_section_a9 _PWMSDN C4 1 1 0 .abs_section_c4 - _SCI0CR1 CA 1 1 1 .abs_section_ca - _SCI0CR2 CB 1 1 2 .abs_section_cb - _SCI0SR1 CC 1 1 1 .abs_section_cc + _SCI0CR1 CA 1 1 0 .abs_section_ca + _SCI0CR2 CB 1 1 0 .abs_section_cb + _SCI0SR1 CC 1 1 0 .abs_section_cc _SCI0SR2 CD 1 1 0 .abs_section_cd _SCI0DRH CE 1 1 0 .abs_section_ce - _SCI0DRL CF 1 1 1 .abs_section_cf + _SCI0DRL CF 1 1 0 .abs_section_cf _SCI1CR1 D2 1 1 0 .abs_section_d2 _SCI1CR2 D3 1 1 0 .abs_section_d3 _SCI1SR1 D4 1 1 0 .abs_section_d4 @@ -532,42 +534,42 @@ MODULE: -- mc9s12dg256.c.o -- _ATD1STAT1 12B 1 1 0 .abs_section_12b _ATD1DIEN 12D 1 1 0 .abs_section_12d _PORTAD1 12F 1 1 0 .abs_section_12f - _CAN0CTL0 140 1 1 0 .abs_section_140 - _CAN0CTL1 141 1 1 0 .abs_section_141 - _CAN0BTR0 142 1 1 0 .abs_section_142 - _CAN0BTR1 143 1 1 0 .abs_section_143 - _CAN0RFLG 144 1 1 0 .abs_section_144 + _CAN0CTL0 140 1 1 2 .abs_section_140 + _CAN0CTL1 141 1 1 3 .abs_section_141 + _CAN0BTR0 142 1 1 1 .abs_section_142 + _CAN0BTR1 143 1 1 1 .abs_section_143 + _CAN0RFLG 144 1 1 3 .abs_section_144 _CAN0RIER 145 1 1 0 .abs_section_145 _CAN0TFLG 146 1 1 0 .abs_section_146 _CAN0TIER 147 1 1 0 .abs_section_147 _CAN0TARQ 148 1 1 0 .abs_section_148 _CAN0TAAK 149 1 1 0 .abs_section_149 _CAN0TBSEL 14A 1 1 0 .abs_section_14a - _CAN0IDAC 14B 1 1 0 .abs_section_14b + _CAN0IDAC 14B 1 1 2 .abs_section_14b _CAN0RXERR 14E 1 1 0 .abs_section_14e _CAN0TXERR 14F 1 1 0 .abs_section_14f - _CAN0IDAR0 150 1 1 0 .abs_section_150 - _CAN0IDAR1 151 1 1 0 .abs_section_151 - _CAN0IDAR2 152 1 1 0 .abs_section_152 - _CAN0IDAR3 153 1 1 0 .abs_section_153 - _CAN0IDMR0 154 1 1 0 .abs_section_154 - _CAN0IDMR1 155 1 1 0 .abs_section_155 - _CAN0IDMR2 156 1 1 0 .abs_section_156 - _CAN0IDMR3 157 1 1 0 .abs_section_157 - _CAN0IDAR4 158 1 1 0 .abs_section_158 - _CAN0IDAR5 159 1 1 0 .abs_section_159 - _CAN0IDAR6 15A 1 1 0 .abs_section_15a - _CAN0IDAR7 15B 1 1 0 .abs_section_15b - _CAN0IDMR4 15C 1 1 0 .abs_section_15c - _CAN0IDMR5 15D 1 1 0 .abs_section_15d - _CAN0IDMR6 15E 1 1 0 .abs_section_15e - _CAN0IDMR7 15F 1 1 0 .abs_section_15f - _CAN0RXIDR0 160 1 1 0 .abs_section_160 - _CAN0RXIDR1 161 1 1 0 .abs_section_161 + _CAN0IDAR0 150 1 1 1 .abs_section_150 + _CAN0IDAR1 151 1 1 1 .abs_section_151 + _CAN0IDAR2 152 1 1 1 .abs_section_152 + _CAN0IDAR3 153 1 1 1 .abs_section_153 + _CAN0IDMR0 154 1 1 1 .abs_section_154 + _CAN0IDMR1 155 1 1 1 .abs_section_155 + _CAN0IDMR2 156 1 1 1 .abs_section_156 + _CAN0IDMR3 157 1 1 1 .abs_section_157 + _CAN0IDAR4 158 1 1 1 .abs_section_158 + _CAN0IDAR5 159 1 1 1 .abs_section_159 + _CAN0IDAR6 15A 1 1 1 .abs_section_15a + _CAN0IDAR7 15B 1 1 1 .abs_section_15b + _CAN0IDMR4 15C 1 1 1 .abs_section_15c + _CAN0IDMR5 15D 1 1 1 .abs_section_15d + _CAN0IDMR6 15E 1 1 1 .abs_section_15e + _CAN0IDMR7 15F 1 1 1 .abs_section_15f + _CAN0RXIDR0 160 1 1 4 .abs_section_160 + _CAN0RXIDR1 161 1 1 1 .abs_section_161 _CAN0RXIDR2 162 1 1 0 .abs_section_162 _CAN0RXIDR3 163 1 1 0 .abs_section_163 - _CAN0RXDSR0 164 1 1 0 .abs_section_164 - _CAN0RXDSR1 165 1 1 0 .abs_section_165 + _CAN0RXDSR0 164 1 1 1 .abs_section_164 + _CAN0RXDSR1 165 1 1 1 .abs_section_165 _CAN0RXDSR2 166 1 1 0 .abs_section_166 _CAN0RXDSR3 167 1 1 0 .abs_section_167 _CAN0RXDSR4 168 1 1 0 .abs_section_168 @@ -734,7 +736,7 @@ MODULE: -- mc9s12dg256.c.o -- _PWMDTY23 BE 2 2 0 .abs_section_be _PWMDTY45 C0 2 2 0 .abs_section_c0 _PWMDTY67 C2 2 2 0 .abs_section_c2 - _SCI0BD C8 2 2 4 .abs_section_c8 + _SCI0BD C8 2 2 0 .abs_section_c8 _SCI1BD D0 2 2 0 .abs_section_d0 _ATD1CTL23 122 2 2 0 .abs_section_122 _ATD1CTL45 124 2 2 0 .abs_section_124 @@ -752,29 +754,27 @@ MODULE: -- mc9s12dg256.c.o -- _CAN4TXTSR 2BE 2 2 0 .abs_section_2be MODULE: -- boot.c.o -- - PROCEDURES: - BootActivate C03B F 15 1 .text - BootComInit C04A 19 25 1 .text - BootComCheckActivationRequest C063 44 68 1 .text - UartReceiveByte C0A7 11 17 2 .text + BootActivate C05F F 15 1 .text + CanGetSpeedConfig C06E 66 102 1 .text + BootComInit C0D4 8C 140 1 .text + BootComCheckActivationRequest C160 6E 110 1 .text - VARIABLES: - xcpCtoRxInProgress.3 1100 1 1 3 .bss - xcpCtoReqPacket.1 1101 41 65 5 .bss - xcpCtoRxLength.2 1142 1 1 4 .bss + canTiming C03B 24 36 4 .rodata MODULE: -- irq.c.o -- - PROCEDURES: - IrqInterruptEnable C0B8 3 3 1 .text + IrqInterruptEnable C1CE 3 3 1 .text - VARIABLES: MODULE: -- led.c.o -- - PROCEDURES: - LedInit C0BB F 15 1 .text - LedToggle C0CA 48 72 1 .text + LedInit C1D1 F 15 1 .text + LedToggle C1E0 48 72 1 .text - VARIABLES: - led_toggle_state.1 1143 1 1 3 .bss - timer_counter_last.2 1144 4 4 5 .bss + led_toggle_state.1 1100 1 1 3 .bss + timer_counter_last.2 1101 4 4 5 .bss MODULE: -- main.c.o -- - PROCEDURES: - main C112 E 14 1 .text - Init C120 9 9 1 .text + main C228 E 14 1 .text + Init C236 9 9 1 .text - VARIABLES: MODULE: -- start12.c.o -- - PROCEDURES: @@ -786,16 +786,16 @@ MODULE: -- start12.c.o -- __SEG_END_SSTACK 1100 0 0 1 MODULE: -- time.c.o -- - PROCEDURES: - TimeInit C129 1E 30 1 .text - TimeDeinit C147 1C 28 2 .text - TimeSet C163 7 7 1 .text - TimeGet C16A 7 7 1 .text - TimeISRHandler C171 1B 27 1 .text + TimeInit C23F 1E 30 1 .text + TimeDeinit C25D 1C 28 2 .text + TimeSet C279 7 7 1 .text + TimeGet C280 7 7 1 .text + TimeISRHandler C287 1B 27 1 .text - VARIABLES: - millisecond_counter 1148 4 4 8 .bss + millisecond_counter 1105 4 4 8 .bss MODULE: -- vectors.c.o -- - PROCEDURES: - UnusedISR C18C 2 2 62 .text + UnusedISR C2A2 2 2 62 .text - VARIABLES: _vectab E77E 82 130 0 .abs_section_e77e @@ -803,9 +803,9 @@ MODULE: -- vectors.c.o -- MODULE STATISTIC Name Data Code Const --------------------------------------------------------------------------------------------- - rtshc12.c.o (ansisi.lib) 0 30 0 + rtshc12.c.o (ansisi.lib) 0 47 0 mc9s12dg256.c.o 400 0 0 - boot.c.o 67 125 0 + boot.c.o 0 367 36 irq.c.o 0 3 0 led.c.o 5 87 0 main.c.o 0 23 0 @@ -818,16 +818,17 @@ MODULE STATISTIC SECTION USE IN OBJECT-ALLOCATION SECTION --------------------------------------------------------------------------------------------- SECTION: ".text" - BootActivate BootComInit BootComCheckActivationRequest UartReceiveByte + BootActivate CanGetSpeedConfig BootComInit BootComCheckActivationRequest IrqInterruptEnable LedInit LedToggle main Init TimeInit TimeDeinit TimeSet TimeGet TimeISRHandler UnusedISR SECTION: ".bss" - xcpCtoRxInProgress.3 xcpCtoReqPacket.1 xcpCtoRxLength.2 led_toggle_state.1 - timer_counter_last.2 millisecond_counter + led_toggle_state.1 timer_counter_last.2 millisecond_counter SECTION: ".init" Init _Startup +SECTION: ".rodata" + canTiming SECTION: "RUNTIME" - _LCMP _LINC + _LSHRU _LCMP _LINC SECTION: ".abs_section_8" _PORTE SECTION: ".abs_section_9" @@ -1635,13 +1636,13 @@ OBJECT LIST SORTED BY ADDRESS _PWMDTY45 C0 2 2 0 .abs_section_c0 _PWMDTY67 C2 2 2 0 .abs_section_c2 _PWMSDN C4 1 1 0 .abs_section_c4 - _SCI0BD C8 2 2 4 .abs_section_c8 - _SCI0CR1 CA 1 1 1 .abs_section_ca - _SCI0CR2 CB 1 1 2 .abs_section_cb - _SCI0SR1 CC 1 1 1 .abs_section_cc + _SCI0BD C8 2 2 0 .abs_section_c8 + _SCI0CR1 CA 1 1 0 .abs_section_ca + _SCI0CR2 CB 1 1 0 .abs_section_cb + _SCI0SR1 CC 1 1 0 .abs_section_cc _SCI0SR2 CD 1 1 0 .abs_section_cd _SCI0DRH CE 1 1 0 .abs_section_ce - _SCI0DRL CF 1 1 1 .abs_section_cf + _SCI0DRL CF 1 1 0 .abs_section_cf _SCI1BD D0 2 2 0 .abs_section_d0 _SCI1CR1 D2 1 1 0 .abs_section_d2 _SCI1CR2 D3 1 1 0 .abs_section_d3 @@ -1695,42 +1696,42 @@ OBJECT LIST SORTED BY ADDRESS _ATD1DR5 13A 2 2 0 .abs_section_13a _ATD1DR6 13C 2 2 0 .abs_section_13c _ATD1DR7 13E 2 2 0 .abs_section_13e - _CAN0CTL0 140 1 1 0 .abs_section_140 - _CAN0CTL1 141 1 1 0 .abs_section_141 - _CAN0BTR0 142 1 1 0 .abs_section_142 - _CAN0BTR1 143 1 1 0 .abs_section_143 - _CAN0RFLG 144 1 1 0 .abs_section_144 + _CAN0CTL0 140 1 1 2 .abs_section_140 + _CAN0CTL1 141 1 1 3 .abs_section_141 + _CAN0BTR0 142 1 1 1 .abs_section_142 + _CAN0BTR1 143 1 1 1 .abs_section_143 + _CAN0RFLG 144 1 1 3 .abs_section_144 _CAN0RIER 145 1 1 0 .abs_section_145 _CAN0TFLG 146 1 1 0 .abs_section_146 _CAN0TIER 147 1 1 0 .abs_section_147 _CAN0TARQ 148 1 1 0 .abs_section_148 _CAN0TAAK 149 1 1 0 .abs_section_149 _CAN0TBSEL 14A 1 1 0 .abs_section_14a - _CAN0IDAC 14B 1 1 0 .abs_section_14b + _CAN0IDAC 14B 1 1 2 .abs_section_14b _CAN0RXERR 14E 1 1 0 .abs_section_14e _CAN0TXERR 14F 1 1 0 .abs_section_14f - _CAN0IDAR0 150 1 1 0 .abs_section_150 - _CAN0IDAR1 151 1 1 0 .abs_section_151 - _CAN0IDAR2 152 1 1 0 .abs_section_152 - _CAN0IDAR3 153 1 1 0 .abs_section_153 - _CAN0IDMR0 154 1 1 0 .abs_section_154 - _CAN0IDMR1 155 1 1 0 .abs_section_155 - _CAN0IDMR2 156 1 1 0 .abs_section_156 - _CAN0IDMR3 157 1 1 0 .abs_section_157 - _CAN0IDAR4 158 1 1 0 .abs_section_158 - _CAN0IDAR5 159 1 1 0 .abs_section_159 - _CAN0IDAR6 15A 1 1 0 .abs_section_15a - _CAN0IDAR7 15B 1 1 0 .abs_section_15b - _CAN0IDMR4 15C 1 1 0 .abs_section_15c - _CAN0IDMR5 15D 1 1 0 .abs_section_15d - _CAN0IDMR6 15E 1 1 0 .abs_section_15e - _CAN0IDMR7 15F 1 1 0 .abs_section_15f - _CAN0RXIDR0 160 1 1 0 .abs_section_160 - _CAN0RXIDR1 161 1 1 0 .abs_section_161 + _CAN0IDAR0 150 1 1 1 .abs_section_150 + _CAN0IDAR1 151 1 1 1 .abs_section_151 + _CAN0IDAR2 152 1 1 1 .abs_section_152 + _CAN0IDAR3 153 1 1 1 .abs_section_153 + _CAN0IDMR0 154 1 1 1 .abs_section_154 + _CAN0IDMR1 155 1 1 1 .abs_section_155 + _CAN0IDMR2 156 1 1 1 .abs_section_156 + _CAN0IDMR3 157 1 1 1 .abs_section_157 + _CAN0IDAR4 158 1 1 1 .abs_section_158 + _CAN0IDAR5 159 1 1 1 .abs_section_159 + _CAN0IDAR6 15A 1 1 1 .abs_section_15a + _CAN0IDAR7 15B 1 1 1 .abs_section_15b + _CAN0IDMR4 15C 1 1 1 .abs_section_15c + _CAN0IDMR5 15D 1 1 1 .abs_section_15d + _CAN0IDMR6 15E 1 1 1 .abs_section_15e + _CAN0IDMR7 15F 1 1 1 .abs_section_15f + _CAN0RXIDR0 160 1 1 4 .abs_section_160 + _CAN0RXIDR1 161 1 1 1 .abs_section_161 _CAN0RXIDR2 162 1 1 0 .abs_section_162 _CAN0RXIDR3 163 1 1 0 .abs_section_163 - _CAN0RXDSR0 164 1 1 0 .abs_section_164 - _CAN0RXDSR1 165 1 1 0 .abs_section_165 + _CAN0RXDSR0 164 1 1 1 .abs_section_164 + _CAN0RXDSR1 165 1 1 1 .abs_section_165 _CAN0RXDSR2 166 1 1 0 .abs_section_166 _CAN0RXDSR3 167 1 1 0 .abs_section_167 _CAN0RXDSR4 168 1 1 0 .abs_section_168 @@ -1858,31 +1859,30 @@ OBJECT LIST SORTED BY ADDRESS _CAN4TXDLR 2BC 1 1 0 .abs_section_2bc _CAN4TXTBPR 2BD 1 1 0 .abs_section_2bd _CAN4TXTSR 2BE 2 2 0 .abs_section_2be - xcpCtoRxInProgress.3 1100 1 1 3 .bss - xcpCtoReqPacket.1 1101 41 65 5 .bss - xcpCtoRxLength.2 1142 1 1 4 .bss - led_toggle_state.1 1143 1 1 3 .bss - timer_counter_last.2 1144 4 4 5 .bss - millisecond_counter 1148 4 4 8 .bss + led_toggle_state.1 1100 1 1 3 .bss + timer_counter_last.2 1101 4 4 5 .bss + millisecond_counter 1105 4 4 8 .bss Init C000 29 41 1 .init _Startup C029 8 8 1 .init - BootActivate C03B F 15 1 .text - BootComInit C04A 19 25 1 .text - BootComCheckActivationRequest C063 44 68 1 .text - UartReceiveByte C0A7 11 17 2 .text - IrqInterruptEnable C0B8 3 3 1 .text - LedInit C0BB F 15 1 .text - LedToggle C0CA 48 72 1 .text - main C112 E 14 1 .text - Init C120 9 9 1 .text - TimeInit C129 1E 30 1 .text - TimeDeinit C147 1C 28 2 .text - TimeSet C163 7 7 1 .text - TimeGet C16A 7 7 1 .text - TimeISRHandler C171 1B 27 1 .text - UnusedISR C18C 2 2 62 .text - _LCMP C18E 19 25 1 RUNTIME - _LINC C1A7 5 5 1 RUNTIME + canTiming C03B 24 36 4 .rodata + BootActivate C05F F 15 1 .text + CanGetSpeedConfig C06E 66 102 1 .text + BootComInit C0D4 8C 140 1 .text + BootComCheckActivationRequest C160 6E 110 1 .text + IrqInterruptEnable C1CE 3 3 1 .text + LedInit C1D1 F 15 1 .text + LedToggle C1E0 48 72 1 .text + main C228 E 14 1 .text + Init C236 9 9 1 .text + TimeInit C23F 1E 30 1 .text + TimeDeinit C25D 1C 28 2 .text + TimeSet C279 7 7 1 .text + TimeGet C280 7 7 1 .text + TimeISRHandler C287 1B 27 1 .text + UnusedISR C2A2 2 2 62 .text + _LSHRU C2A4 11 17 1 RUNTIME + _LCMP C2B5 19 25 1 RUNTIME + _LINC C2CE 5 5 1 RUNTIME _vectab E77E 82 130 0 .abs_section_e77e ********************************************************************************************* @@ -1890,8 +1890,8 @@ UNUSED-OBJECTS SECTION --------------------------------------------------------------------------------------------- NOT USED PROCEDURES rtshc12.c.o (ansisi.lib): - _BSHL _BSHRS _BSHRU _BDIVMODU _BDIVMODS _ISHL _ISHRU _ISHRS _LSHL _LSHRU - _LSHRS _LADD _LSUB _LAND _LOR _LXOR _LCMP_P _LCMP_PP _LNEG _LCOM _LDEC _LMUL + _BSHL _BSHRS _BSHRU _BDIVMODU _BDIVMODS _ISHL _ISHRU _ISHRS _LSHL _LSHRS + _LADD _LSUB _LAND _LOR _LXOR _LCMP_P _LCMP_PP _LNEG _LCOM _LDEC _LMUL _LMULU16x32 _LMULS16x32 _lDivMod _LDIVU _NEG_P _LDIVS _LMODU _LMODS _ILSEXT _COPY _CASE_DIRECT _CASE_DIRECT_BYTE _CASE_CHECKED _CASE_CHECKED_BYTE _CASE_SEARCH _CASE_SEARCH_BYTE _CASE_SEARCH_8 _CASE_SEARCH_8_BYTE _FCALL @@ -1907,7 +1907,7 @@ irq.c.o: ********************************************************************************************* COPYDOWN SECTION --------------------------------------------------------------------------------------------- -------- ROM-ADDRESS: 0xC1AC ---- SIZE 2 --- +------- ROM-ADDRESS: 0xC2D3 ---- SIZE 2 --- Filling bytes inserted 0000 @@ -1917,10 +1917,14 @@ OBJECT-DEPENDENCIES SECTION Init USES _startupData _Startup USES __SEG_END_SSTACK Init main BootActivate USES TimeDeinit -BootComInit USES _SCI0CR2 _SCI0CR1 _SCI0BD -BootComCheckActivationRequest USES xcpCtoRxInProgress.3 xcpCtoReqPacket.1 - UartReceiveByte xcpCtoRxLength.2 BootActivate -UartReceiveByte USES _SCI0SR1 _SCI0DRL +CanGetSpeedConfig USES canTiming +BootComInit USES _CAN0CTL0 _CAN0CTL1 CanGetSpeedConfig _CAN0BTR0 + _CAN0BTR1 _CAN0IDAC _CAN0IDAR0 _CAN0IDAR1 _CAN0IDAR2 + _CAN0IDAR3 _CAN0IDMR0 _CAN0IDMR1 _CAN0IDMR2 _CAN0IDMR3 + _CAN0IDAR4 _CAN0IDAR5 _CAN0IDAR6 _CAN0IDAR7 _CAN0IDMR4 + _CAN0IDMR5 _CAN0IDMR6 _CAN0IDMR7 +BootComCheckActivationRequest USES _CAN0RFLG _CAN0RXIDR1 _CAN0RXIDR0 _LSHRU + _CAN0RXDSR0 _CAN0RXDSR1 BootActivate LedInit USES _DDRJ _PTJ _DDRAB _PORTAB LedToggle USES TimeGet timer_counter_last.2 _LCMP led_toggle_state.1 _PORTAB @@ -1956,7 +1960,9 @@ DEPENDENCY TREE | | +- IrqInterruptEnable | | | +- BootComInit - | | + | | | + | | +- CanGetSpeedConfig + | | | +- LedToggle | | | | | +- TimeGet @@ -1965,7 +1971,7 @@ DEPENDENCY TREE | | | +- BootComCheckActivationRequest | | - | +- UartReceiveByte + | +- _LSHRU | | | +- BootActivate | | @@ -1994,5 +2000,5 @@ STATISTIC SECTION ExeFile: -------- Number of blocks to be downloaded: 6 -Total size of all blocks to be downloaded: 560 +Total size of all blocks to be downloaded: 855 diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/boot.c b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/boot.c index 845f449e..aeaf440e 100644 --- a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/boot.c +++ b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/boot.c @@ -166,4 +166,225 @@ static unsigned char UartReceiveByte(unsigned char *data) #endif /* BOOT_COM_UART_ENABLE > 0 */ +#if (BOOT_COM_CAN_ENABLE > 0) +/**************************************************************************************** +* C O N T R O L L E R A R E A N E T W O R K I N T E R F A C E +****************************************************************************************/ + +/**************************************************************************************** +* Type definitions +****************************************************************************************/ +/** \brief Structure type with the layout of the CAN bus timing registers. */ +typedef struct +{ + unsigned char tseg1; /**< CAN time segment 1 */ + unsigned char tseg2; /**< CAN time segment 2 */ +} tCanBusTiming; + + +/**************************************************************************************** +* Macro definitions +****************************************************************************************/ +#define CONVERT_STD_ID_TO_REG0(id) ((unsigned char)(((unsigned short)id & 0x07f8) >> 3)) +#define CONVERT_STD_ID_TO_REG1(id) ((unsigned char)(id & 0x07) << 5) +#define CONVERT_STD_ID_TO_REG2(id) (0) +#define CONVERT_STD_ID_TO_REG3(id) (0) +#define CONVERT_EXT_ID_TO_REG0(id) ((unsigned char)(id >> 21)) +#define CONVERT_EXT_ID_TO_REG1(id) ((((unsigned char)(id >> 15)) & 0x07) | \ + (((unsigned char)(id >> 13)) & 0xe0) | CAN0RXIDR1_IDE_MASK) +#define CONVERT_EXT_ID_TO_REG2(id) ((unsigned char)(((unsigned short)id & 0x7f80) >> 7)) +#define CONVERT_EXT_ID_TO_REG3(id) ((unsigned char)(id & 0x7f) << 1) + + +/**************************************************************************************** +* Local constant declarations +****************************************************************************************/ +/** +* \brief Array with possible time quanta configurations. +* \details According to the CAN protocol 1 bit-time can be made up of between 8..25 +* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC +* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) +* * 100%. This array contains possible and valid time quanta configurations +* with a sample point between 68..78%. +*/ +static const tCanBusTiming canTiming[] = +{ /* TQ | TSEG1 | TSEG2 | SP */ + /* ------------------------- */ + { 5, 2 }, /* 8 | 5 | 2 | 75% */ + { 6, 2 }, /* 9 | 6 | 2 | 78% */ + { 6, 3 }, /* 10 | 6 | 3 | 70% */ + { 7, 3 }, /* 11 | 7 | 3 | 73% */ + { 8, 3 }, /* 12 | 8 | 3 | 75% */ + { 9, 3 }, /* 13 | 9 | 3 | 77% */ + { 9, 4 }, /* 14 | 9 | 4 | 71% */ + { 10, 4 }, /* 15 | 10 | 4 | 73% */ + { 11, 4 }, /* 16 | 11 | 4 | 75% */ + { 12, 4 }, /* 17 | 12 | 4 | 76% */ + { 12, 5 }, /* 18 | 12 | 5 | 72% */ + { 13, 5 }, /* 19 | 13 | 5 | 74% */ + { 14, 5 }, /* 20 | 14 | 5 | 75% */ + { 15, 5 }, /* 21 | 15 | 5 | 76% */ + { 15, 6 }, /* 22 | 15 | 6 | 73% */ + { 16, 6 }, /* 23 | 16 | 6 | 74% */ + { 16, 7 }, /* 24 | 16 | 7 | 71% */ + { 16, 8 } /* 25 | 16 | 8 | 68% */ +}; + + +/************************************************************************************//** +** \brief Search algorithm to match the desired baudrate to a possible bus timing +** configuration. +** \param baud The desired baudrate in kbps. Valid values are 10..1000. +** \param btr0 Pointer to where the value for register CANxBTR0 will be stored. +** \param btr1 Pointer to where the value for register CANxBTR1 will be stored. +** \return 1 if the CAN bustiming register values were found, 0 otherwise. +** +****************************************************************************************/ +static unsigned char CanGetSpeedConfig(unsigned short baud, unsigned char *btr0, unsigned char *btr1) +{ + unsigned char prescaler; + unsigned char cnt; + + /* loop through all possible time quanta configurations to find a match */ + for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++) + { + if ((BOOT_CPU_XTAL_SPEED_KHZ % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0) + { + /* compute the prescaler that goes with this TQ configuration */ + prescaler = (unsigned char)(BOOT_CPU_XTAL_SPEED_KHZ/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))); + + /* make sure the prescaler is valid */ + if ( (prescaler > 0) && (prescaler <= 64) ) + { + /* store the MSCAN bustiming register values */ + *btr0 = prescaler - 1; + *btr1 = ((canTiming[cnt].tseg2 - 1) << 4) | (canTiming[cnt].tseg1 - 1); + /* found a good bus timing configuration */ + return 1; + } + } + } + /* could not find a good bus timing configuration */ + return 0; +} /*** end of CanGetSpeedConfig ***/ + + +/************************************************************************************//** +** \brief Initializes the CAN communication interface. +** \return none. +** +****************************************************************************************/ +void BootComInit(void) +{ + unsigned char btrRegValues[2]; + unsigned long accept_code; + unsigned long accept_mask; + + /* enter initialization mode. note that this automatically disables CAN interrupts */ + CAN0CTL0 = CAN0CTL0_INITRQ_MASK; + /* wait for initialization mode entry handshake from the hardware */ + while ((CAN0CTL1 & CAN0CTL1_INITAK_MASK) == 0) + { + ; + } + + /* enable the CAN controller, disable wake up and listen modes and set the + * crystal oscillator as the clock source. + */ + CAN0CTL1 = CAN0CTL1_CANE_MASK; + + /* configure baudrate */ + if (CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &btrRegValues[0], &btrRegValues[1]) == 1) + { + /* configure the baudrate */ + CAN0BTR0 = btrRegValues[0]; + CAN0BTR1 = btrRegValues[1]; + } + + /* enable 2 32-bit acceptance filters. both will be configured for the same code and + * mask. the only difference is that filter 0 will be setup to receive extended 29-bit + * identifiers and filter 0 to receive standard 11-bit identifiers. + */ + CAN0IDAC_IDAM0 = 0; + CAN0IDAC_IDAM1 = 0; + + /* set the acceptance filter code and mask to receive all messages */ + accept_code = 0x00000000; + accept_mask = 0x1fffffff; + + /* configure acceptance filter 0 for 29-bit extended identifiers */ + CAN0IDAR0 = CONVERT_EXT_ID_TO_REG0(accept_code); + CAN0IDAR1 = CONVERT_EXT_ID_TO_REG1(accept_code); + CAN0IDAR2 = CONVERT_EXT_ID_TO_REG2(accept_code); + CAN0IDAR3 = CONVERT_EXT_ID_TO_REG3(accept_code); + CAN0IDMR0 = CONVERT_EXT_ID_TO_REG0(accept_mask); + CAN0IDMR1 = (CONVERT_EXT_ID_TO_REG1(accept_mask) | 0x10) & (unsigned char)(~0x08); + CAN0IDMR2 = CONVERT_EXT_ID_TO_REG2(accept_mask); + CAN0IDMR3 = CONVERT_EXT_ID_TO_REG3(accept_mask); + + /* configure acceptance filter 1 for 11-bit standard identifiers */ + CAN0IDAR4 = CONVERT_STD_ID_TO_REG0(accept_code); + CAN0IDAR5 = CONVERT_STD_ID_TO_REG1(accept_code); + CAN0IDAR6 = CONVERT_STD_ID_TO_REG2(accept_code); + CAN0IDAR7 = CONVERT_STD_ID_TO_REG3(accept_code); + CAN0IDMR4 = CONVERT_STD_ID_TO_REG0(accept_mask); + CAN0IDMR5 = CONVERT_STD_ID_TO_REG1(accept_mask) | (0x04 | 0x02 | 0x01); + CAN0IDMR6 = CONVERT_STD_ID_TO_REG2(accept_mask); + CAN0IDMR7 = CONVERT_STD_ID_TO_REG3(accept_mask); + + /* leave initialization mode and synchronize to the CAN bus */ + CAN0CTL0_INITRQ = 0; + /* wait for CAN bus synchronization handshake from the hardware */ + while ((CAN0CTL1 & CAN0CTL1_INITAK_MASK) != 0) + { + ; + } +} /*** end of BootComInit ***/ + + +/************************************************************************************//** +** \brief Receives the CONNECT request from the host, which indicates that the +** bootloader should be activated and, if so, activates it. +** \return none. +** +****************************************************************************************/ +void BootComCheckActivationRequest(void) +{ + unsigned long rxMsgId; + + /* check if a new message was received */ + if ((CAN0RFLG & CAN0RFLG_RXF_MASK) == CAN0RFLG_RXF_MASK) + { + /* check IDE-bit to determine if it is a 11-bit or 29-bit identifier */ + if ((CAN0RXIDR1 & CAN0RXIDR1_IDE_MASK) == 0) + { + /* 11-bit id */ + rxMsgId = (*(unsigned short*)(&CAN0RXIDR0)) >> 5; + } + else + { + /* 29-bit id */ + rxMsgId = (unsigned long)(((*(unsigned long*)(&CAN0RXIDR0)) & 0x0007ffff) >> 1) | + (unsigned long)(((*(unsigned long*)(&CAN0RXIDR0)) & 0xffe00000) >> 3); + } + /* is this the packet identifier? */ + if (rxMsgId == BOOT_COM_CAN_RX_MSG_ID) + { + /* check if this was an XCP CONNECT command */ + if ( (CAN0RXDSR0 == 0xff) && (CAN0RXDSR1 == 0x00) ) + { + /* release the receive object by clearing the rx flag */ + CAN0RFLG &= CAN0RFLG_RXF_MASK; + /* connection request received so start the bootloader */ + BootActivate(); + } + + } + /* release the receive object by clearing the rx flag */ + CAN0RFLG &= CAN0RFLG_RXF_MASK; + } +} /*** end of BootComCheckActivationRequest ***/ +#endif /* BOOT_COM_CAN_ENABLE > 0 */ + + /*********************************** end of boot.c *************************************/ diff --git a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/ide/hcs12_Data/Standard/TargetDataWindows.tdt b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/ide/hcs12_Data/Standard/TargetDataWindows.tdt index d0187ce1..6735bcc6 100644 Binary files a/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/ide/hcs12_Data/Standard/TargetDataWindows.tdt and b/Target/Demo/HCS12_Evbplus_Dragon12p_CodeWarrior/Prog/ide/hcs12_Data/Standard/TargetDataWindows.tdt differ diff --git a/Target/Source/HCS12/can.c b/Target/Source/HCS12/can.c new file mode 100644 index 00000000..836d7c97 --- /dev/null +++ b/Target/Source/HCS12/can.c @@ -0,0 +1,442 @@ +/************************************************************************************//** +* \file Source\HCS12\can.c +* \brief Bootloader CAN communication interface source file. +* \ingroup Target_HCS12 +* \internal +*---------------------------------------------------------------------------------------- +* C O P Y R I G H T +*---------------------------------------------------------------------------------------- +* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved +* +*---------------------------------------------------------------------------------------- +* L I C E N S E +*---------------------------------------------------------------------------------------- +* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published by the Free +* Software Foundation, either version 3 of the License, or (at your option) any later +* version. +* +* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; +* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +* PURPOSE. See the GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License along with OpenBLT. +* If not, see . +* +* A special exception to the GPL is included to allow you to distribute a combined work +* that includes OpenBLT without being obliged to provide the source code for any +* proprietary components. The exception text is included at the bottom of the license +* file . +* +* \endinternal +****************************************************************************************/ + + +/**************************************************************************************** +* Include files +****************************************************************************************/ +#include "boot.h" /* bootloader generic header */ + + +#if (BOOT_COM_CAN_ENABLE > 0) +/**************************************************************************************** +* Type definitions +****************************************************************************************/ +/** \brief Structure type with the layout of a CAN reception message slot. */ +typedef volatile struct +{ + volatile blt_int8u idr[4]; /**< identifier register 0..3 */ + volatile blt_int8u dsr[8]; /**< data segment register 0..7 */ + volatile blt_int8u dlr; /**< data length register */ + volatile blt_int8u dummy; /**< unused */ + volatile blt_int16u tstamp; /**< timestamp register */ +} tCanRxMsgSlot; + +/** \brief Structure type with the layout of a CAN transmit message slot. */ +typedef volatile struct +{ + volatile blt_int8u idr[4]; /**< identifier register 0..3 */ + volatile blt_int8u dsr[8]; /**< data segment register 0..7 */ + volatile blt_int8u dlr; /**< data length register */ + volatile blt_int8u tbpr; /**< transmit buffer priority register */ + volatile blt_int16u tstamp; /**< timestamp register */ +} tCanTxMsgSlot; + +/** \brief Structure type with the layout of the CAN related control registers. */ +typedef volatile struct +{ + volatile blt_int8u cctl0; /**< control register 0 */ + volatile blt_int8u cctl1; /**< control register 1 */ + volatile blt_int8u cbtr0; /**< bus timing register 0 */ + volatile blt_int8u cbtr1; /**< bus timing register 1 */ + volatile blt_int8u crflg; /**< receiver flag register */ + volatile blt_int8u crier; /**< receiver interrupt enable register */ + volatile blt_int8u ctflg; /**< transmitter flag register */ + volatile blt_int8u ctier; /**< transmitter interrupt enable register */ + volatile blt_int8u ctarq; /**< transmitter message abort control */ + volatile blt_int8u ctaak; /**< transmitter message abort control */ + volatile blt_int8u ctbsel; /**< transmit buffer selection */ + volatile blt_int8u cidac; /**< identifier acceptance control register */ + volatile blt_int8u dummy1[2]; /**< reserved (2) */ + volatile blt_int8u crxerr; /**< receive error counter */ + volatile blt_int8u ctxerr; /**< transmit error counter */ + volatile blt_int8u cidar0; /**< identifier acceptance register 0 */ + volatile blt_int8u cidar1; /**< identifier acceptance register 1 */ + volatile blt_int8u cidar2; /**< identifier acceptance register 2 */ + volatile blt_int8u cidar3; /**< identifier acceptance register 3 */ + volatile blt_int8u cidmr0; /**< identifier mask register 0 */ + volatile blt_int8u cidmr1; /**< identifier mask register 1 */ + volatile blt_int8u cidmr2; /**< identifier mask register 2 */ + volatile blt_int8u cidmr3; /**< identifier mask register 3 */ + volatile blt_int8u cidar4; /**< identifier acceptance register 4 */ + volatile blt_int8u cidar5; /**< identifier acceptance register 5 */ + volatile blt_int8u cidar6; /**< identifier acceptance register 6 */ + volatile blt_int8u cidar7; /**< identifier acceptance register 7 */ + volatile blt_int8u cidmr4; /**< identifier mask register 4 */ + volatile blt_int8u cidmr5; /**< identifier mask register 5 */ + volatile blt_int8u cidmr6; /**< identifier mask register 6 */ + volatile blt_int8u cidmr7; /**< identifier mask register 7 */ + volatile tCanRxMsgSlot rxSlot; /**< foreground receive message slot */ + volatile tCanTxMsgSlot txSlot; /**< foreground transmit message slot */ +} tCanRegs; + + +/** \brief Structure type with the layout of the CAN bus timing registers. */ +typedef struct +{ + blt_int8u tseg1; /**< CAN time segment 1 */ + blt_int8u tseg2; /**< CAN time segment 2 */ +} tCanBusTiming; + + +/**************************************************************************************** +* Macro definitions +****************************************************************************************/ +#if (BOOT_COM_CAN_CHANNEL_INDEX == 0) +/** \brief Set CAN base address to CAN0. */ +#define CAN_REGS_BASE_ADDRESS (0x0140) +#elif (BOOT_COM_CAN_CHANNEL_INDEX == 1) +/** \brief Set CAN base address to CAN1. */ +#define CAN_REGS_BASE_ADDRESS (0x0180) +#elif (BOOT_COM_CAN_CHANNEL_INDEX == 2) +/** \brief Set CAN base address to CAN2. */ +#define CAN_REGS_BASE_ADDRESS (0x01c0) +#elif (BOOT_COM_CAN_CHANNEL_INDEX == 3) +/** \brief Set CAN base address to CAN3. */ +#define CAN_REGS_BASE_ADDRESS (0x0200) +#elif (BOOT_COM_CAN_CHANNEL_INDEX == 4) +/** \brief Set CAN base address to CAN4. */ +#define CAN_REGS_BASE_ADDRESS (0x0280) +#endif +/** \brief Macro for accessing the CAN related control registers. */ +#define CAN ((volatile tCanRegs *)CAN_REGS_BASE_ADDRESS) +/** \brief Configures a CAN message id for 29-bit (extended). */ +#define EXTIDMASK_BIT (0x80000000) +/* macros for conveniently converting standard and extended message identifiers to the + * format specified by the MSCAN message slot. + */ +#define CONVERT_STD_ID_TO_REG0(id) ((blt_int8u)(((blt_int16u)id & 0x07f8) >> 3)) +#define CONVERT_STD_ID_TO_REG1(id) ((blt_int8u)(id & 0x07) << 5) +#define CONVERT_STD_ID_TO_REG2(id) (0) +#define CONVERT_STD_ID_TO_REG3(id) (0) +#define CONVERT_EXT_ID_TO_REG0(id) ((blt_int8u)(id >> 21)) +#define CONVERT_EXT_ID_TO_REG1(id) ((((blt_int8u)(id >> 15)) & 0x07) | \ + (((blt_int8u)(id >> 13)) & 0xe0) | (IDE_BIT)) +#define CONVERT_EXT_ID_TO_REG2(id) ((blt_int8u)(((blt_int16u)id & 0x7f80) >> 7)) +#define CONVERT_EXT_ID_TO_REG3(id) ((blt_int8u)(id & 0x7f) << 1) + + +/**************************************************************************************** +* Register definitions +****************************************************************************************/ +/** \brief Initialization mode request bit. */ +#define INITRQ_BIT (0x01) +/** \brief Initialization mode handshake bit. */ +#define INITAK_BIT (0x01) +/** \brief CAN controller enable bit. */ +#define CANE_BIT (0x80) +/** \brief Filter mode bit 0. */ +#define IDAM0_BIT (0x10) +/** \brief Filter mode bit 1. */ +#define IDAM1_BIT (0x20) +/** \brief Transmit buffer 0 select bit. */ +#define TX0_BIT (0x01) +/** \brief Transmit buffer 0 empty bit. */ +#define TXE0_BIT (0x01) +/** \brief 29-bit extended id bit. */ +#define IDE_BIT (0x08) +/** \brief Receive buffer full flag bit. */ +#define RXF_BIT (0x01) + + +/**************************************************************************************** +* Function prototypes +****************************************************************************************/ +static blt_bool CanGetSpeedConfig(blt_int16u baud, blt_int8u *btr0, blt_int8u *btr1); + + +/**************************************************************************************** +* Local constant declarations +****************************************************************************************/ +/** +* \brief Array with possible time quanta configurations. +* \details According to the CAN protocol 1 bit-time can be made up of between 8..25 +* time quanta (TQ). The total TQ in a bit is SYNC + TSEG1 + TSEG2 with SYNC +* always being 1. The sample point is (SYNC + TSEG1) / (SYNC + TSEG1 + SEG2) +* * 100%. This array contains possible and valid time quanta configurations +* with a sample point between 68..78%. +*/ +static const tCanBusTiming canTiming[] = +{ /* TQ | TSEG1 | TSEG2 | SP */ + /* ------------------------- */ + { 5, 2 }, /* 8 | 5 | 2 | 75% */ + { 6, 2 }, /* 9 | 6 | 2 | 78% */ + { 6, 3 }, /* 10 | 6 | 3 | 70% */ + { 7, 3 }, /* 11 | 7 | 3 | 73% */ + { 8, 3 }, /* 12 | 8 | 3 | 75% */ + { 9, 3 }, /* 13 | 9 | 3 | 77% */ + { 9, 4 }, /* 14 | 9 | 4 | 71% */ + { 10, 4 }, /* 15 | 10 | 4 | 73% */ + { 11, 4 }, /* 16 | 11 | 4 | 75% */ + { 12, 4 }, /* 17 | 12 | 4 | 76% */ + { 12, 5 }, /* 18 | 12 | 5 | 72% */ + { 13, 5 }, /* 19 | 13 | 5 | 74% */ + { 14, 5 }, /* 20 | 14 | 5 | 75% */ + { 15, 5 }, /* 21 | 15 | 5 | 76% */ + { 15, 6 }, /* 22 | 15 | 6 | 73% */ + { 16, 6 }, /* 23 | 16 | 6 | 74% */ + { 16, 7 }, /* 24 | 16 | 7 | 71% */ + { 16, 8 } /* 25 | 16 | 8 | 68% */ +}; + + +/************************************************************************************//** +** \brief Initializes the CAN controller and synchronizes it to the CAN bus. +** \return none. +** +****************************************************************************************/ +void CanInit(void) +{ + blt_int8u btrRegValues[2]; + blt_bool result; + blt_int32u accept_code; + blt_int32u accept_mask; + + /* the current implementation supports CAN0..4. throw an assertion error in case a + * different CAN channel is configured. + */ + ASSERT_CT((BOOT_COM_CAN_CHANNEL_INDEX >= 0) && (BOOT_COM_CAN_CHANNEL_INDEX <= 4)); + + /* enter initialization mode. note that this automatically disables CAN interrupts */ + CAN->cctl0 = INITRQ_BIT; + /* wait for initialization mode entry handshake from the hardware */ + while ((CAN->cctl1 & INITAK_BIT) == 0) + { + ; + } + + /* enable the CAN controller, disable wake up and listen modes and set the + * crystal oscillator as the clock source. + */ + CAN->cctl1 = CANE_BIT; + + /* configure baudrate */ + result = CanGetSpeedConfig(BOOT_COM_CAN_BAUDRATE/1000, &btrRegValues[0], &btrRegValues[1]); + ASSERT_RT(result == BLT_TRUE); + + /* configure the baudrate */ + CAN->cbtr0 = btrRegValues[0]; + CAN->cbtr1 = btrRegValues[1]; + + /* enable 2 32-bit acceptance filters. both will be configured for the same code and + * mask. the only difference is that filter 0 will be setup to receive extended 29-bit + * identifiers and filter 0 to receive standard 11-bit identifiers. + */ + CAN->cidac &= ~(IDAM1_BIT | IDAM0_BIT); + + /* set the acceptance filter code and mask to a value that only BOOT_COM_CAN_RX_MSG_ID + * is received. + */ + accept_code = BOOT_COM_CAN_RX_MSG_ID; + accept_mask = 0; + + /* configure acceptance filter 0 for 29-bit extended identifiers */ + CAN->cidar0 = CONVERT_EXT_ID_TO_REG0(accept_code); + CAN->cidar1 = CONVERT_EXT_ID_TO_REG1(accept_code); + CAN->cidar2 = CONVERT_EXT_ID_TO_REG2(accept_code); + CAN->cidar3 = CONVERT_EXT_ID_TO_REG3(accept_code); + CAN->cidmr0 = CONVERT_EXT_ID_TO_REG0(accept_mask); + CAN->cidmr1 = (CONVERT_EXT_ID_TO_REG1(accept_mask) | 0x10) & ~IDE_BIT; + CAN->cidmr2 = CONVERT_EXT_ID_TO_REG2(accept_mask); + CAN->cidmr3 = CONVERT_EXT_ID_TO_REG3(accept_mask); + + /* configure acceptance filter 1 for 11-bit standard identifiers */ + CAN->cidar4 = CONVERT_STD_ID_TO_REG0(accept_code); + CAN->cidar5 = CONVERT_STD_ID_TO_REG1(accept_code); + CAN->cidar6 = CONVERT_STD_ID_TO_REG2(accept_code); + CAN->cidar7 = CONVERT_STD_ID_TO_REG3(accept_code); + CAN->cidmr4 = CONVERT_STD_ID_TO_REG0(accept_mask); + CAN->cidmr5 = CONVERT_STD_ID_TO_REG1(accept_mask) | (0x04 | 0x02 | 0x01); + CAN->cidmr6 = CONVERT_STD_ID_TO_REG2(accept_mask); + CAN->cidmr7 = CONVERT_STD_ID_TO_REG3(accept_mask); + + /* leave initialization mode and synchronize to the CAN bus */ + CAN->cctl0 &= ~INITRQ_BIT; + /* wait for CAN bus synchronization handshake from the hardware */ + while ((CAN->cctl1 & INITAK_BIT) != 0) + { + ; + } + + /* bring transmit buffer 0 in the foreground as this is the only one used by this + * driver. + */ + CAN->ctbsel = TX0_BIT; +} /*** end of CanInit ***/ + + +/************************************************************************************//** +** \brief Transmits a packet formatted for the communication interface. +** \param data Pointer to byte array with data that it to be transmitted. +** \param len Number of bytes that are to be transmitted. +** \return none. +** +****************************************************************************************/ +void CanTransmitPacket(blt_int8u *data, blt_int8u len) +{ + blt_int8u byte_idx; + + /* double check that the transmit slot is really available */ + ASSERT_RT((CAN->ctflg & TXE0_BIT) != 0); + + /* is this a message with an 11-bit identifier? */ + if ((BOOT_COM_CAN_TX_MSG_ID & EXTIDMASK_BIT) == 0) + { + /* store the identifier */ + CAN->txSlot.idr[0] = CONVERT_STD_ID_TO_REG0(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[1] = CONVERT_STD_ID_TO_REG1(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[2] = CONVERT_STD_ID_TO_REG2(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[3] = CONVERT_STD_ID_TO_REG3(BOOT_COM_CAN_TX_MSG_ID); + } + else + { + /* store the identifier */ + CAN->txSlot.idr[0] = CONVERT_EXT_ID_TO_REG0(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[1] = CONVERT_EXT_ID_TO_REG1(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[2] = CONVERT_EXT_ID_TO_REG2(BOOT_COM_CAN_TX_MSG_ID); + CAN->txSlot.idr[3] = CONVERT_EXT_ID_TO_REG3(BOOT_COM_CAN_TX_MSG_ID); + } + + /* store the data length code */ + CAN->txSlot.dlr = len; + + /* store the message data */ + for (byte_idx=0; byte_idxtxSlot.dsr[byte_idx] = data[byte_idx]; + } + + /* start the transmission by clearing the buffer empty flag. must be done + * by writing a 1 value. + */ + CAN->ctflg = TXE0_BIT; + + /* wait for transmit completion */ + while ((CAN->ctflg & TXE0_BIT) == 0) + { + /* keep the watchdog happy */ + CopService(); + } +} /*** end of CanTransmitPacket ***/ + + +/************************************************************************************//** +** \brief Receives a communication interface packet if one is present. +** \param data Pointer to byte array where the data is to be stored. +** \return BLT_TRUE is a packet was received, BLT_FALSE otherwise. +** +****************************************************************************************/ +blt_bool CanReceivePacket(blt_int8u *data) +{ + blt_int32u rxMsgId; + blt_int8u rxMsgLen; + blt_int8u byte_idx; + blt_bool result = BLT_FALSE; + + /* check if a new message was received */ + if ((CAN->crflg & RXF_BIT) == RXF_BIT) + { + /* check IDE-bit to determine if it is a 11-bit or 29-bit identifier */ + if ((CAN->rxSlot.idr[1] & IDE_BIT) == 0) + { + /* 11-bit id */ + rxMsgId = (*(blt_int16u*)(&CAN->rxSlot.idr[0])) >> 5; + } + else + { + /* 29-bit id */ + rxMsgId = (blt_int32u)(((*(blt_int32u*)(&CAN->rxSlot.idr[0])) & 0x0007ffff) >> 1) | + (blt_int32u)(((*(blt_int32u*)(&CAN->rxSlot.idr[0])) & 0xffe00000) >> 3); + } + /* is this the packet identifier? */ + if (rxMsgId == BOOT_COM_CAN_RX_MSG_ID) + { + result = BLT_TRUE; + /* store the dlc */ + rxMsgLen = CAN->rxSlot.dlr & 0xf; + /* copy message data */ + for (byte_idx=0; byte_idxrxSlot.dsr[byte_idx]; + } + } + /* release the receive object by clearing the rx flag */ + CAN->crflg &= RXF_BIT; + } + return result; +} /*** end of CanReceivePacket ***/ + + +/************************************************************************************//** +** \brief Search algorithm to match the desired baudrate to a possible bus timing +** configuration. +** \param baud The desired baudrate in kbps. Valid values are 10..1000. +** \param btr0 Pointer to where the value for register CANxBTR0 will be stored. +** \param btr1 Pointer to where the value for register CANxBTR1 will be stored. +** \return BLT_TRUE if the CAN bustiming register values were found, BLT_FALSE +** otherwise. +** +****************************************************************************************/ +static blt_bool CanGetSpeedConfig(blt_int16u baud, blt_int8u *btr0, blt_int8u *btr1) +{ + blt_int8u prescaler; + blt_int8u cnt; + + /* loop through all possible time quanta configurations to find a match */ + for (cnt=0; cnt < sizeof(canTiming)/sizeof(canTiming[0]); cnt++) + { + if ((BOOT_CPU_XTAL_SPEED_KHZ % (baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))) == 0) + { + /* compute the prescaler that goes with this TQ configuration */ + prescaler = (blt_int8u)(BOOT_CPU_XTAL_SPEED_KHZ/(baud*(canTiming[cnt].tseg1+canTiming[cnt].tseg2+1))); + + /* make sure the prescaler is valid */ + if ( (prescaler > 0) && (prescaler <= 64) ) + { + /* store the MSCAN bustiming register values */ + *btr0 = prescaler - 1; + *btr1 = ((canTiming[cnt].tseg2 - 1) << 4) | (canTiming[cnt].tseg1 - 1); + /* found a good bus timing configuration */ + return BLT_TRUE; + } + } + /* service the watchdog */ + CopService(); + } + /* could not find a good bus timing configuration */ + return BLT_FALSE; +} /*** end of CanGetSpeedConfig ***/ +#endif /* BOOT_COM_CAN_ENABLE > 0 */ + + +/*********************************** end of can.c **************************************/ diff --git a/Target/Source/HCS12/can.h b/Target/Source/HCS12/can.h new file mode 100644 index 00000000..de5debe8 --- /dev/null +++ b/Target/Source/HCS12/can.h @@ -0,0 +1,47 @@ +/************************************************************************************//** +* \file Source\HCS12\can.h +* \brief Bootloader CAN communication interface header file. +* \ingroup Target_HCS12 +* \internal +*---------------------------------------------------------------------------------------- +* C O P Y R I G H T +*---------------------------------------------------------------------------------------- +* Copyright (c) 2013 by Feaser http://www.feaser.com All rights reserved +* +*---------------------------------------------------------------------------------------- +* L I C E N S E +*---------------------------------------------------------------------------------------- +* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or +* modify it under the terms of the GNU General Public License as published by the Free +* Software Foundation, either version 3 of the License, or (at your option) any later +* version. +* +* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; +* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR +* PURPOSE. See the GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License along with OpenBLT. +* If not, see . +* +* A special exception to the GPL is included to allow you to distribute a combined work +* that includes OpenBLT without being obliged to provide the source code for any +* proprietary components. The exception text is included at the bottom of the license +* file . +* +* \endinternal +****************************************************************************************/ +#ifndef CAN_H +#define CAN_H + +#if (BOOT_COM_CAN_ENABLE > 0) +/**************************************************************************************** +* Function prototypes +****************************************************************************************/ +void CanInit(void); +void CanTransmitPacket(blt_int8u *data, blt_int8u len); +blt_bool CanReceivePacket(blt_int8u *data); +#endif /* BOOT_COM_CAN_ENABLE > 0 */ + + +#endif /* CAN_H */ +/*********************************** end of can.h **************************************/ diff --git a/Target/Source/HCS12/uart.c b/Target/Source/HCS12/uart.c index 4f91e6c9..95b22c8d 100644 --- a/Target/Source/HCS12/uart.c +++ b/Target/Source/HCS12/uart.c @@ -41,7 +41,7 @@ /**************************************************************************************** * Type definitions ****************************************************************************************/ -/** \brief Structure type with the layout of the UART related controler registers. */ +/** \brief Structure type with the layout of the UART related control registers. */ typedef volatile struct { volatile blt_int8u scibdh; /**< baudrate control register [SBR 12..8] */