mirror of https://github.com/rusefi/openblt.git
225 lines
9.3 KiB
C
225 lines
9.3 KiB
C
/************************************************************************************//**
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* \file Source/TRICORE_TC2/cpu.c
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* \brief Bootloader cpu module source file.
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* \ingroup Target_TRICORE_TC2
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2023 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "boot.h" /* bootloader generic header */
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#include "IfxCpu.h" /* CPU driver */
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/****************************************************************************************
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* Macro definitions
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****************************************************************************************/
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/** \brief Pointer to the user program's reset vector. */
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#define CPU_USER_PROGRAM_STARTADDR_PTR ((blt_addr)(NvmGetUserProgBaseAddress() + 0x00000020))
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/****************************************************************************************
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* Hook functions
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****************************************************************************************/
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#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
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extern blt_bool CpuUserProgramStartHook(void);
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#endif
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/****************************************************************************************
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* Function prototypes
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****************************************************************************************/
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static void CpuEnableUncorrectableBitErrorTrap(blt_bool enable);
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/************************************************************************************//**
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** \brief Initializes the CPU module.
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** \return none.
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**
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****************************************************************************************/
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void CpuInit(void)
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{
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/* bootloader runs in polling mode so disable the global interrupts. this is done for
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* safety reasons. if the bootloader was started from a running user program, it could
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* be that the user program did not properly disable the interrupt generation of
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* peripherals. */
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CpuIrqDisable();
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/* disable the CPU trap when reading from a flash page. */
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CpuEnableUncorrectableBitErrorTrap(BLT_FALSE);
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} /*** end of CpuInit ***/
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/************************************************************************************//**
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** \brief Starts the user program, if one is present. In this case this function
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** does not return.
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** \return none.
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**
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****************************************************************************************/
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void CpuStartUserProgram(void)
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{
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/* check if a user program is present by verifying the checksum */
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if (NvmVerifyChecksum() == BLT_FALSE)
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{
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#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
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/* bootloader will stay active so perform deferred initialization to make sure
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* the communication interface that were not yet initialized are now initialized.
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* this is needed to make sure firmware updates via these communication interfaces
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* will be possible.
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*/
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ComDeferredInit();
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#endif
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/* not a valid user program so it cannot be started */
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return;
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}
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#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
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/* invoke callback */
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if (CpuUserProgramStartHook() == BLT_FALSE)
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{
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#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
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/* bootloader will stay active so perform deferred initialization to make sure
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* the communication interface that were not yet initialized are now initialized.
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* this is needed to make sure firmware updates via these communication interfaces
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* will be possible.
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*/
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ComDeferredInit();
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#endif
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/* callback requests the user program to not be started */
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return;
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}
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#endif
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#if (BOOT_COM_ENABLE > 0)
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/* release the communication interface */
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ComFree();
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#endif
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/* reset the timer */
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TimerReset();
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/* re-enable the CPU trap when reading from a flash page. */
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CpuEnableUncorrectableBitErrorTrap(BLT_TRUE);
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/* after a reset, the global interrupts are disabled (ICR.IE=0) and the user program's
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* startup code is responsible for initializing the interrupt vector table and trap
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* table base addresses. therefore there is no need to initialize these base addresses
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* and enable the global interrupts in this port.
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*/
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/* the first program code in the user program will be the reset handler _START(). to
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* start the user program, the bootloader needs to jump to this function.
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*/
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Ifx__jumpToFunction((void *)CPU_USER_PROGRAM_STARTADDR_PTR);
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#if (BOOT_COM_DEFERRED_INIT_ENABLE > 0) && (BOOT_COM_ENABLE > 0)
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/* theoretically, the code never gets here because the user program should now be
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* running and the previous function call should not return. In case it did return
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* for whatever reason, make sure all communication interfaces are initialized so that
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* firmware updates can be started.
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*/
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ComDeferredInit();
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#endif
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} /*** end of CpuStartUserProgram ***/
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/************************************************************************************//**
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** \brief Copies data from the source to the destination address.
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** \param dest Destination address for the data.
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** \param src Source address of the data.
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** \param len length of the data in bytes.
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** \return none.
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**
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****************************************************************************************/
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void CpuMemCopy(blt_addr dest, blt_addr src, blt_int16u len)
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{
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blt_int8u *from, *to;
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/* set casted pointers */
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from = (blt_int8u *)src;
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to = (blt_int8u *)dest;
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/* copy all bytes from source address to destination address */
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while (len-- > 0)
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{
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/* store byte value from source to destination */
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*to++ = *from++;
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/* keep the watchdog happy */
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CopService();
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}
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} /*** end of CpuMemCopy ***/
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/************************************************************************************//**
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** \brief Sets the bytes at the destination address to the specified value.
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** \param dest Destination address for the data.
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** \param value Value to write.
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** \param len Number of bytes to write.
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** \return none.
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**
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****************************************************************************************/
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void CpuMemSet(blt_addr dest, blt_int8u value, blt_int16u len)
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{
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blt_int8u *to;
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/* set casted pointer */
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to = (blt_int8u *)dest;
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/* set all bytes at the destination address to the specified value */
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while (len-- > 0)
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{
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/* set byte value */
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*to++ = value;
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/* keep the watchdog happy */
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CopService();
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}
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} /*** end of CpuMemSet ***/
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/************************************************************************************//**
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** \brief Enables or disables the reporting of an uncorrectable bit error to the CPU.
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** On this microcontroller, directly reading data from flash memory can result
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** in a CPU trap, when that particular flash page was not previously newly
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** programmed (IfxCpu_Trap_Bus_Id_dataAccessSynchronousError).
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** \param enable BLT_TRUE to enable generation of the CPU trap, BLT_FALSE to disable.
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** \return none.
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**
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****************************************************************************************/
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static void CpuEnableUncorrectableBitErrorTrap(blt_bool enable)
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{
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blt_int16u password;
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blt_int8u trapDisBitVal;
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/* determine the TRAPDIS value. */
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trapDisBitVal = (enable == BLT_TRUE) ? 0 : 1;
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/* get the current endinit password for the CPU WDT Hardware module. */
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password = IfxScuWdt_getCpuWatchdogPassword();
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/* disable EndInit protection. */
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IfxScuWdt_clearCpuEndinit(password);
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/* write the new value of the TRAPDIS bit field in the MARP register. */
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FLASH0_MARP.B.TRAPDIS = trapDisBitVal;
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/* re-enable EndInit protection. */
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IfxScuWdt_setCpuEndinit(password);
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} /*** end of CpuEnableUncorrectableBitErrorTrap ***/
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/*********************************** end of cpu.c **************************************/
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