mirror of https://github.com/rusefi/openblt.git
216 lines
7.7 KiB
C
216 lines
7.7 KiB
C
/************************************************************************************//**
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* \file Demo/HCS12_DevKit_S12G128_CodeWarrior/Prog/main.c
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* \brief Demo program application source file.
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* \ingroup Prog_HCS12_DevKit_S12G128_CodeWarrior
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* \internal
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*----------------------------------------------------------------------------------------
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* C O P Y R I G H T
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*----------------------------------------------------------------------------------------
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* Copyright (c) 2018 by Feaser http://www.feaser.com All rights reserved
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*
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*----------------------------------------------------------------------------------------
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* L I C E N S E
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*----------------------------------------------------------------------------------------
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* This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as published by the Free
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* Software Foundation, either version 3 of the License, or (at your option) any later
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* version.
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*
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* OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You have received a copy of the GNU General Public License along with OpenBLT. It
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* should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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*
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* \endinternal
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****************************************************************************************/
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/****************************************************************************************
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* Include files
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****************************************************************************************/
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#include "header.h" /* generic header */
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/****************************************************************************************
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* Function prototypes
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****************************************************************************************/
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static void Init(void);
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static void SystemClockInit(void);
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/************************************************************************************//**
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** \brief This is the entry point for the bootloader application and is called
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** by the reset interrupt vector after the C-startup routines executed.
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** \return none.
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**
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****************************************************************************************/
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void main(void)
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{
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/* initialize the microcontroller */
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Init();
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/* initialize the bootloader interface */
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BootComInit();
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/* start the infinite program loop */
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for (;;)
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{
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/* toggle LED with a fixed frequency */
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LedToggle();
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/* check for bootloader activation request */
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BootComCheckActivationRequest();
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}
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} /*** end of main ***/
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/************************************************************************************//**
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** \brief Initializes the microcontroller.
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** \return none.
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**
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****************************************************************************************/
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static void Init(void)
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{
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volatile unsigned long delayCnt;
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/* ----- initialize the system clock ----- */
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SystemClockInit();
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/* ----- configure the CAN Tx and Rx pins ----- */
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/* configure pullup device for the CAN pins */
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PPSM &= ~0x03;
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/* enable the pull device for the CAN pins */
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PERM |= 0x03;
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/* configure the CAN tx pin as a push pull output */
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WOMM |= 0x02;
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/* ---- configure the SPI pins for the SBC with CAN transceiver ---- */
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/* configure a pullup device for SPI MISO, MOSI, CLK and a pulldown for CS */
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PPSJ &= ~0x7;
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PPSJ |= 0x10;
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/* enabled the pull device for the SPI pins */
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PERJ |= 0x0F;
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/* disable interrupt on the SPI CS pin */
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PIEJ &= ~0x10;
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/* configure the SPI CS pin as a digital output and deselect the chip */
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PTJ |= 0x10;
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DDRJ |= 0x10;
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/* ---- initialize the SPI peripheral ---- */
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/* disable the SPI1 module and clearing flags in SPISR register */
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SPI1CR1 = 0x00;
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/* set configuration in control register 2
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* XFRW=1,MODFEN=1, BIDIROE=0, SPISWAI=0, SPC0=0
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*/
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SPI1CR2 = 0x50;
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/* configure the communication speed */
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SPI1BR = 0x42;
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/* set the configuration in control register 1
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* SPIE=0, SPE=1, SPTIE=0, MSTR=1, CPOL=0, CPHA=1, SSOE=1, LSBFE=0
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*/
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SPI1CR1 = 0x56;
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/* ---- communicate with SBC via SPI to enable CAN communication ---- */
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/* delay a bit to make sure the SBC is ready to receive new data */
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delayCnt = 300;
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while(delayCnt-- > 0);
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/* read Vreg register H */
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SPI1DRH = 0xDF;
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SPI1DRL = 0x80;
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/* wait for the SPI transmit data register to be empty */
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while(SPI1SR_SPTEF == 0);
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/* delay a bit to make sure the SBC is ready to receive new data */
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delayCnt = 300;
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while(delayCnt-- > 0);
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/* enter in "normal mode" */
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SPI1DRH = 0x5A;
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SPI1DRL = 0x00;
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/* wait for the SPI transmit data register to be empty */
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while(SPI1SR_SPTEF == 0);
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/* delay a bit to make sure the SBC is ready to receive new data */
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delayCnt = 300;
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while(delayCnt-- > 0);
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/* enable 5V-CAN and Vaux */
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SPI1DRH = 0x5E;
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SPI1DRL = 0x90;
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/* wait for the SPI transmit data register to be empty */
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while(SPI1SR_SPTEF == 0);
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/* delay a bit to make sure the SBC is ready to receive new data */
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delayCnt = 300;
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while(delayCnt-- > 0);
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/* set CAN in Tx-Rx mode, fast slew rate */
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SPI1DRH = 0x60;
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SPI1DRL = 0xC0;
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/* wait for the SPI transmit data register to be empty */
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while(SPI1SR_SPTEF == 0);
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/* ---- init the led driver ---- */
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LedInit();
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/* ---- init the timer driver ---- */
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TimerInit();
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/* ---- enable interrupts ---- */
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EnableInterrupts;
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} /*** end of Init ***/
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/************************************************************************************//**
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** \brief Initializes the clock configuration of the microcontroller.
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** \return none.
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**
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****************************************************************************************/
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static void SystemClockInit(void)
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{
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/* system clock initialization in PEE mode. the external 8 MHz crystal oscillator is
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* used to drive the PLL such that the system clock (Fpll) is 24 MHz, with and Fvco
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* of 48 MHz and the bus clock is Fpll/2 = 12 MHz.
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*/
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/* disable the protection of the clock configuration registers */
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CPMUPROT = 0x26;
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/* configure the oscillator to be disabled in stop mode */
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CPMUCLKS_PSTP = 0;
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/* enable the PLL to allow write to divider registers */
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CPMUCLKS_PLLSEL = 1;
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/* configure Fref to be 4 MHz. REFDIV = 0, REFCLK = 2 - 6 MHz.
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* Fref = Fosc / (REFDIV + 1)
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*/
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CPMUREFDIV = 0x41;
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/* configure Fvco to be 48 MHz. SYNDIV = 11, VCOFRQ = 48 - 50 MHz.
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* Fvco = Fref * (SYNDIV + 1)
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*/
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CPMUSYNR = 0x4B;
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/* select Fpll (locked) to be 24 MHz. POSTDIV = 1.
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* Fpll = Fvco / (POSTDIV + 1)
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*/
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CPMUPOSTDIV = 0x01;
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/* set Fpll as the source of the system clocks */
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CPMUCLKS_PLLSEL = 1;
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/* wait for hardware handshake, which verifies a correct configuration of CPMUCLKS */
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while(CPMUCLKS_PLLSEL == 0)
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{
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;
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}
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/* enabled the external oscillator, since it is used to drive the PLL */
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CPMUOSC_OSCE = 1;
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/* wait for the oscillation to stabilize */
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while(CPMUFLG_UPOSC == 0)
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{
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;
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}
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/* configure the PLL frequency modulation */
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CPMUPLL = 0x00U;
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/* wait for the PLL to lock */
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while(CPMUFLG_LOCK == 0)
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{
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;
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}
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/* enable the protection of the clock configuration registers */
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CPMUPROT = 0x00;
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} /*** end of SystemClockInit ***/
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/*********************************** end of main.c *************************************/
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