2009-08-18 03:27:24 -07:00
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# TI/Luminary Stellaris lm3s6965
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2008-11-30 14:25:43 -08:00
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2009-09-21 11:48:22 -07:00
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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2008-11-30 14:25:43 -08:00
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set _CHIPNAME lm3s6965
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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2008-12-03 04:02:46 -08:00
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set _CPUTAPID 0x3ba00477
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2008-11-30 14:25:43 -08:00
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}
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2008-07-04 10:33:46 -07:00
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# jtag speed
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2010-03-15 08:37:43 -07:00
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adapter_khz 500
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2008-07-04 10:33:46 -07:00
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2010-03-15 08:41:30 -07:00
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adapter_nsrst_delay 100
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2008-04-21 01:52:52 -07:00
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jtag_ntrst_delay 100
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2008-04-09 00:31:24 -07:00
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2008-04-21 01:52:52 -07:00
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#LM3S6965 Evaluation Board has only srst
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reset_config srst_only
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2008-04-09 00:31:24 -07:00
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#jtag scan chain
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2008-11-30 14:25:43 -08:00
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 1 -irmask 0xf -expected-id $_CPUTAPID
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2008-04-28 13:05:17 -07:00
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# the luminary variant causes a software reset rather than asserting SRST
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# this stops the debug registers from being cleared
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# this will be fixed in later revisions of silicon
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2009-08-18 03:27:24 -07:00
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -chain-position $_CHIPNAME.cpu -variant lm3s
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2008-04-09 00:31:24 -07:00
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2009-08-18 03:27:24 -07:00
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# 8k working area at base of ram, not backed up
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 0x2000
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2008-04-09 00:31:24 -07:00
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#flash configuration
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2009-11-18 02:15:52 -08:00
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
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