mirror of https://github.com/rusefi/openocd.git
- documentation fixes (thanks to Uwe Hermann)
- bootstrapping changes to accomodate packaging (thanks to Uwe Hermann) git-svn-id: svn://svn.berlios.de/openocd/trunk@182 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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README
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README
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@ -13,7 +13,7 @@ User interaction is realized through a telnet command line interface and a gdb
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1. JTAG hardware
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Currently, OpenOCD supports three types of JTAG interfaces:
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Currently, OpenOCD supports the following JTAG interfaces:
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- Parallel port wigglers. These devices connect to a PC's parallel port,
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providing direct access to the JTAG lines. The OpenOCD contains descriptions
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@ -21,6 +21,15 @@ of a few Wiggler layouts, including the original 'Wiggler' design. Other
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layouts (i.e. mapping of parallel port pins to JTAG lines) can be added easily.
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Typical Wiggler speeds are around 12kByte/s code download to an ARM7's RAM.
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The list of supported parallel port devices includes:
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* Macraigor Wiggler JTAG cable
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* Gateworks GW16012 JTAG programmer
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* Xilinx DLC5 JTAG parallel cable III
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* Ka-Ro TRITON starterkit II JTAG cable
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* Lattice parallel port JTAG cable
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* ST FlashLINK programming cable
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- The Amontec JTAG Accelerator. This is a configuration for Amontec's Chameleon
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dongle, a parallel port interface based on a Xilinx CoolRunner CPLD. It uses
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the IEEE1284 EPP parallel port specification, providing many times the
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@ -60,6 +69,25 @@ features and additional RS232 UART.
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The Signalyzer offers support for a wide variety of target voltages from 1.2V to
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5.5V. A second connector provides access to a TTL level UART.
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* American Microsystem M5960 USB JTAG programmer.
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* Turtelizer 2: http://www.ethernut.de/en/hardware/turtelizer/index.html
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Another USB JTAG programmer, with freely available schematics. It supports
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target voltages from 1.65V to 5.5V.
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* Hitex STR9-comSTICK: http://www.ehitex.de/p_info.php?products_id=292
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A STR912FW44x microcontroller "board" with USB and JTAG functionality.
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* Luminary Micro development board evb_lm3s811 JTAG interface.
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* ASIX PRESTO: http://www.asix-tools.com/prg_presto.htm
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The ASIX PRESTO is a USB JTAG programmer for a wide range of components, e.g.
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microcontrollers, serial EEPROM and Flash memory chips, CPLDs and others.
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* usbprog: http://www.embedded-projects.net/index.php?page_id=165
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The usbprog is a freely programmable USB adapter, which can (among other
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things) use a firmware which turns it into a JTAG programmer/debugger.
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All FT2232 based devices may be accessed using either FTDI's proprietary FTD2XX
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library (www.ftdichip.com) or using an open-source replacement from
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http://www.intra2net.com/de/produkte/opensource/ftdi/index.php, also included
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@ -75,20 +103,19 @@ This version of openocd supports the following ARM7/9 cores:
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- ARM922t
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- ARM926ej-s
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- ARM966e
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- Cortex-M3
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Support for Intel XScale CPUs is also included:
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- PXA25x
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- PXA27x
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- IXP42x
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PXA27x debugging should be similar to the PXA25x but fails in the current
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version of OpenOCD.
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3. Host platforms
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OpenOCD was originally developed on x86-Linux, but has since then been ported
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to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, x86-64-Linux and
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PowerPC OS-X.
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to run on Windows/Cygwin, native Windows with MinGW, FreeBSD, IA64-Linux,
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AMD64-Linux, Alpha-Linux, ARM-Linux, and PowerPC OS-X.
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4. Documentation
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@ -1,4 +1,4 @@
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aclocal \
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&& autoheader \
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&& automake --gnu --add-missing \
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&& automake --foreign --add-missing --copy \
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&& autoconf
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@ -1,7 +1,7 @@
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.TH "OPENOCD" "1" "May 03, 2007" "" ""
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.TH "OPENOCD" "1" "July 26, 2007" "" ""
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.SH "NAME"
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openocd \- A free and open on\-chip debugging, in\-system programming and
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boundary\-scan testing tool for ARM systems (currently ARM7/9 and XScale, Cortex\-M3 support to be merged)
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boundary\-scan testing tool for ARM systems (currently ARM7/9, XScale, and Cortex\-M3)
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.SH "SYNOPSIS"
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.B openocd \fR[\fB\-fdlh\fR] [\fB\-\-file\fR <filename>] [\fB\-\-debug\fR <debuglevel>] [\fB\-\-log_output\fR <filename>] [\fB\-\-help]
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.SH "DESCRIPTION"
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@ -10,14 +10,20 @@ is an on\-chip debugging, in\-system programming and boundary\-scan
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testing tool for ARM systems.
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.PP
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The debugger uses an IEEE 1149\-1 compliant JTAG TAP bus master to access
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on\-chip debug functionality available on ARM7/9 and XScale based
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on\-chip debug functionality available on ARM7/9, XScale, and Cortex-M3 based
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microcontrollers / system\-on\-chip solutions.
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.PP
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User interaction is realized through a telnet command line interface and
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a gdb (the GNU debugger) remote protocol server.
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.PP
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OpenOCD supports various different types of JTAG interfaces/programmers:
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* Parallel port wigglers
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* Parallel port wigglers, e.g.
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* Macraigor Wiggler JTAG cable
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* Gateworks GW16012 JTAG programmer
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* Xilinx DLC5 JTAG parallel cable III
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* Ka-Ro TRITON starterkit II JTAG cable
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* Lattice parallel port JTAG cable
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* ST FlashLINK programming cable
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* Amontec JTAG Accelerator
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* FTDI FT2232 based USB devices
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* USBJTAG
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* Amontec JTAGkey\-Tiny
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* Olimex ARM\-USB\-OCD
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* eVerve Signalyzer
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* ... other FT2232 based dongles
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* American Microsystem M5960
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* Turtelizer 2
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* Hitex STR9-comSTICK
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* Luminary Micro evb_lm3s811
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* ASIX PRESTO
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* usbprog
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.PP
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It also supports a number of different ARM7/9 cores:
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* ARM7TDMI(\-s)
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* ARM922t
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* ARM926ej\-s
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* ARM966e
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* Cortex-M3
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.PP
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Support for Intel XScale CPUs is also included:
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* PXA25x
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* PXA27x
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* IXP42x
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PXA27x debugging should be similar to the PXA25x but fails in the current
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version of OpenOCD.
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.SH "OPTIONS"
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.TP
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.B "\-f, \-\-file <filename>"
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@ -87,7 +97,7 @@ or on the mailing list
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is covered by the GNU General Public License (GPL), version 2 or later.
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.\"
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.SH "SEE ALSO"
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.BR jtag (1)
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.SH "AUTHORS"
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Dominic Rath <Dominic.Rath@gmx.de>
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.br
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@ -18,7 +18,7 @@
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#define OPENOCD_VERSION "Open On-Chip Debugger (2007-07-25 12:00 CEST)"
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#define OPENOCD_VERSION "Open On-Chip Debugger (2007-07-26 11:30 CEST)"
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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