rusefi-1/firmware/hw_layer/drivers/gpio/tle8888.h

59 lines
1.2 KiB
C
Raw Normal View History

2019-03-25 12:08:32 -07:00
/*
* tle8888.h
*
* Created on: Mar 25, 2019
* Author: garage
*/
#ifndef HW_LAYER_DRIVERS_GPIO_TLE8888_H_
#define HW_LAYER_DRIVERS_GPIO_TLE8888_H_
#include "global.h"
2019-04-04 06:55:18 -07:00
#include <hal.h>
2019-04-13 07:58:52 -07:00
#include "efifeatures.h"
#define TLE8888_OUTPUTS 28
2019-04-04 06:55:18 -07:00
/* 4 misc channels */
#define TLE8888_DIRECT_MISC 4
/* 4 IGN channels - INJ1..4 - IN1..4
* 4 INJ channels - OUT1..4 - IN5..8 */
#define TLE8888_DIRECT_OUTPUTS (4 + 4 + TLE8888_DIRECT_MISC)
/* DOTO: add irq support */
#define TLE8888_POLL_INTERVAL_MS 100
/* note that spi transfer should be LSB first */
struct tle8888_config {
SPIDriver *spi_bus;
2019-04-04 16:56:03 -07:00
SPIConfig spi_config;
2019-04-04 06:55:18 -07:00
/* bidirectional, check DS */
struct {
ioportid_t port;
uint_fast8_t pad;
} reset;
struct {
/* MCU port-pin routed to IN9..12 */
2019-04-04 06:55:18 -07:00
ioportid_t port;
uint_fast8_t pad;
/* ...used to drive output (starts from 1, as in DS, coders gonna hate) */
int output;
2019-04-04 06:55:18 -07:00
} direct_io[TLE8888_DIRECT_MISC];
};
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
2019-04-13 07:58:52 -07:00
/**
* @return return gpio chip base
*/
2019-04-04 06:55:18 -07:00
int tle8888_add(unsigned int index, const struct tle8888_config *cfg);
#ifdef __cplusplus
}
#endif /* __cplusplus */
2019-03-25 12:08:32 -07:00
#endif /* HW_LAYER_DRIVERS_GPIO_TLE8888_H_ */