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#509

This commit is contained in:
rusefi 2017-12-04 15:50:43 -05:00
parent f182bbf1eb
commit 00b1fc7026
1 changed files with 29 additions and 364 deletions
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393
firmware/docs/rusefi_chibios_16.patch
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@ -1,6 +1,6 @@
diff -uwr ChibiOS-stable_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h ChibiOS-stable_16.1.x/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h
--- ChibiOS-stable_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2017-12-04 11:35:28.558720500 -0500
+++ ChibiOS-stable_16.1.x/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h 2017-12-04 11:31:43.327707100 -0500
@@ -67,7 +67,7 @@
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC2 FALSE
@ -10,9 +10,10 @@ diff -uwr ChibiOS-stable_rusefi/demos/STM32/RT-STM32F334R8-NUCLEO/mcuconf.h Chib
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC2_DMA_PRIORITY 2
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
Only in ChibiOS-stable_16.1.x: doc
diff -uwr ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk ChibiOS-stable_16.1.x/os/common/ports/ARMCMx/compilers/GCC/rules.mk
--- ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2017-12-04 11:35:28.945324300 -0500
+++ ChibiOS-stable_16.1.x/os/common/ports/ARMCMx/compilers/GCC/rules.mk 2017-12-04 11:31:43.777345900 -0500
@@ -93,9 +93,8 @@
TCOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o)))
TCPPOBJS := $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o)))
@ -48,21 +49,10 @@ diff -uwr ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/rules.mk Ch
$(BUILDDIR)/$(PROJECT).elf: $(OBJS) $(LDSCRIPT)
ifeq ($(USE_VERBOSE_COMPILE),yes)
diff -uwr ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/vectors.c ChibiOS-stable_16.1.x/os/common/ports/ARMCMx/compilers/GCC/vectors.c
--- ChibiOS-stable_rusefi/os/common/ports/ARMCMx/compilers/GCC/vectors.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/common/ports/ARMCMx/compilers/GCC/vectors.c 2017-04-25 11:16:44.000000000 +0300
@@ -43,7 +43,6 @@
* @notapi
*/
/*lint -save -e9075 [8.4] All symbols are invoked from asm context.*/
-__attribute__((weak))
void _unhandled_exception(void) {
/*lint -restore*/
Only in ChibiOS-stable_rusefi/os/common: startup
diff -uwr ChibiOS-stable_rusefi/os/hal/include/uart.h ChibiOS-stable_16.1.x/os/hal/include/uart.h
--- ChibiOS-stable_rusefi/os/hal/include/uart.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/include/uart.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/include/uart.h 2017-12-04 11:35:33.910876500 -0500
+++ ChibiOS-stable_16.1.x/os/hal/include/uart.h 2017-12-04 11:31:45.212171300 -0500
@@ -185,23 +185,6 @@
#define _uart_wakeup_rx_error_isr(uartp)
#endif /* !UART_USE_WAIT */
@ -153,8 +143,8 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/include/uart.h ChibiOS-stable_16.1.x/os/h
/*===========================================================================*/
diff -uwr ChibiOS-stable_rusefi/os/hal/lib/streams/chprintf.c ChibiOS-stable_16.1.x/os/hal/lib/streams/chprintf.c
--- ChibiOS-stable_rusefi/os/hal/lib/streams/chprintf.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/lib/streams/chprintf.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/lib/streams/chprintf.c 2017-12-04 11:35:33.919377400 -0500
+++ ChibiOS-stable_16.1.x/os/hal/lib/streams/chprintf.c 2017-12-04 11:31:45.219171600 -0500
@@ -32,9 +32,7 @@
#include "memstreams.h"
@ -200,60 +190,9 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/lib/streams/chprintf.c ChibiOS-stable_16.
while (true) {
c = *fmt++;
if (c == 0)
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/I2Cv1/i2c_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -537,9 +537,6 @@
void i2c_lld_start(I2CDriver *i2cp) {
I2C_TypeDef *dp = i2cp->i2c;
- /* If in stopped state then enables the I2C and DMA clocks.*/
- if (i2cp->state == I2C_STOP) {
-
i2cp->txdmamode = STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE |
STM32_DMA_CR_MINC | STM32_DMA_CR_DMEIE |
STM32_DMA_CR_TEIE | STM32_DMA_CR_TCIE |
@@ -549,6 +546,9 @@
STM32_DMA_CR_TEIE | STM32_DMA_CR_TCIE |
STM32_DMA_CR_DIR_P2M;
+ /* If in stopped state then enables the I2C and DMA clocks.*/
+ if (i2cp->state == I2C_STOP) {
+
#if STM32_I2C_USE_I2C1
if (&I2CD1 == i2cp) {
bool b;
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/I2Cv2/i2c_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -672,18 +672,18 @@
void i2c_lld_start(I2CDriver *i2cp) {
I2C_TypeDef *dp = i2cp->i2c;
- /* Make sure I2C peripheral is disabled */
- dp->CR1 &= ~I2C_CR1_PE;
-
- /* If in stopped state then enables the I2C and DMA clocks.*/
- if (i2cp->state == I2C_STOP) {
-
#if STM32_I2C_USE_DMA == TRUE
/* Common DMA modes.*/
i2cp->txdmamode = DMAMODE_COMMON | STM32_DMA_CR_DIR_M2P;
i2cp->rxdmamode = DMAMODE_COMMON | STM32_DMA_CR_DIR_P2M;
#endif
+ /* Make sure I2C peripheral is disabled */
+ dp->CR1 &= ~I2C_CR1_PE;
+
+ /* If in stopped state then enables the I2C and DMA clocks.*/
+ if (i2cp->state == I2C_STOP) {
+
#if STM32_I2C_USE_I2C1
if (&I2CD1 == i2cp) {
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2017-12-04 11:35:34.228184400 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c 2017-12-04 11:31:45.417294300 -0500
@@ -137,7 +137,7 @@
t = localtime_r((time_t *)&(tv_sec), &tim);
osalDbgAssert(t != NULL, "conversion failed");
@ -264,8 +203,8 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv1/rtc_lld.c ChibiOS-s
#endif
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2017-12-04 11:35:34.231184600 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c 2017-12-04 11:31:45.420294900 -0500
@@ -27,7 +27,6 @@
*/
@ -322,8 +261,8 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c ChibiOS-s
ssr = rtcp->rtc->SSR;
#endif /* STM32_RTC_HAS_SUBSECONDS */
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2017-12-04 11:35:34.233183400 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h 2017-12-04 11:31:45.423295400 -0500
@@ -29,7 +29,6 @@
#ifndef _RTC_LLD_H_
#define _RTC_LLD_H_
@ -333,108 +272,9 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h ChibiOS-s
/*===========================================================================*/
Only in ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/RTCv2: rusefi_lse_fix.h
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/SPIv1/spi_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -514,8 +514,6 @@
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, &dummyrx);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
@@ -546,8 +544,6 @@
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode| STM32_DMA_CR_MINC);
@@ -575,8 +571,6 @@
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, &dummyrx);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
@@ -604,8 +598,6 @@
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/SPIv2/spi_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -515,8 +515,6 @@
*/
void spi_lld_ignore(SPIDriver *spip, size_t n) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, &dummyrx);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
@@ -547,8 +545,6 @@
void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
@@ -576,8 +572,6 @@
*/
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, &dummyrx);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode);
@@ -605,8 +599,6 @@
*/
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
- osalDbgAssert(n < 65536, "unsupported DMA transfer size");
-
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/TIMv1/gpt_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -819,7 +819,7 @@
*/
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->ARR = (uint32_t)(interval - 1); /* Time constant. */
gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
gptp->tim->CNT = 0; /* Reset counter. */
@@ -861,7 +861,7 @@
*/
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->ARR = (uint32_t)(interval - 1); /* Time constant. */
gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
gptp->tim->SR = 0; /* Clear pending IRQs. */
gptp->tim->CR1 = STM32_TIM_CR1_OPM | STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN;
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2017-12-04 11:35:34.288402400 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c 2017-12-04 11:31:45.463299900 -0500
@@ -226,11 +226,6 @@
/* Mustn't ever set TCIE here - if done, it causes an immediate
interrupt.*/
@ -493,8 +333,8 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.c ChibiO
/* Starting transfer.*/
dmaStreamEnable(uartp->dmarx);
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2017-12-04 11:35:34.292402600 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h 2017-12-04 11:31:45.465297000 -0500
@@ -461,14 +461,6 @@
typedef void (*uartecb_t)(UARTDriver *uartp, uartflags_t e);
@ -527,116 +367,9 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv1/uart_lld.h ChibiO
} UARTConfig;
/**
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv2/serial_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -44,24 +44,15 @@
#define USART_ISR_LBDF USART_ISR_LBD
#endif
-/* STM32L0xx/STM32F7xx ST headers difference.*/
-#if !defined(USART_ISR_LBDF)
-#define USART_ISR_LBDF USART_ISR_LBD
-#endif
-
-/* Workarounds for those devices where UARTs are USARTs.*/
+/* Handling the case where UART4 and UART5 are actually USARTs, this happens
+ in the STM32F0xx.*/
#if defined(USART4)
#define UART4 USART4
#endif
+
#if defined(USART5)
#define UART5 USART5
#endif
-#if defined(USART7)
-#define UART7 USART7
-#endif
-#if defined(USART8)
-#define UART8 USART8
-#endif
/*===========================================================================*/
/* Driver exported variables. */
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USARTv2/uart_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -30,25 +30,6 @@
/* Driver local definitions. */
/*===========================================================================*/
-/* For compatibility for those devices without LIN support in the USARTs.*/
-#if !defined(USART_ISR_LBDF)
-#define USART_ISR_LBDF 0
-#endif
-
-#if !defined(USART_CR2_LBDIE)
-#define USART_CR2_LBDIE 0
-#endif
-
-/* STM32L0xx/STM32F7xx ST headers difference.*/
-#if !defined(USART_ISR_LBDF)
-#define USART_ISR_LBDF USART_ISR_LBD
-#endif
-
-/* STM32L0xx/STM32F7xx ST headers difference.*/
-#if !defined(USART_ISR_LBDF)
-#define USART_ISR_LBDF USART_ISR_LBD
-#endif
-
/* STM32L0xx/STM32F7xx ST headers difference.*/
#if !defined(USART_ISR_LBDF)
#define USART_ISR_LBDF USART_ISR_LBD
@@ -118,25 +99,6 @@
STM32_DMA_GETCHANNEL(STM32_UART_UART8_TX_DMA_STREAM, \
STM32_UART8_TX_DMA_CHN)
-/* Workarounds for those devices where UARTs are USARTs.*/
-#if defined(USART4)
-#define UART4 USART4
-#endif
-#if defined(USART5)
-#define UART5 USART5
-#endif
-#if defined(USART7)
-#define UART7 USART7
-#endif
-#if defined(USART8)
-#define UART8 USART8
-#endif
-
-/* Workaround for more differences in headers.*/
-#if !defined(USART_CR1_M0)
-#define USART_CR1_M0 USART_CR1_M
-#endif
-
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@@ -777,7 +739,7 @@
/* Static DMA setup, the transfer size depends on the USART settings,
it is 16 bits if M=1 and PCE=0 else it is 8 bits.*/
- if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M0)
+ if ((uartp->config->cr1 & (USART_CR1_M | USART_CR1_PCE)) == USART_CR1_M)
uartp->dmamode |= STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
dmaStreamSetPeripheral(uartp->dmarx, &uartp->usart->RDR);
dmaStreamSetPeripheral(uartp->dmatx, &uartp->usart->TDR);
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USBv1/usb_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USBv1/usb_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/LLD/USBv1/usb_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/LLD/USBv1/usb_lld.c 2017-04-25 11:16:44.000000000 +0300
@@ -491,7 +491,7 @@
}
#endif
/* Reset procedure enforced on driver start.*/
- usb_lld_reset(usbp);
+ _usb_reset(usbp);
}
}
diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c ChibiOS-stable_16.1.x/os/hal/ports/STM32/STM32F4xx/hal_lld.c
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2017-12-04 11:35:34.489018800 -0500
+++ ChibiOS-stable_16.1.x/os/hal/ports/STM32/STM32F4xx/hal_lld.c 2017-12-04 11:31:45.580831100 -0500
@@ -23,7 +23,6 @@
*/
@ -667,8 +400,8 @@ diff -uwr ChibiOS-stable_rusefi/os/hal/ports/STM32/STM32F4xx/hal_lld.c ChibiOS-s
Only in ChibiOS-stable_rusefi/os/hal/ports/simulator: posix
diff -uwr ChibiOS-stable_rusefi/os/rt/include/chdebug.h ChibiOS-stable_16.1.x/os/rt/include/chdebug.h
--- ChibiOS-stable_rusefi/os/rt/include/chdebug.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/rt/include/chdebug.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/rt/include/chdebug.h 2017-12-04 11:35:34.990159100 -0500
+++ ChibiOS-stable_16.1.x/os/rt/include/chdebug.h 2017-12-04 11:31:45.893508300 -0500
@@ -121,8 +121,8 @@
/*===========================================================================*/
@ -681,8 +414,8 @@ diff -uwr ChibiOS-stable_rusefi/os/rt/include/chdebug.h ChibiOS-stable_16.1.x/os
/* When the state checker feature is disabled then the following functions
diff -uwr ChibiOS-stable_rusefi/os/rt/ports/ARM/chcore.h ChibiOS-stable_16.1.x/os/rt/ports/ARM/chcore.h
--- ChibiOS-stable_rusefi/os/rt/ports/ARM/chcore.h 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/rt/ports/ARM/chcore.h 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/rt/ports/ARM/chcore.h 2017-12-04 11:35:35.058164000 -0500
+++ ChibiOS-stable_16.1.x/os/rt/ports/ARM/chcore.h 2017-12-04 11:31:45.943509800 -0500
@@ -28,8 +28,6 @@
#ifndef _CHCORE_H_
#define _CHCORE_H_
@ -720,8 +453,8 @@ diff -uwr ChibiOS-stable_rusefi/os/rt/ports/ARM/chcore.h ChibiOS-stable_16.1.x/o
}
#else
diff -uwr ChibiOS-stable_rusefi/os/rt/ports/SIMIA32/chcore.c ChibiOS-stable_16.1.x/os/rt/ports/SIMIA32/chcore.c
--- ChibiOS-stable_rusefi/os/rt/ports/SIMIA32/chcore.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/rt/ports/SIMIA32/chcore.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/rt/ports/SIMIA32/chcore.c 2017-12-04 11:35:35.144185200 -0500
+++ ChibiOS-stable_16.1.x/os/rt/ports/SIMIA32/chcore.c 2017-12-04 11:31:45.999007700 -0500
@@ -25,12 +25,7 @@
* @{
*/
@ -755,8 +488,8 @@ diff -uwr ChibiOS-stable_rusefi/os/rt/ports/SIMIA32/chcore.c ChibiOS-stable_16.1
/** @} */
diff -uwr ChibiOS-stable_rusefi/os/rt/src/chdebug.c ChibiOS-stable_16.1.x/os/rt/src/chdebug.c
--- ChibiOS-stable_rusefi/os/rt/src/chdebug.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/os/rt/src/chdebug.c 2017-04-25 11:16:44.000000000 +0300
--- ChibiOS-stable_rusefi/os/rt/src/chdebug.c 2017-12-04 11:35:35.179205200 -0500
+++ ChibiOS-stable_16.1.x/os/rt/src/chdebug.c 2017-12-04 11:31:46.035008100 -0500
@@ -85,8 +85,6 @@
/* Module local definitions. */
/*===========================================================================*/
@ -802,71 +535,3 @@ diff -uwr ChibiOS-stable_rusefi/os/rt/src/chdebug.c ChibiOS-stable_16.1.x/os/rt/
}
}
diff -uwr ChibiOS-stable_rusefi/testhal/STM32/STM32F3xx/EXT/main.c ChibiOS-stable_16.1.x/testhal/STM32/STM32F3xx/EXT/main.c
--- ChibiOS-stable_rusefi/testhal/STM32/STM32F3xx/EXT/main.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/testhal/STM32/STM32F3xx/EXT/main.c 2017-04-25 11:16:44.000000000 +0300
@@ -65,17 +65,6 @@
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
- {EXT_CH_MODE_DISABLED, NULL},
{EXT_CH_MODE_DISABLED, NULL}
}
};
diff -uwr ChibiOS-stable_rusefi/testhal/STM32/STM32L4xx/GPT-ADC/main.c ChibiOS-stable_16.1.x/testhal/STM32/STM32L4xx/GPT-ADC/main.c
--- ChibiOS-stable_rusefi/testhal/STM32/STM32L4xx/GPT-ADC/main.c 2017-11-22 03:15:55.000000000 +0200
+++ ChibiOS-stable_16.1.x/testhal/STM32/STM32L4xx/GPT-ADC/main.c 2017-04-25 11:16:44.000000000 +0300
@@ -68,24 +68,23 @@
/*
* ADC conversion group.
- * Mode: Continuous, 16 samples of 2 channels, HW triggered by
+ * Mode: Continuous, 16 samples of 2 channels, HS triggered by
* GPT4-TRGO.
- * Channels: VRef, PA0.
+ * Channels: VRef, PC1.
*/
static const ADCConversionGroup adcgrpcfg1 = {
true,
ADC_GRP1_NUM_CHANNELS,
adccallback,
adcerrorcallback,
- ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12), /* CFGR */
+ ADC_CFGR_CONT | ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(12), /* CFGR */
ADC_TR(0, 4095), /* TR1 */
{ /* SMPR[2]*/
- ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5) |
- ADC_SMPR1_SMP_AN5(ADC_SMPR_SMP_247P5),
- 0
+ ADC_SMPR1_SMP_AN0(ADC_SMPR_SMP_247P5),
+ ADC_SMPR1_SMP_AN2(ADC_SMPR_SMP_247P5)
},
{ /* SQR[4] */
- ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN5),
+ ADC_SQR1_SQ1_N(ADC_CHANNEL_IN0) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN2),
0,
0,
0
@@ -146,11 +145,9 @@
adcSTM32EnableVREF(&ADCD1);
adcSTM32EnableTS(&ADCD1);
- palSetLineMode(LINE_ARD_A0, PAL_MODE_INPUT_ANALOG);
-
/*
* Starts an ADC continuous conversion triggered with a period of
- * 1/10000 second.
+ * 1/1000000 second.
*/
adcStartConversion(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH);
gptStartContinuous(&GPTD4, 100);