mirror of https://github.com/rusefi/rusefi-1.git
Adc cleanups (#1743)
* ADC: remove ADC_TwoSamplingDelay* 1. it is related to double or triple interlived mode only 2. it should be writen to CCR register, not CR1 * ADC: use designated initializers
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dron0gus
GitHub
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d72ba63527
commit
182747e907
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@ -266,12 +266,6 @@ void adc_lld_start(ADCDriver *adcp) {
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ADC12_GetDefaultConfig(&adcp->adc12Cfg);
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adcp->adc12Cfg.resolution = kADC12_Resolution12Bit;
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#if 0
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// process STM32-compatible config (todo: this is just a test code for now)
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// imitate sampling speed slowdown
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if (adcp->grpp->cr1 & ADC_TwoSamplingDelay_20Cycles)
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adcp->adc12Cfg.clockDivider = kADC12_ClockDivider8;
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#endif
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ADC12_Init(adcp->adc, &adcp->adc12Cfg);
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#else
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adcp->channel_mask = adcp->grpp->channel_mask;
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@ -123,11 +123,6 @@
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/** @} */
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// STM32-specific defines
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#ifndef ADC_TwoSamplingDelay_20Cycles
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#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
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#endif
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#define ADC_SQR1_NUM_CH(n) 0
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/*===========================================================================*/
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@ -116,22 +116,29 @@ static adcsample_t getAvgAdcValue(int index, adcsample_t *samples, int bufDepth,
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/*
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* ADC conversion group.
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*/
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static ADCConversionGroup adcgrpcfgSlow = { FALSE, 0, nullptr, NULL,
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/* HW dependent part.*/
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ADC_TwoSamplingDelay_20Cycles, // cr1
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ADC_CR2_SWSTART, // cr2
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/**
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* here we configure all possible channels for slow mode. Some channels would not actually
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* be used hopefully that's fine to configure all possible channels.
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*/
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static ADCConversionGroup adcgrpcfgSlow = {
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.circular = FALSE,
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.num_channels = 0,
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.end_cb = nullptr,
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.error_cb = nullptr,
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/* HW dependent part.*/
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.cr1 = 0,
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.cr2 = ADC_CR2_SWSTART,
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/**
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* here we configure all possible channels for slow mode. Some channels would not actually
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* be used hopefully that's fine to configure all possible channels.
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*/
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// sample times for channels 10...18
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.smpr1 =
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ADC_SMPR1_SMP_AN10(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_AN11(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_AN12(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_AN13(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_AN14(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_AN15(ADC_SAMPLING_SLOW) |
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ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144)
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, // sample times for channels 10...18
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ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144),
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// In this field must be specified the sample times for channels 0...9
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.smpr2 =
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ADC_SMPR2_SMP_AN0(ADC_SAMPLING_SLOW) |
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ADC_SMPR2_SMP_AN1(ADC_SAMPLING_SLOW) |
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ADC_SMPR2_SMP_AN2(ADC_SAMPLING_SLOW) |
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@ -141,39 +148,41 @@ ADC_TwoSamplingDelay_20Cycles, // cr1
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ADC_SMPR2_SMP_AN6(ADC_SAMPLING_SLOW) |
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ADC_SMPR2_SMP_AN7(ADC_SAMPLING_SLOW) |
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ADC_SMPR2_SMP_AN8(ADC_SAMPLING_SLOW) |
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ADC_SMPR2_SMP_AN9(ADC_SAMPLING_SLOW)
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, // In this field must be specified the sample times for channels 0...9
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0,
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0,
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0, // Conversion group sequence 13...16 + sequence length
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0, // Conversion group sequence 7...12
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0 // Conversion group sequence 1...6
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};
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ADC_SMPR2_SMP_AN9(ADC_SAMPLING_SLOW),
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.htr = 0,
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.ltr = 0,
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.sqr1 = 0, // Conversion group sequence 13...16 + sequence length
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.sqr2 = 0, // Conversion group sequence 7...12
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.sqr3 = 0 // Conversion group sequence 1...6
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};
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AdcDevice slowAdc(&adcgrpcfgSlow);
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void adc_callback_fast(ADCDriver *adcp, adcsample_t *buffer, size_t n);
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static ADCConversionGroup adcgrpcfg_fast = { FALSE, 0 /* num_channels */, adc_callback_fast, NULL,
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/* HW dependent part.*/
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ADC_TwoSamplingDelay_5Cycles, // cr1
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ADC_CR2_SWSTART, // cr2
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static ADCConversionGroup adcgrpcfg_fast = {
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.circular = FALSE,
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.num_channels = 0,
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.end_cb = adc_callback_fast,
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.error_cb = nullptr,
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/* HW dependent part.*/
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.cr1 = 0,
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.cr2 = ADC_CR2_SWSTART,
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/**
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* here we configure all possible channels for fast mode. Some channels would not actually
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* be used hopefully that's fine to configure all possible channels.
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*
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*/
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// sample times for channels 10...18
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.smpr1 =
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ADC_SMPR1_SMP_AN10(ADC_SAMPLING_FAST) |
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ADC_SMPR1_SMP_AN11(ADC_SAMPLING_FAST) |
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ADC_SMPR1_SMP_AN12(ADC_SAMPLING_FAST) |
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ADC_SMPR1_SMP_AN13(ADC_SAMPLING_FAST) |
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ADC_SMPR1_SMP_AN14(ADC_SAMPLING_FAST) |
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ADC_SMPR1_SMP_AN15(ADC_SAMPLING_FAST)
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, // sample times for channels 10...18
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ADC_SMPR1_SMP_AN15(ADC_SAMPLING_FAST),
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// In this field must be specified the sample times for channels 0...9
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.smpr2 =
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ADC_SMPR2_SMP_AN0(ADC_SAMPLING_FAST) |
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ADC_SMPR2_SMP_AN1(ADC_SAMPLING_FAST) |
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ADC_SMPR2_SMP_AN2(ADC_SAMPLING_FAST) |
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@ -183,18 +192,13 @@ ADC_TwoSamplingDelay_5Cycles, // cr1
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ADC_SMPR2_SMP_AN6(ADC_SAMPLING_FAST) |
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ADC_SMPR2_SMP_AN7(ADC_SAMPLING_FAST) |
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ADC_SMPR2_SMP_AN8(ADC_SAMPLING_FAST) |
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ADC_SMPR2_SMP_AN9(ADC_SAMPLING_FAST), // In this field must be specified the sample times for channels 0...9
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0,
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0,
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0, // Conversion group sequence 13...16 + sequence length
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0, // Conversion group sequence 7...12
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0
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// Conversion group sequence 1...6
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};
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ADC_SMPR2_SMP_AN9(ADC_SAMPLING_FAST),
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.htr = 0,
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.ltr = 0,
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.sqr1 = 0, // Conversion group sequence 13...16 + sequence length
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.sqr2 = 0, // Conversion group sequence 7...12
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.sqr3 = 0 // Conversion group sequence 1...6
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};
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AdcDevice fastAdc(&adcgrpcfg_fast);
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@ -15,14 +15,6 @@ typedef enum {
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BOR_Level_3 = 3
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} BOR_Level_t;
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#ifndef ADC_TwoSamplingDelay_5Cycles
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#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
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#endif
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#ifndef ADC_TwoSamplingDelay_20Cycles
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#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
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#endif
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#ifndef ADC_CR2_SWSTART
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#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
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#endif
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@ -49,15 +49,6 @@ typedef enum {
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#define GPIO_AF_TIM9 3
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#endif
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// F4/F7 have the same ADC peripheral
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#ifndef ADC_TwoSamplingDelay_5Cycles
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#define ADC_TwoSamplingDelay_5Cycles ((uint32_t)0x00000000)
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#endif
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#ifndef ADC_TwoSamplingDelay_20Cycles
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#define ADC_TwoSamplingDelay_20Cycles ((uint32_t)0x00000F00)
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#endif
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#ifndef ADC_CR2_SWSTART
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#define ADC_CR2_SWSTART ((uint32_t)0x40000000)
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#endif
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