Updated J15 J20 per known_issues.txt 8) 9).

Moved several components to the front side, more will be moved. The goal is everything on the front.
Updated schematic symbol. It had an extra VPWR for some reason.
This commit is contained in:
jharvey 2020-05-28 06:39:41 -04:00
parent 347413e44b
commit 1c3e894077
5 changed files with 703 additions and 7223 deletions

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@ -400,7 +400,6 @@ X PGND 65 700 -3125 200 U 50 50 1 1 I
X START4 7 -200 3125 200 D 50 50 1 1 I
X START5 8 -100 3125 200 D 50 50 1 1 I
X START6 9 0 3125 200 D 50 50 1 1 I
X VPWR ~ 1300 -625 200 L 50 50 1 1 I
ENDDRAW
ENDDEF
#

File diff suppressed because it is too large Load Diff

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@ -5,8 +5,8 @@ $Descr B 17000 11000
encoding utf-8
Sheet 1 1
Title "Common Rail MC33816"
Date "2020-05-15"
Rev "0.3.1"
Date "2020-05-28"
Rev "0.3.2"
Comp "rusEFI.com"
Comment1 ""
Comment2 ""
@ -1810,7 +1810,7 @@ U 1 1 5A9A3046
P 10725 3800
F 0 "J10" H 10725 3865 50 0000 C CNN
F 1 "INJ_Term" H 10725 3730 50 0001 C CNN
F 2 "Terminal_Blocks:TerminalBlock_bornier-2_P5.08mm" V 3805 3950 60 0001 C CNN
F 2 "TerminalBlock:TerminalBlock_bornier-2_P5.08mm" V 3805 3950 60 0001 C CNN
F 3 "" H 7325 3975 60 0001 C CNN
F 4 "onshore,OSTTG025100B" V 3805 3950 60 0001 C CNN "MFG,MFG#"
F 5 "DIGI,ED2703-ND" V 3805 3950 60 0001 C CNN "VEND1,VEND1#"
@ -1824,7 +1824,7 @@ U 1 1 5A9A311B
P 12075 3800
F 0 "J11" H 12075 3860 50 0000 C CNN
F 1 "INJ_Term" H 12075 3730 50 0001 C CNN
F 2 "Terminal_Blocks:TerminalBlock_bornier-2_P5.08mm" V 3855 3950 60 0001 C CNN
F 2 "TerminalBlock:TerminalBlock_bornier-2_P5.08mm" V 3855 3950 60 0001 C CNN
F 3 "" H 7375 3975 60 0001 C CNN
F 4 "onshore,OSTTG025100B" V 3855 3950 60 0001 C CNN "MFG,MFG#"
F 5 "DIGI,ED2703-ND" V 3855 3950 60 0001 C CNN "VEND1,VEND1#"
@ -1838,7 +1838,7 @@ U 1 1 5A9A31DF
P 5825 3800
F 0 "J9" H 5825 3850 50 0000 C CNN
F 1 "INJ_Term" H 5825 3730 50 0001 C CNN
F 2 "Terminal_Blocks:TerminalBlock_bornier-2_P5.08mm" V 3805 3950 60 0001 C CNN
F 2 "TerminalBlock:TerminalBlock_bornier-2_P5.08mm" V 3805 3950 60 0001 C CNN
F 3 "" H 7325 3975 60 0001 C CNN
F 4 "onshore,OSTTG025100B" V 3805 3950 60 0001 C CNN "MFG,MFG#"
F 5 "DIGI,ED2703-ND" V 3805 3950 60 0001 C CNN "VEND1,VEND1#"
@ -1980,7 +1980,7 @@ U 1 1 5A9173F7
P 10825 700
F 0 "J15" H 10825 800 50 0000 C CNN
F 1 "CONN_01X01" V 10925 700 50 0001 C CNN
F 2 "Pin_Headers:Pin_Header_Straight_1x01_Pitch2.54mm" H 10825 700 50 0001 C CNN
F 2 "Connector_Pin:Pin_D1.4mm_L8.5mm_W2.8mm_FlatFork" H 10825 700 50 0001 C CNN
F 3 "" H 10825 700 50 0000 C CNN
1 10825 700
-1 0 0 1
@ -2002,7 +2002,7 @@ U 1 1 5CFBC5AF
P 11250 6050
F 0 "J20" H 11250 6150 50 0000 C CNN
F 1 "Conn_01x02" H 11250 5850 50 0001 C CNN
F 2 "Connect:PINHEAD1-2" H 11250 6050 50 0001 C CNN
F 2 "TerminalBlock:TerminalBlock_bornier-2_P5.08mm" H 11250 6050 50 0001 C CNN
F 3 "" H 11250 6050 50 0001 C CNN
F 4 "TE,282834-2" H 11250 6050 60 0001 C CNN "MFG,MFG#"
F 5 "DIGI,A98333-ND" H 11250 6050 60 0001 C CNN "VEND1,VEND1#"

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@ -5,8 +5,8 @@
5) RESOLVED IN R0.2 D9 had wrong footprint blah. Wrong pin numbers to wrong pins.
6) RESOLVED IN R0.2 D10 --> D10_2, and D11 --> D11_2 should be the same package, they were 2 different / wrong footprints.
7) RESOLVED IN R0.3 Moved several 0805 components to the back side of the PCB for lower cost assembly.
8) J15 needs silk and larger hole. J20 needs silk and should use same larger terminal as J8-J9-J10
9) J15 & J20 silk ^^^ should be on both top and bottom sides of the board
8) RESOLVED IN R0.3.2 J15 needs silk and larger hole. J20 needs silk and should use same larger terminal as J8-J9-J10
9) RESOLVED IN R0.3.2 J15 & J20 silk ^^^ should be on both top and bottom sides of the board
10) power LED. back side is pretty much free pre-assembled, front side is manual assembly. maybe one LED on each side?
11) J5&J6 why do we need as jumpers? Shall we connect those permanently since looks like those shall be connected?
12) move more small stuff to same (back) side

@ -1 +1 @@
Subproject commit 8ccf23ce3ee875c84edfd5cc041f4d02e8443ec8
Subproject commit 869aec5fc449d5c806b87b34ca52fecd9b1c02fe