mirror of https://github.com/rusefi/rusefi-1.git
gpio chips (#744)
* tle8888: fix building for stm32f765 * gpio-chips: add mc33972 driver
This commit is contained in:
dron0gus
rusefi
parent
a122451301
commit
2447f5ea1a
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@ -9,7 +9,8 @@ HW_LAYER_DRIVERS_CORE = \
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HW_LAYER_DRIVERS = \
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$(DRIVERS_DIR)/gpio/tle6240.c \
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$(DRIVERS_DIR)/gpio/tle8888.c
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$(DRIVERS_DIR)/gpio/tle8888.c \
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$(DRIVERS_DIR)/gpio/mc33972.c
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HW_LAYER_DRIVERS_CPP =
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@ -0,0 +1,380 @@
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/*
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* mc33972.c
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*
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* Multiple Switch Detection Interface with Suppressed Wake-up
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*
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* The 33972 Multiple Switch Detection Interface with suppressed
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* wake-up is designed to detect the closing and opening of up to 22
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* switch contacts: 14 switch to ground detection and 8 switch to
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* ground or battery detection,
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*
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* SPI protocol 3.3/5.0V
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*
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* @date Apr 07, 2019
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* @author Andrey Gusakov <dron0gus@gmail.com>, (c) 2019
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*/
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#include "global.h"
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#include "gpio/gpio_ext.h"
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#include "gpio/mc33972.h"
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#include "pin_repository.h"
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#ifndef BOARD_MC33972_COUNT
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#define BOARD_MC33972_COUNT 0
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#endif
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#if (BOARD_MC33972_COUNT > 0)
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/*
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* TODO list:
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* - add irq support with fallback to polling mode (now polling mode only)
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*/
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/*==========================================================================*/
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/* Driver local definitions. */
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/*==========================================================================*/
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#define DRIVER_NAME "mc33972"
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static bool drv_task_ready = false;
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typedef enum {
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MC33972_DISABLED = 0,
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MC33972_WAIT_INIT,
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MC33972_READY,
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MC33972_FAILED
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} mc33972_drv_state;
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/* all commands and reply data are 24 bit */
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#define CMD(cmd, data) (((cmd) << 16) | ((data) << 0))
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#define CMD_STATUS CMD(0x00, 0x00)
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#define CMD_SETTINGS(mask) CMD(0x01, (mask))
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#define CMD_WAKEUPEN(i, mask) CMD((i) ? 0x03 : 0x02, (mask))
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#define CMD_METALLIC(i, mask) CMD((i) ? 0x05 : 0x04, (mask))
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#define CMD_ANALOG(cur, ch) CMD(0x06, (((curr) & 0x3) << 5) | (((d) & 0x1f) << 0))
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#define CMD_WETTING_TMR(i, mask) CMD((i) ? 0x08 : 0x07, (mask))
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#define CMD_TRI_STATE(i, mask) CMD((i) ? 0x0a : 0x09, (mask))
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#define CMD_CALIB CMD(0x0b, 0x00)
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#define CMD_SLEEP(int_t, scan_t) CMD(0x0c, (((int_t) & 0x7) << 3) | (((scan_t) & 0x7) << 0))
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#define CMD_RST CMD(0x7f, 0x00)
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/* reply is allways same 24 status bits */
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#define FLAG_THERM (1 << 23)
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#define FLAG_INT (1 << 22)
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/* from LSB to MSB: SG0..SG13, SP0..SP7 */
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#define FLAG_PIN(pin) (1 << (pin))
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/*==========================================================================*/
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/* Driver exported variables. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver local variables and types. */
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/*==========================================================================*/
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/* OS */
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SEMAPHORE_DECL(mc33972_wake, 10 /* or BOARD_MC33972_COUNT ? */);
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static THD_WORKING_AREA(mc33972_thread_1_wa, 256);
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/* Driver */
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struct mc33972_priv {
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const struct mc33972_config *cfg;
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/* last input state from chip */
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uint32_t i_state;
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/* currently selected analog input */
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uint8_t analog_ch;
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mc33972_drv_state drv_state;
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};
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static struct mc33972_priv chips[BOARD_MC33972_COUNT];
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/*==========================================================================*/
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/* Driver local functions. */
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/*==========================================================================*/
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static SPIDriver *get_bus(struct mc33972_priv *chip)
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{
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/* return non-const SPIDriver* from const struct cfg */
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return chip->cfg->spi_bus;
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}
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/**
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* @brief MC33972 send cmd routine.
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* @details Sends 24 bits of data. CS asserted before and released
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* after transaction. Chip allways reply with input state + 2 bits
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* of diagnostic. This routine save it to chip->i_state
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*/
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static int mc33972_spi_w(struct mc33972_priv *chip, uint32_t tx)
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{
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int i;
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uint8_t rxb[3];
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uint8_t txb[3];
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SPIDriver *spi = get_bus(chip);
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txb[0] = (tx >> 16) & 0xff;
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txb[1] = (tx >> 8) & 0xff;
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txb[2] = (tx >> 0) & 0xff;
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/* Acquire ownership of the bus. */
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spiAcquireBus(spi);
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/* Setup transfer parameters. */
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spiStart(spi, &chip->cfg->spi_config);
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/* Slave Select assertion. */
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spiSelect(spi);
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/* Atomic transfer operations. */
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/* TODO: check why spiExchange transfers invalid data on STM32F7xx, DMA issue? */
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//spiExchange(spi, 3, txb, rxb);
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for (i = 0; i < 3; i++)
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rxb[i] = spiPolledExchange(spi, txb[i]);
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/* Slave Select de-assertion. */
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spiUnselect(spi);
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/* Ownership release. */
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spiReleaseBus(spi);
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/* save received data */
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chip->i_state = (rxb[0] << 16) | (rxb[1] << 8) | (rxb[2] << 0);
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/* no errors for now */
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return 0;
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}
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/**
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* @brief MC33972 update status
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* @details Chip reply with input data and two bits of diag
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*/
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static int mc33972_update_status(struct mc33972_priv *chip)
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{
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int ret;
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/* TODO: lock? */
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ret = mc33972_spi_w(chip, CMD_STATUS);
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/* TODO: unlock? */
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return ret;
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}
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/**
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* @brief MC33972 chip init.
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* @details There is no way to check communication.
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* Performs reset.
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*/
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static int mc33972_chip_init(struct mc33972_priv *chip)
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{
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int ret;
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ret = mc33972_spi_w(chip, CMD_RST);
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if (ret)
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goto err;
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/* is it enought? */
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chThdSleepMilliseconds(3);
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/*
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* Default settings from Power-ON Reset via V PWR or the
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* Reset Command are as follows:
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* * Programmable switch – set to switch to battery
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* * All inputs set as wake-up
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* * Wetting current on (16 mA)
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* * Wetting current timer on (20 ms)
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* * All inputs tri-state
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* * Analog select 00000 (no input channel selected)
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*/
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/* disable tri-state */
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ret = mc33972_spi_w(chip, CMD_TRI_STATE(0, 0));
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ret |= mc33972_spi_w(chip, CMD_TRI_STATE(1, 0));
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if (ret)
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goto err;
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/* Set wetting current to 2 mA */
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ret = mc33972_spi_w(chip, CMD_METALLIC(0, 0));
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ret |= mc33972_spi_w(chip, CMD_METALLIC(1, 0));
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if (ret)
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goto err;
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err:
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return ret;
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}
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/**
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* @brief MC33972 chip driver wakeup.
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* @details Wake up driver. Will cause input and diagnostic
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* update
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*/
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static int mc33972_wake_driver(struct mc33972_priv *chip)
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{
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(void)chip;
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chSemSignal(&mc33972_wake);
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return 0;
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}
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/*==========================================================================*/
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/* Driver thread. */
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/*==========================================================================*/
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static THD_FUNCTION(mc33972_driver_thread, p)
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{
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int i;
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msg_t msg;
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(void)p;
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chRegSetThreadName(DRIVER_NAME);
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while(1) {
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msg = chSemWaitTimeout(&mc33972_wake, TIME_MS2I(MC33972_POLL_INTERVAL_MS));
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/* should we care about msg == MSG_TIMEOUT? */
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(void)msg;
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for (i = 0; i < BOARD_MC33972_COUNT; i++) {
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int ret;
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struct mc33972_priv *chip;
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chip = &chips[i];
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if ((chip->cfg == NULL) ||
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(chip->drv_state == MC33972_DISABLED) ||
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(chip->drv_state == MC33972_FAILED))
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continue;
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ret = mc33972_update_status(chip);
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if (ret) {
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/* set state to MC33972_FAILED? */
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}
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}
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}
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}
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/*==========================================================================*/
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/* Driver interrupt handlers. */
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/*==========================================================================*/
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/* TODO: add IRQ support */
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/*==========================================================================*/
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/* Driver exported functions. */
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/*==========================================================================*/
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int mc33972_readPad(void *data, unsigned int pin)
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{
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struct mc33972_priv *chip;
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if ((pin >= MC33972_INPUTS) || (data == NULL))
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return -1;
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chip = (struct mc33972_priv *)data;
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/* convert to some common enum? */
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return !!(chip->i_state & FLAG_PIN(pin));
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}
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int mc33972_getDiag(void *data, unsigned int pin)
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{
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int diag;
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struct mc33972_priv *chip;
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if ((pin >= MC33972_INPUTS) || (data == NULL))
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return -1;
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chip = (struct mc33972_priv *)data;
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/* one diag for all pins */
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diag = !!(chip->i_state & FLAG_THERM);
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/* convert to some common enum? */
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return diag;
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}
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int mc33972_init(void * data)
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{
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int ret;
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struct mc33972_priv *chip;
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const struct mc33972_config *cfg;
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chip = (struct mc33972_priv *)data;
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cfg = chip->cfg;
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/* mark pins used */
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ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS");
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ret = mc33972_chip_init(chip);
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if (ret)
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return ret;
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chip->drv_state = MC33972_READY;
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if (!drv_task_ready) {
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chThdCreateStatic(mc33972_thread_1_wa, sizeof(mc33972_thread_1_wa),
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NORMALPRIO + 1, mc33972_driver_thread, NULL);
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drv_task_ready = true;
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}
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return 0;
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}
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int mc33972_deinit(void *data)
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{
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(void)data;
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/* TODO: set all pins to inactive state, stop task? */
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return 0;
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}
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struct gpiochip_ops mc33972_ops = {
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.writePad = NULL, /* chip input only */
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.readPad = mc33972_readPad,
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.getDiag = mc33972_getDiag,
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.init = mc33972_init,
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.deinit = mc33972_deinit,
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};
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/**
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* @brief MC33972 driver add.
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* @details Checks for valid config
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*/
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int mc33972_add(unsigned int index, const struct mc33972_config *cfg)
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{
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struct mc33972_priv *chip;
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/* no config or no such chip */
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osalDbgCheck((cfg != NULL) && (cfg->spi_bus != NULL) && (index < BOARD_MC33972_COUNT));
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/* check for valid cs.
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* DOTO: remove this check? CS can be driven by SPI */
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if (cfg->spi_config.ssport == NULL)
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return -1;
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chip = &chips[index];
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/* already initted? */
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if (chip->cfg != NULL)
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return -1;
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chip->cfg = cfg;
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chip->i_state = 0;
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chip->drv_state = MC33972_WAIT_INIT;
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/* register, return gpio chip base */
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return gpiochip_register(DRIVER_NAME, &mc33972_ops, MC33972_INPUTS, chip);
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}
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#else /* BOARD_MC33972_COUNT > 0 */
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int mc33972_add(unsigned int index, const struct mc33972_config *cfg)
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{
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(void)index; (void)cfg;
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return -1;
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}
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#endif /* BOARD_MC33972_COUNT */
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@ -0,0 +1,36 @@
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/*
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* mc33972.h
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*
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* Multiple Switch Detection Interface with Suppressed Wake-up
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*
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* @date Apr 07, 2019
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* @author Andrey Gusakov <dron0gus@gmail.com>, (c) 2019
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*/
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#ifndef HW_LAYER_MC33972_H_
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#define HW_LAYER_MC33972_H_
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#include <hal.h>
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#define MC33972_INPUTS 22
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/* DOTO: add irq support */
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#define MC33972_POLL_INTERVAL_MS 100
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struct mc33972_config {
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SPIDriver *spi_bus;
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const SPIConfig spi_config;
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};
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#ifdef __cplusplus
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extern "C"
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{
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#endif /* __cplusplus */
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int mc33972_add(unsigned int index, const struct mc33972_config *cfg);
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* HW_LAYER_MC33972_H_ */
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@ -306,7 +306,7 @@ static struct tle8888_config tle8888_cfg = {
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SPI_CR1_CPHA |
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0,
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.cr2 = 0
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#elif defined(STM32F767xx) || defined(STM32F746xx)
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#elif defined (STM32F765xx) || defined(STM32F767xx) || defined(STM32F746xx)
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.cr1 =
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SPI_CR1_SSM |
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SPI_CR1_SSI |
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