ADC: correctly calculate cache invalidate range for STM32F7xxx (#2021)

Bug was introduced in 2312b0ae57 when
sample buffer was moved out of class. So sample become adcsample_t*
instead of adcsample_t[] and sizeof returns 4.
This commit is contained in:
Andrey G 2020-12-05 18:14:33 +03:00 committed by GitHub
parent 852fdcd4d1
commit 2b5fc79aa7
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2 changed files with 7 additions and 5 deletions

View File

@ -20,7 +20,7 @@ typedef struct {
class AdcDevice {
public:
explicit AdcDevice(ADCConversionGroup* hwConfig, adcsample_t *buf);
explicit AdcDevice(ADCConversionGroup* hwConfig, adcsample_t *buf, size_t buf_len);
void enableChannel(adc_channel_e hwChannelIndex);
void enableChannelAndPin(const char *msg, adc_channel_e hwChannelIndex);
adc_channel_e getAdcHardwareIndexByInternalIndex(int index) const;
@ -34,6 +34,7 @@ public:
void invalidateSamplesCache();
adcsample_t *samples;
size_t buf_len;
int getAdcValueByHwChannel(adc_channel_e hwChannel) const;

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@ -61,9 +61,10 @@ float getVoltage(const char *msg, adc_channel_e hwChannel DECLARE_ENGINE_PARAMET
return adcToVolts(getAdcValue(msg, hwChannel));
}
AdcDevice::AdcDevice(ADCConversionGroup* hwConfig, adcsample_t *buf) {
AdcDevice::AdcDevice(ADCConversionGroup* hwConfig, adcsample_t *buf, size_t buf_len) {
this->hwConfig = hwConfig;
this->samples = buf;
this->buf_len = buf_len;
hwConfig->sqr1 = 0;
hwConfig->sqr2 = 0;
@ -170,7 +171,7 @@ static ADCConversionGroup adcgrpcfgSlow = {
#endif /* ADC_MAX_CHANNELS_COUNT */
};
AdcDevice slowAdc(&adcgrpcfgSlow, slowAdcSampleBuf);
AdcDevice slowAdc(&adcgrpcfgSlow, slowAdcSampleBuf, ARRAY_SIZE(slowAdcSampleBuf));
void adc_callback_fast(ADCDriver *adcp, adcsample_t *buffer, size_t n);
@ -218,7 +219,7 @@ static ADCConversionGroup adcgrpcfgFast = {
#endif /* ADC_MAX_CHANNELS_COUNT */
};
AdcDevice fastAdc(&adcgrpcfgFast, fastAdcSampleBuf);
AdcDevice fastAdc(&adcgrpcfgFast, fastAdcSampleBuf, ARRAY_SIZE(fastAdcSampleBuf));
#if HAL_USE_GPT
static void fast_adc_callback(GPTDriver*) {
@ -331,7 +332,7 @@ void AdcDevice::invalidateSamplesCache() {
// anything like a CCI that maintains coherency across multiple bus masters.
// As a result, we have to manually invalidate the D-cache any time we (the CPU)
// would like to read something that somebody else wrote (ADC via DMA, in this case)
SCB_InvalidateDCache_by_Addr(reinterpret_cast<uint32_t*>(samples), sizeof(samples));
SCB_InvalidateDCache_by_Addr(reinterpret_cast<uint32_t*>(samples), sizeof(*samples) * buf_len);
#endif /* STM32F7XX */
}