use full memory on STM32F42x (#2450)

* linker script

* hook it up

firmware/config/boards/proteus/board.mk

@@ -9,6 +9,10 @@ ifeq ($(PROJECT_CPU),ARCH_STM32F7)
   PROTEUS_LEGACY = TRUE
 endif
 
+ifeq ($(PROJECT_CPU),ARCH_STM32F4)
+  IS_STM32F429 = yes
+endif
+
 # Override DEFAULT_ENGINE_TYPE
 DDEFS += -DEFI_USE_OSC=TRUE
 DDEFS += -DLED_CRITICAL_ERROR_BRAIN_PIN=GPIOE_3

firmware/config/stm32f4ems/efifeatures.h

@@ -263,6 +263,11 @@
 
 #define EFI_CONSOLE_USB_DEVICE SDU1
 
+// F42x has more memory, so we can use compressed USB MSD image (requires 32k of memory)
+#ifdef EFI_IS_F42x
+#define EFI_USE_COMPRESSED_INI_MSD
+#endif
+
 #ifndef EFI_ENGINE_SNIFFER
 #define EFI_ENGINE_SNIFFER TRUE
 #endif

firmware/hw_layer/ports/stm32/stm32f4/STM32F4.ld

@@ -15,10 +15,16 @@
 */
 
 /*
- * STM32F405xG memory setup.
+ * STM32F4 memory setup.
  * Note: Use of ram1 and ram2 is mutually exclusive with use of ram0.
- * 'bl' is related to rusefi bootloader
+ * bl section is where we link the rusefi bootloader
  */
+
+/* On devices with 256K RAM, use additional memory SRAM3. */
+/* STM32F40x do not have SRAM3 */
+/* STM32F42x and F46x have SRAM3 */
+RAM3_SIZE = DEFINED(STM32F4_HAS_SRAM3) ? 64k : 0;
+
 MEMORY
 {
     bl      : org = 0x08000000, len = 16k     /* bootloader section */
@@ -30,10 +36,10 @@ MEMORY
     flash5  : org = 0x00000000, len = 0
     flash6  : org = 0x00000000, len = 0
     flash7  : org = 0x00000000, len = 0
-    ram0    : org = 0x20000000, len = 128k      /* SRAM1 + SRAM2 */
+    ram0    : org = 0x20000000, len = 128k + RAM3_SIZE /* SRAM1 + SRAM2 + SRAM3 (optionally) */
     ram1    : org = 0x20000000, len = 112k      /* SRAM1 */
     ram2    : org = 0x2001C000, len = 16k       /* SRAM2 */
-    ram3    : org = 0x00000000, len = 0
+    ram3    : org = 0x20020000, len = RAM3_SIZE /* SRAM3 note: this will be 0 size on F40x devices */
     ram4    : org = 0x10000000, len = 64k       /* CCM SRAM */
     ram5    : org = 0x40024000, len = 4k        /* BCKP SRAM */
     ram6    : org = 0x00000000, len = 0

firmware/hw_layer/ports/stm32/stm32f4/hw_ports.mk

@@ -8,9 +8,15 @@ HW_LAYER_EMS_CPP += $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/mpu_util.cpp \
 
 DDEFS += -DSTM32F407xx
 MCU = cortex-m4
-LDSCRIPT = $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/STM32F405xG.ld
+LDSCRIPT = $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/STM32F4.ld
 ALLCSRC += $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.c
 CONFDIR = $(PROJECT_DIR)/hw_layer/ports/stm32/stm32f4/cfg
 
+# STM32F42x has extra memory, so change some flags so we can use it.
+ifeq ($(IS_STM32F429),yes)
+	USE_OPT += -Wl,--defsym=STM32F4_HAS_SRAM3=1
+	DDEFS += -DEFI_IS_F42x
+endif
+
 # TODO: remove, for efifeatures.h
 ALLINC += $(PROJECT_DIR)/config/stm32f4ems