From 5b728cadb36a2631bf086f6bdfa380ffb7407028 Mon Sep 17 00:00:00 2001 From: rusefi Date: Sun, 23 Jun 2019 10:34:49 -0400 Subject: [PATCH] fixing F4 compilation --- firmware/hw_layer/adc_inputs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/hw_layer/adc_inputs.cpp b/firmware/hw_layer/adc_inputs.cpp index 91a999a314..91d323bbb3 100644 --- a/firmware/hw_layer/adc_inputs.cpp +++ b/firmware/hw_layer/adc_inputs.cpp @@ -343,7 +343,7 @@ int AdcDevice::getAdcValueByIndex(int internalIndex) const { } void AdcDevice::invalidateSamplesCache() { -#if PROJECT_CPU == ARCH_STM32F7 +#if defined(STM32F7XX) // The STM32F7xx has a data cache // DMA operations DO NOT invalidate cache lines, since the ARM m7 doesn't have // anything like a CCI that maintains coherency across multiple bus masters.