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rusefi-1
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This commit is contained in:
rusEfi 2015-01-10 10:04:53 -06:00
parent 2b9dff6d3d
commit a3584ca70b
13 changed files with 105 additions and 85 deletions
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4
firmware/.cproject
View File

@ -205,7 +205,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="chibios/os/hal/platforms/STM32/USBv1|chibios/os/hal/platforms/STM32/RTCv1|chibios/os/hal/platforms/STM32/GPIOv1|chibios/os/ports/GCC/ARMCMx/STM32F1xx|chibios/os/hal/platforms/STM32F1xx|chibios/boards/ST_NUCLEO_F103RB|config/stm32f0egt|egt2can.cpp|chibios/boards/simulator|chibios/boards/OLIMEX_STM32_E407|chibios/boards/ST_STM32F0_DISCOVERY|chibios/os/ports/GCC/ARMCMx/STM32F0xx|hw_layer/stm32f0|chibios/os/hal/platforms/STM32/I2Cv2|chibios/os/hal/platforms/STM32/SPIv2|chibios/os/hal/platforms/STM32/USARTv2|chibios/os/ports/IAR|chibios/os/hal/platforms/STM32F0xx|chibios/os/hal/platforms/Win32|chibios/os/ports/GCC/ARMCMx/chcore_v6m.c|chibios/os/ports/GCC/SIMIA32|chibios/os/ports/IAR/ARMCMx/chcore_v6m.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="hw_layer/stm32f1|chibios/os/hal/platforms/STM32/USBv1|chibios/os/hal/platforms/STM32/RTCv1|chibios/os/hal/platforms/STM32/GPIOv1|chibios/os/ports/GCC/ARMCMx/STM32F1xx|chibios/os/hal/platforms/STM32F1xx|chibios/boards/ST_NUCLEO_F103RB|config/stm32f0egt|egt2can.cpp|chibios/boards/simulator|chibios/boards/OLIMEX_STM32_E407|chibios/boards/ST_STM32F0_DISCOVERY|chibios/os/ports/GCC/ARMCMx/STM32F0xx|hw_layer/stm32f0|chibios/os/hal/platforms/STM32/I2Cv2|chibios/os/hal/platforms/STM32/SPIv2|chibios/os/hal/platforms/STM32/USARTv2|chibios/os/ports/IAR|chibios/os/hal/platforms/STM32F0xx|chibios/os/hal/platforms/Win32|chibios/os/ports/GCC/ARMCMx/chcore_v6m.c|chibios/os/ports/GCC/SIMIA32|chibios/os/ports/IAR/ARMCMx/chcore_v6m.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>
@ -288,7 +288,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="chibios/os/hal/platforms/STM32/USBv1|chibios/os/hal/platforms/STM32/RTCv1|chibios/os/hal/platforms/STM32/GPIOv1|chibios/os/ports/GCC/ARMCMx/STM32F1xx|chibios/os/hal/platforms/STM32F1xx|chibios/boards/ST_NUCLEO_F103RB|config/stm32f0egt|egt2can.cpp|chibios/boards/simulator|chibios/boards/OLIMEX_STM32_E407|chibios/boards/ST_STM32F0_DISCOVERY|chibios/os/ports/GCC/ARMCMx/STM32F0xx|hw_layer/stm32f0|chibios/os/hal/platforms/STM32/I2Cv2|chibios/os/hal/platforms/STM32/SPIv2|chibios/os/hal/platforms/STM32/USARTv2|chibios/os/ports/IAR|chibios/os/hal/platforms/STM32F0xx|chibios/os/hal/platforms/Win32|chibios/os/ports/GCC/ARMCMx/chcore_v6m.c|chibios/os/ports/GCC/SIMIA32|chibios/os/ports/IAR/ARMCMx/chcore_v6m.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="hw_layer/stm32f1|chibios/os/hal/platforms/STM32/USBv1|chibios/os/hal/platforms/STM32/RTCv1|chibios/os/hal/platforms/STM32/GPIOv1|chibios/os/ports/GCC/ARMCMx/STM32F1xx|chibios/os/hal/platforms/STM32F1xx|chibios/boards/ST_NUCLEO_F103RB|config/stm32f0egt|egt2can.cpp|chibios/boards/simulator|chibios/boards/OLIMEX_STM32_E407|chibios/boards/ST_STM32F0_DISCOVERY|chibios/os/ports/GCC/ARMCMx/STM32F0xx|hw_layer/stm32f0|chibios/os/hal/platforms/STM32/I2Cv2|chibios/os/hal/platforms/STM32/SPIv2|chibios/os/hal/platforms/STM32/USARTv2|chibios/os/ports/IAR|chibios/os/hal/platforms/STM32F0xx|chibios/os/hal/platforms/Win32|chibios/os/ports/GCC/ARMCMx/chcore_v6m.c|chibios/os/ports/GCC/SIMIA32|chibios/os/ports/IAR/ARMCMx/chcore_v6m.c" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>

13
firmware/config/stm32f1egt/mpu_util.h
View File

@ -1,13 +0,0 @@
/*
* mpu_util.h
*
* Created on: Jan 8, 2015
* Author: Andrey
*/
#ifndef CONFIG_STM32F1EGT_MPU_UTIL_H_
#define CONFIG_STM32F1EGT_MPU_UTIL_H_
#define baseHardwareInit() {}
#endif /* CONFIG_STM32F1EGT_MPU_UTIL_H_ */

1
firmware/development/hw_layer/poten.c
View File

@ -12,6 +12,7 @@
#include "pin_repository.h"
#include "engine_configuration.h"
#include "hardware.h"
#include "mpu_util.h"
/**
* MCP42010 digital potentiometer driver

14
firmware/egt2can.cpp
View File

@ -7,8 +7,6 @@ egt_cs_array_t max31855_cs;
int main_loop_started;
int maxNesting = 0;
void firmwareError(const char *fmt, ...) {
}
@ -30,18 +28,6 @@ static msg_t Thread1(void *arg) {
return 0;
}
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
spiConfig->end_cb = NULL;
// ioportid_t port = getHwPort(csPin);
// ioportmask_t pin = getHwPin(csPin);
// spiConfig->ssport = port;
// spiConfig->sspad = pin;
// mySetPadMode("chip select", port, pin, PAL_STM32_MODE_OUTPUT);
}
void runRusEfi(void) {
#if EFI_USE_UART_FOR_CONSOLE

2
firmware/hw_layer/HIP9011.cpp
View File

@ -153,7 +153,7 @@ static void showHipInfo(void) {
printSpiState(&logger, boardConfiguration);
scheduleMsg(&logger, "bore=%f freq=%f", engineConfiguration->cylinderBore, BAND(engineConfiguration->cylinderBore));
scheduleMsg(&logger, "band_index=%d gain_index=%d", bandIndex, currentGainIndex);
scheduleMsg(&logger, "band_index=%d gain %f/index=%d", bandIndex, boardConfiguration->hip9011Gain, currentGainIndex);
scheduleMsg(&logger, "integrator index=%d", currentIntergratorIndex);
scheduleMsg(&logger, "spi= int=%s response count=%d", hwPortname(boardConfiguration->hip9011IntHoldPin), nonZeroResponse);

51
firmware/hw_layer/hardware.cpp
View File

@ -57,15 +57,6 @@ int maxNesting = 0;
#if HAL_USE_SPI || defined(__DOXYGEN__)
static bool isSpiInitialized[5] = { false, false, false, false, false };
static void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso,
brain_pin_e mosi, int af) {
mySetPadMode2("SPI clock", sck, PAL_MODE_ALTERNATE(af));
mySetPadMode2("SPI master out", mosi, PAL_MODE_ALTERNATE(af));
mySetPadMode2("SPI master in ", miso, PAL_MODE_ALTERNATE(af));
}
/**
* Only one consumer can use SPI bus at a given time
*/
@ -78,39 +69,6 @@ void unlockSpi(void) {
chMtxUnlock();
}
void turnOnSpi(spi_device_e device) {
if (isSpiInitialized[device])
return; // already initialized
isSpiInitialized[device] = true;
if (device == SPI_DEVICE_1) {
#if STM32_SPI_USE_SPI1
// scheduleMsg(&logging, "Turning on SPI1 pins");
initSpiModule(&SPID1, boardConfiguration->spi1sckPin,
boardConfiguration->spi1misoPin,
boardConfiguration->spi1mosiPin,
EFI_SPI1_AF);
#endif /* STM32_SPI_USE_SPI1 */
}
if (device == SPI_DEVICE_2) {
#if STM32_SPI_USE_SPI2
// scheduleMsg(&logging, "Turning on SPI2 pins");
initSpiModule(&SPID2, boardConfiguration->spi2sckPin,
boardConfiguration->spi2misoPin,
boardConfiguration->spi2mosiPin,
EFI_SPI2_AF);
#endif /* STM32_SPI_USE_SPI2 */
}
if (device == SPI_DEVICE_3) {
#if STM32_SPI_USE_SPI3
// scheduleMsg(&logging, "Turning on SPI3 pins");
initSpiModule(&SPID3, boardConfiguration->spi3sckPin,
boardConfiguration->spi3misoPin,
boardConfiguration->spi3mosiPin,
EFI_SPI3_AF);
#endif /* STM32_SPI_USE_SPI3 */
}
}
static void initSpiModules(board_configuration_s *boardConfiguration) {
if (boardConfiguration->is_enabled_spi_2) {
turnOnSpi(SPI_DEVICE_2);
@ -142,15 +100,6 @@ SPIDriver * getSpiDevice(spi_device_e spiDevice) {
firmwareError("Unexpected SPI device: %d", spiDevice);
return NULL;
}
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
spiConfig->end_cb = NULL;
ioportid_t port = getHwPort(csPin);
ioportmask_t pin = getHwPin(csPin);
spiConfig->ssport = port;
spiConfig->sspad = pin;
mySetPadMode("chip select", port, pin, PAL_STM32_MODE_OUTPUT);
}
#endif
#if HAL_USE_I2C || defined(__DOXYGEN__)

1
firmware/hw_layer/hardware.h
View File

@ -37,7 +37,6 @@ extern "C"
#endif /* __cplusplus */
SPIDriver * getSpiDevice(spi_device_e spiDevice);
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin);
void turnOnSpi(spi_device_e device);
void lockSpi(spi_device_e device);
void unlockSpi(void);

1
firmware/hw_layer/max31855.cpp
View File

@ -16,6 +16,7 @@
#include "max31855.h"
#include "hardware.h"
#include "mpu_util.h"
#if EFI_PROD_CODE
#include "settings.h"

17
firmware/hw_layer/stm32f1/mpu_util.h Normal file
View File

@ -0,0 +1,17 @@
/*
* @file mpu_util.h
*
* @date Jan 8, 2015
* @author Andrey Belomutskiy, (c) 2012-2014
*/
#ifndef CONFIG_STM32F1EGT_MPU_UTIL_H_
#define CONFIG_STM32F1EGT_MPU_UTIL_H_
#include "main.h"
#define baseHardwareInit() {}
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin);
#endif /* CONFIG_STM32F1EGT_MPU_UTIL_H_ */

75
firmware/hw_layer/stm32f4/mpu_util.cpp
View File

@ -8,6 +8,10 @@
#include "main.h"
#include "mpu_util.h"
#include "error_handling.h"
#include "engine.h"
#include "pin_repository.h"
EXTERN_ENGINE;
extern "C" {
int getRemainingStack(Thread *otp);
@ -197,3 +201,74 @@ void HardFaultVector(void) {
}
}
#if HAL_USE_SPI || defined(__DOXYGEN__)
static bool isSpiInitialized[5] = { false, false, false, false, false };
static int getSpiAf(SPIDriver *driver) {
#if STM32_SPI_USE_SPI1
if (driver == &SPID1) {
return EFI_SPI1_AF;
}
#endif
#if STM32_SPI_USE_SPI2
if (driver == &SPID2) {
return EFI_SPI2_AF;
}
#endif
#if STM32_SPI_USE_SPI3
if (driver == &SPID3) {
return EFI_SPI3_AF;
}
#endif
return -1;
}
void turnOnSpi(spi_device_e device) {
if (isSpiInitialized[device])
return; // already initialized
isSpiInitialized[device] = true;
if (device == SPI_DEVICE_1) {
#if STM32_SPI_USE_SPI1
// scheduleMsg(&logging, "Turning on SPI1 pins");
initSpiModule(&SPID1, boardConfiguration->spi1sckPin,
boardConfiguration->spi1misoPin,
boardConfiguration->spi1mosiPin);
#endif /* STM32_SPI_USE_SPI1 */
}
if (device == SPI_DEVICE_2) {
#if STM32_SPI_USE_SPI2
// scheduleMsg(&logging, "Turning on SPI2 pins");
initSpiModule(&SPID2, boardConfiguration->spi2sckPin,
boardConfiguration->spi2misoPin,
boardConfiguration->spi2mosiPin);
#endif /* STM32_SPI_USE_SPI2 */
}
if (device == SPI_DEVICE_3) {
#if STM32_SPI_USE_SPI3
// scheduleMsg(&logging, "Turning on SPI3 pins");
initSpiModule(&SPID3, boardConfiguration->spi3sckPin,
boardConfiguration->spi3misoPin,
boardConfiguration->spi3mosiPin);
#endif /* STM32_SPI_USE_SPI3 */
}
}
void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso,
brain_pin_e mosi) {
mySetPadMode2("SPI clock", sck, PAL_MODE_ALTERNATE(getSpiAf(driver)));
mySetPadMode2("SPI master out", mosi, PAL_MODE_ALTERNATE(getSpiAf(driver)));
mySetPadMode2("SPI master in ", miso, PAL_MODE_ALTERNATE(getSpiAf(driver)));
}
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
spiConfig->end_cb = NULL;
ioportid_t port = getHwPort(csPin);
ioportmask_t pin = getHwPin(csPin);
spiConfig->ssport = port;
spiConfig->sspad = pin;
mySetPadMode("chip select", port, pin, PAL_STM32_MODE_OUTPUT);
}
#endif

5
firmware/hw_layer/stm32f4/mpu_util.h
View File

@ -57,6 +57,11 @@ void DebugMonitorVector(void);
void UsageFaultVector(void);
void BusFaultVector(void);
void HardFaultVector(void);
void turnOnSpi(spi_device_e device);
void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso,
brain_pin_e mosi);
void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin);
void turnOnSpi(spi_device_e device);
#ifdef __cplusplus
}

2
firmware/rusefi.cpp
View File

@ -268,5 +268,5 @@ int getRusEfiVersion(void) {
return 1; // this is here to make the compiler happy about the unused array
if (UNUSED_CCM_SIZE == 0)
return 1; // this is here to make the compiler happy about the unused array
return 20150109;
return 20150110;
}

4
firmware/svnversion.h
View File

@ -1,5 +1,5 @@
// This file was generated by Version2Header
// Thu Jan 01 15:21:19 EST 2015
// Sat Jan 10 10:38:47 EST 2015
#ifndef VCS_VERSION
#define VCS_VERSION "6083"
#define VCS_VERSION "6259"
#endif