mirror of https://github.com/rusefi/rusefi-1.git
manual sync with https://github.com/NOx-z/rusefi/tree/mc33816_spi
This commit is contained in:
rusefi
parent
97a557a57e
commit
c031252c75
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@ -25,6 +25,8 @@
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EXTERN_CONFIG;
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static OutputPin chipSelect;
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static OutputPin resetB;
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static OutputPin driven;
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static SPIConfig spiCfg = { .circular = false,
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.end_cb = NULL,
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@ -34,8 +36,8 @@ static SPIConfig spiCfg = { .circular = false,
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SPI_CR1_16BIT_MODE |
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SPI_CR1_MSTR |
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//SPI_CR1_BR_1 // 5MHz
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SPI_CR1_CPHA | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_BR_2,
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.cr2 = 0};
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SPI_CR1_CPHA | SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_BR_2 | SPI_CR1_SPE,
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.cr2 = SPI_CR2_SSOE};
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static SPIDriver *driver;
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@ -44,15 +46,219 @@ static void showStats() {
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}
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static void send_16bit_SPI(short param) {
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spiSelect(driver);
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// we are in 16 bit mode so '1' means 16 bits word hopefully?
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// Mostly unused
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unsigned short recv_16bit_spi() {
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unsigned short ret;
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//spiSelect(driver);
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spiReceive(driver, 1, &ret);
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//spiUnselect(driver);
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return ret;
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}
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// This could be used to detect if check byte is wrong.. or use a FLAG after init
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unsigned short txrx_16bit_spi(const unsigned short param) {
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unsigned short ret;
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//spiSelect(driver);
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spiExchange(driver, 1, ¶m, &ret);
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//spiUnselect(driver);
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return ret;
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}
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// Send 16bits
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static void spi_writew(unsigned short param) {
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//spiSelect(driver);
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spiSend(driver, 1, ¶m);
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//spiUnselect(driver);
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}
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static unsigned short id() {
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spiSelect(driver);
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spi_writew(0xBAA1);
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unsigned short ID = recv_16bit_spi();
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spiUnselect(driver);
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return ID;
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}
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static void setup_spi() {
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spiSelect(driver);
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// Select Channel command
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spi_writew(0x7FE1);
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// Common Page
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spi_writew(0x0004);
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// Configure SPI command
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spi_writew(0x3901);
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// Mode A + Watchdog timer full
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//spi_writew(0x001F);
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spi_writew(0x009F); // + fast slew rate on miso
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spiUnselect(driver);
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}
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static void sentWord(int word) {
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send_16bit_SPI(word);
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static void enable_flash()
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{
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spiSelect(driver);
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spi_writew(0x2001); //ch1
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spi_writew(0x0018); //enable flash
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spi_writew(0x2401); //ch2
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spi_writew(0x0018); // enable flash
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spiUnselect(driver);
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}
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static void download_RAM(int target) {
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unsigned short memory_area = 0; // memory area
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unsigned short start_address = 0; // start address
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unsigned short codeWidthRegAddr = 0; // code width register address
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unsigned short size = 0; // size of RAM data
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unsigned short command = 0; // command data
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unsigned short data = 0; // RAM data
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unsigned int k = 0; // used in loop for writing RAM data to the chip
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const unsigned short *RAM_ptr; // pointer to array of data to be sent to the chip
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//Why Again? For Every time, just in case?
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setup_spi();
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switch(target) // selects target
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{
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case CODE_RAM1:
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memory_area = 0x1;
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start_address = 0;
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codeWidthRegAddr = 0x107;
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RAM_ptr = MC33816_code_RAM1;
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size = sizeof(MC33816_code_RAM1) / 2;
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break;
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case CODE_RAM2:
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memory_area = 0x2;
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start_address = 0;
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codeWidthRegAddr = 0x127;
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RAM_ptr = MC33816_code_RAM2;
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size = sizeof(MC33816_code_RAM2) / 2;
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break;
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case DATA_RAM: // ch1 only?
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memory_area = 0x4;
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start_address = 0;
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RAM_ptr = MC33816_data_RAM;
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size = sizeof(MC33816_data_RAM) / 2;
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break;
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// optional, both data_rams with 0x3, writes same code to both
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default:
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break;
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}
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// Chip-Select high
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spiSelect(driver);
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if (target != DATA_RAM)
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{
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command = codeWidthRegAddr << 5; // control width register address
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command |= 1; // number of words to follow
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spi_writew(command); // sends code_width command
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spi_writew(size); // sends size (Code Width)
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}
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// Select Channel command
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spi_writew(0x7FE1);
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// RAM1, RAM2, or Common Page (Data RAM)
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spi_writew(memory_area);
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// "Command" of starting address
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// up to 0x03FE of code ram
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// up to 0x0080 of data ram
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command = start_address << 5;
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spi_writew(command); // sends start address command
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/*
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for(k = 0; k < size; k++) // downloads RAM
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{
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data = *RAM_ptr; // retrieves data to be sent
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spi_writew(data); // sends data
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RAM_ptr++;
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}
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*/
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spiSend(driver, size, RAM_ptr);
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spiUnselect(driver);
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}
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static void download_register(int r_target) {
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unsigned short r_start_address = 0; // start address
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unsigned short r_size = 0; // size of configuration data
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unsigned short r_command = 0; // command data
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unsigned short r_data = 0; // configuration data
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int n = 0; // used for loop for writing data to the chip
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unsigned short remainder_size = 0; // remainder size
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const unsigned short *reg_ptr; // pointer to array of data to be sent to the chip
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switch(r_target) // selects target
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{
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case REG_CH1: // channel 1 configurations
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r_start_address = 0x100;
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reg_ptr = MC33816_ch1_config;
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r_size = sizeof(MC33816_ch1_config) / 2; // gets number of words to be sent
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break;
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case REG_CH2: // channel 2 configurations
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r_start_address = 0x120;
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reg_ptr = MC33816_ch2_config;
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r_size = sizeof(MC33816_ch2_config) / 2; // gets number of words to be sent
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break;
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case REG_DIAG: // diagnostic configurations
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r_start_address = 0x140;
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reg_ptr = MC33816_diag_config;
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r_size = sizeof(MC33816_diag_config) / 2; // gets number of words to be sent
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break;
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case REG_IO: // IO configurations
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r_start_address = 0x180;
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reg_ptr = MC33816_io_config;
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r_size = sizeof(MC33816_io_config) / 2; // gets number of words to be sent
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break;
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case REG_MAIN: // main configurations
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r_start_address = 0x1C0;
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reg_ptr = MC33816_main_config;
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r_size = sizeof(MC33816_main_config) / 2; // gets number of words to be sent
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break;
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default:
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break;
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}
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//for location < size(remainder?)
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// is location == 0? or past max xfer, send command + expected size
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// if location = max xfer
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//
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// retrieve data, send it, increase pointer
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// increase
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if(r_size > MAX_SPI_MODE_A_TRANSFER_SIZE) //if size is too large, split into two sections ... MULTIPLE sections..
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{
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remainder_size = r_size - MAX_SPI_MODE_A_TRANSFER_SIZE; // creates remaining size
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r_size = MAX_SPI_MODE_A_TRANSFER_SIZE; // sets first size
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}
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r_command = r_start_address << 5; // start address
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r_command += r_size; // number of words to follow
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spiSelect(driver); // Chip
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spi_writew(r_command); // sends address and number of words to be sent
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spiSend(driver, r_size, reg_ptr);
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if(remainder_size > 0) // if remainder size is greater than 0, download the rest
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{
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r_start_address += r_size; // new start address
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r_command = r_start_address << 5; // start address
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r_command += remainder_size; // number of words to follow
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spi_writew(r_command); // sends address and number of words to be sent
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spiSend(driver, remainder_size, reg_ptr + r_size);
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}
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spiUnselect(driver);
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}
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void initMc33816() {
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@ -61,12 +267,18 @@ void initMc33816() {
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// default spi3sckPin PB3
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// ideally disable isSdCardEnabled since it's on SPI3
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// uncomment thid to hard-code something
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//CONFIG(mc33816_cs) = GPIOD_7;
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// uncomment this to hard-code something
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CONFIG(mc33816_cs) = GPIOD_7;
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CONFIG(mc33816_rstb) = GPIOD_5;
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CONFIG(mc33816_driven) = GPIOD_6;
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// and more to add...
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if (CONFIG(mc33816_cs) == GPIO_UNASSIGNED)
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return;
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// Initialize the chip via ResetB
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resetB.initPin("mc33 RESTB", engineConfiguration->mc33816_rstb);
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chipSelect.initPin("mc33 CS", engineConfiguration->mc33816_cs /*, &engineConfiguration->csPinMode*/);
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spiCfg.ssport = getHwPort("hip", CONFIG(mc33816_cs));
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@ -83,21 +295,49 @@ void initMc33816() {
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spiStart(driver, &spiCfg);
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addConsoleAction("mc33_stats", showStats);
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//addConsoleAction("mc33_stats", showStats);
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//addConsoleActionI("mc33_send", sendWord);
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addConsoleActionI("mc33_send", sentWord);
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// Does starting turn this high to begin with??
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spiUnselect(driver);
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int size = 105;
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//delay/wait? .. possibly only 30us for each needed, per datasheet
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resetB.setValue(0);
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chThdSleepMilliseconds(10);
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resetB.setValue(1);
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chThdSleepMilliseconds(10);
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unsigned short * RAM_ptr = MC33816_code_RAM1;
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setup_spi();
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int mc_id = id();
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for (int k = 0; k < size; k++) // downloads RAM
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{
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short data = *RAM_ptr; // retrieves data to be sent
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send_16bit_SPI(data); // sends data
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RAM_ptr++;
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}
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download_RAM(CODE_RAM1); // transfers code RAM1
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download_RAM(CODE_RAM2); // transfers code RAM2
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download_RAM(DATA_RAM); // transfers data RAM
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download_register(REG_MAIN); // download main register configurations
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download_register(REG_CH1); // download channel 1 register configurations
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download_register(REG_CH2); // download channel 2 register configurations
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download_register(REG_IO); // download IO register configurations
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download_register(REG_DIAG); // download diag register configuration
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enable_flash();
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//driven.setValue(1); // driven = HV
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}
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void update_scv(unsigned short current)
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{
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// Update a single word in Data RAM
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spiSelect(driver);
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// Select Channel command
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spi_writew(0x7FE1);
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// Common Page
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spi_writew(0x0004);
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// write (MSB=0) at data ram x9 (SCV_I_Hold), and 1 word
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spi_writew((9 << 5) + 1);
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spi_writew(current);
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spiUnselect(driver);
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// Strobe it to reload the value
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//GPIO_ClearPinsOutput(GPIOE, 1<<PIN21_IDX); // SCV
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//GPIO_SetPinsOutput(GPIOE, 1<<PIN21_IDX); // SCV
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}
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@ -8,6 +8,21 @@
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#ifndef HW_LAYER_MC33816_H_
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#define HW_LAYER_MC33816_H_
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const int MAX_SPI_MODE_A_TRANSFER_SIZE = 31; //max size for register config transfer
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enum {
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CODE_RAM1,
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CODE_RAM2,
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DATA_RAM
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};
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enum {
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REG_MAIN,
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REG_CH1,
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REG_CH2,
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REG_IO,
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REG_DIAG
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};
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void initMc33816(void);
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#endif /* HW_LAYER_MC33816_H_ */
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@ -3,18 +3,85 @@
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*
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*/
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unsigned short MC33816_code_RAM1[105] =
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// Data to be loaded into the Code RAM 1 memory space
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const unsigned short MC33816_code_RAM1[62] =
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{
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0x3629, 0x0185, 0x41F9, 0xB169, 0xF64B, 0xA77C, 0x3142, 0x028C, 0xBD43, 0x1E99,
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0xC958, 0xD52F, 0xB562, 0x27CA, 0xD617, 0xA63C, 0x2596, 0xE00F, 0xB8F9, 0xF657,
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0x9FB7, 0x2ACF, 0x8A60, 0x24C0, 0x7914, 0x2CED, 0x71BF, 0x5B3A, 0x0604, 0x3605,
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0x3BA8, 0x7362, 0x88EA, 0xF613, 0xD6DD, 0xB055, 0xD629, 0x32C2, 0x2375, 0xE08B,
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0xFA18, 0xEBC5, 0xAA8F, 0x5EAA, 0x3987, 0x106C, 0xE468, 0x64A1, 0x0FB0, 0x7879,
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0x9664, 0xA0D8, 0x7AE7, 0x1512, 0x829E, 0xBB5D, 0x03FC, 0x7228, 0xE94B, 0xF458,
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0x1E33, 0x83B0, 0xCE2D, 0xF930, 0xF458, 0x1F33, 0x9A9C, 0x8A34, 0x31AE, 0x6853,
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0x359C, 0xAF20, 0xBA3A, 0x9E1A, 0x2F68, 0x72F5, 0x0491, 0x96FF, 0x28B8, 0xE434,
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0xA72A, 0xFA05, 0x7481, 0x9721, 0x1392, 0x2167, 0x4AF1, 0xC959, 0x3A6A, 0xB248,
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0xAB35, 0x094F, 0xAF6F, 0x8DFA, 0x0BA7, 0x0B26, 0x978C, 0xD0E1, 0xCDC5, 0x34C6,
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0x18F8, 0x3E6C, 0x4186, 0xB14B, 0xDB33
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0x96A3, 0x19F0, 0x520A, 0x4368, 0x173F, 0x200B, 0x70F0, 0x8233, 0xF82E, 0x7DEB,
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0x8D45, 0xC517, 0xBFEE, 0xE825, 0x8A53, 0xDE14, 0xFE66, 0xB2B6, 0x5361, 0xD258,
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0x8D93, 0x9C83, 0x8078, 0xB95D, 0x2831, 0x8050, 0xE191, 0x16C1, 0x806F, 0x193F,
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0x9E9C, 0x3B7E, 0x5D3B, 0xB58F, 0x156F, 0x82E8, 0x8277, 0x5F3F, 0x2F78, 0xE440,
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0x7C77, 0x2ABF, 0x5000, 0x121A, 0x16C8, 0x2B7C, 0x90A2, 0x0897, 0xA640, 0x49E5,
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0xF5D5, 0xDA94, 0xF590, 0xBF10, 0xA88F, 0xDACA, 0x37E7, 0x42A9, 0xF5B0, 0x22AD,
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0xAF73, 0xD332
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};
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// Data to be loaded into the Code RAM 2 memory space
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const unsigned short MC33816_code_RAM2[43] =
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{
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0x96AA, 0x1A9E, 0x40F8, 0x66C8, 0xC91C, 0xEC3E, 0x83E5, 0x8286, 0xE3DC, 0xC8F3,
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0x9741, 0xC437, 0x4371, 0xE987, 0x8B0A, 0xDE55, 0x9A83, 0x0785, 0x811C, 0x3BED,
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0x7050, 0x28D7, 0x247E, 0x9C72, 0x5470, 0x8DA3, 0x4625, 0x4945, 0x31F0, 0x1BA9,
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0x9FFD, 0x5E7A, 0x8FF1, 0xE325, 0x1FAE, 0x80B7, 0x70E5, 0x5E5C, 0x4A35, 0x8651,
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0x7C77, 0x2ABE, 0x5D5D
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};
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// Data to be loaded into the Data RAM memory space
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const unsigned short MC33816_data_RAM[128] =
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{
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0x00F0, 0x00F0, 0x008C, 0x003C, 0x04B0, 0x00B4, 0x003C, 0xEA60, 0x0000, 0x003D,
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0x6000, 0x003C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x00C1, 0x00BF, 0x002F, 0x001D, 0x0000, 0x0046,
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0x0037, 0x2000, 0xEA60, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the Main register memory space
|
||||
const unsigned short MC33816_main_config[29] =
|
||||
{
|
||||
0x0003, 0x1FFE, 0x0000, 0x1200, 0x0000, 0x0000, 0x0001, 0x0000, 0x001F, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the CH1 register memory space
|
||||
const unsigned short MC33816_ch1_config[19] =
|
||||
{
|
||||
0x0008, 0x0000, 0x0000, 0x0000, 0x0403, 0x0000, 0x0000, 0x003E, 0x45B4, 0x6FB5,
|
||||
0x0000, 0x002C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the CH2 register memory space
|
||||
const unsigned short MC33816_ch2_config[19] =
|
||||
{
|
||||
0x0008, 0x0000, 0x0000, 0x0000, 0x0800, 0x0000, 0x0000, 0x002B, 0x218C, 0xDCB6,
|
||||
0x0000, 0x0014, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the IO register memory space
|
||||
const unsigned short MC33816_io_config[44] =
|
||||
{
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0063, 0x0104, 0x0800, 0x0610, 0x0041, 0x0098,
|
||||
0x0008, 0x0008, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0041, 0x0041, 0x0041, 0x0000, 0x0004, 0x1000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x7F7F, 0x7F7F,
|
||||
0x007F, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the Diag register memory space
|
||||
const unsigned short MC33816_diag_config[44] =
|
||||
{
|
||||
0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000,
|
||||
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x001E, 0x0000,
|
||||
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000,
|
||||
0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0001
|
||||
};
|
||||
|
|
|
|||
|
|
@ -8,6 +8,13 @@
|
|||
#ifndef HW_LAYER_MC33816_DATA_H_
|
||||
#define HW_LAYER_MC33816_DATA_H_
|
||||
|
||||
extern unsigned short MC33816_code_RAM1[105]; // CODE RAM CH 1
|
||||
extern const unsigned short MC33816_code_RAM1[62]; // CODE RAM CH 1
|
||||
extern const unsigned short MC33816_code_RAM2[43]; // CODE RAM CH 2
|
||||
extern const unsigned short MC33816_data_RAM[128]; // DATA RAM
|
||||
extern const unsigned short MC33816_main_config[29]; // main configurations
|
||||
extern const unsigned short MC33816_ch1_config[19]; // CH 1 configurations
|
||||
extern const unsigned short MC33816_ch2_config[19]; // CH 2 configurations
|
||||
extern const unsigned short MC33816_io_config[44]; // IO configurations
|
||||
extern const unsigned short MC33816_diag_config[44]; // diag configurations
|
||||
|
||||
#endif /* HW_LAYER_MC33816_DATA_H_ */
|
||||
|
|
|
|||
Loading…
Reference in New Issue