mirror of https://github.com/rusefi/rusefi-1.git
pt2001 updates (#4340)
* delete registers/ * update gitignore * readme * Revert "delete registers/" This reverts commit de10448d5479487b529b4e9ee551f45f271daa8c. * remove dead dram constants * switch to use generated C source instead of copy/paste * more memory map
This commit is contained in:
Matthew Kennedy
GitHub
parent
cad14d6541
commit
c55873593d
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@ -23,7 +23,6 @@ HW_LAYER_EMS_CPP = \
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$(PROJECT_DIR)/hw_layer/sensors/hip9011.cpp \
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$(PROJECT_DIR)/hw_layer/sensors/hip9011_logic.cpp \
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$(PROJECT_DIR)/hw_layer/mc33816.cpp \
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$(PROJECT_DIR)/hw_layer/mc33816_data.cpp \
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$(PROJECT_DIR)/hw_layer/stepper.cpp \
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$(PROJECT_DIR)/hw_layer/stepper_dual_hbridge.cpp \
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$(PROJECT_DIR)/hw_layer/servo.cpp \
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@ -33,6 +32,7 @@ HW_LAYER_EMS_CPP = \
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$(PROJECT_DIR)/hw_layer/debounce.cpp \
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$(PROJECT_DIR)/hw_layer/adc/mcp3208.cpp \
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ALLCSRC += $(PROJECT_DIR)/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.c
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#
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# '-include' is a magic kind of 'include' which would survive if file to be included is not found
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@ -21,7 +21,7 @@
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#include "mc33816.h"
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#include "mc33816_memory_map.h"
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#include "hardware.h"
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#include "mc33816_data.h"
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#include "mc33816/rusefi/sample_code/PT2001_LoadData.h"
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#include "mpu_util.h"
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static bool isInitializaed = false;
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@ -295,23 +295,23 @@ static void download_RAM(int target) {
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memory_area = 0x1;
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start_address = 0;
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codeWidthRegAddr = 0x107;
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RAM_ptr = MC33816_code_RAM1;
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size = sizeof(MC33816_code_RAM1) / 2;
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RAM_ptr = PT2001_code_RAM1;
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size = sizeof(PT2001_code_RAM1) / 2;
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break;
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case CODE_RAM2:
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memory_area = 0x2;
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start_address = 0;
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codeWidthRegAddr = 0x127;
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RAM_ptr = MC33816_code_RAM2;
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size = sizeof(MC33816_code_RAM2) / 2;
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RAM_ptr = PT2001_code_RAM2;
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size = sizeof(PT2001_code_RAM2) / 2;
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break;
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case DATA_RAM: // ch1 only?
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memory_area = 0x4;
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start_address = 0;
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RAM_ptr = MC33816_data_RAM;
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size = sizeof(MC33816_data_RAM) / 2;
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RAM_ptr = PT2001_data_RAM;
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size = sizeof(PT2001_data_RAM) / 2;
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break;
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// optional, both data_rams with 0x3, writes same code to both
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default:
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@ -355,32 +355,32 @@ static void download_register(int r_target) {
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{
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case REG_CH1: // channel 1 configurations
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r_start_address = 0x100;
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reg_ptr = MC33816_ch1_config;
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r_size = sizeof(MC33816_ch1_config) / 2; // gets number of words to be sent
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reg_ptr = PT2001_ch1_config;
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r_size = sizeof(PT2001_ch1_config) / 2; // gets number of words to be sent
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break;
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case REG_CH2: // channel 2 configurations
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r_start_address = 0x120;
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reg_ptr = MC33816_ch2_config;
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r_size = sizeof(MC33816_ch2_config) / 2; // gets number of words to be sent
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reg_ptr = PT2001_ch2_config;
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r_size = sizeof(PT2001_ch2_config) / 2; // gets number of words to be sent
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break;
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case REG_DIAG: // diagnostic configurations
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r_start_address = 0x140;
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reg_ptr = MC33816_diag_config;
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r_size = sizeof(MC33816_diag_config) / 2; // gets number of words to be sent
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reg_ptr = PT2001_diag_config;
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r_size = sizeof(PT2001_diag_config) / 2; // gets number of words to be sent
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break;
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case REG_IO: // IO configurations
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r_start_address = 0x180;
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reg_ptr = MC33816_io_config;
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r_size = sizeof(MC33816_io_config) / 2; // gets number of words to be sent
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reg_ptr = PT2001_io_config;
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r_size = sizeof(PT2001_io_config) / 2; // gets number of words to be sent
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break;
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case REG_MAIN: // main configurations
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r_start_address = 0x1C0;
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reg_ptr = MC33816_main_config;
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r_size = sizeof(MC33816_main_config) / 2; // gets number of words to be sent
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reg_ptr = PT2001_main_config;
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r_size = sizeof(PT2001_main_config) / 2; // gets number of words to be sent
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break;
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default:
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@ -1,5 +1,8 @@
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bin
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sample_code
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sample_code/*
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!sample_code/PT2001_dram.h
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!sample_code/PT2001_LoadData.c
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!sample_code/PT2001_LoadData.h
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CSV Files
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Registers/*.hex
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*.txt
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@ -6,6 +6,3 @@
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#define Tbypass 5;
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#define Thold_off 6;
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#define Thold_tot 7;
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#define SCV_I_hold 9;
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#define SCV_Thold_tot 10;
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#define SCV_Thold_off 11;
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@ -7,9 +7,9 @@
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0000000000111100
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1110101001100000
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0000000000000000
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0000000000111101
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0110000000000000
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0000000000111100
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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@ -1,10 +1,10 @@
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//
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// Application:
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// Asic ID: MC33816
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// Asic ID: PT2001
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// Version:
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// DRAM
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// Date: Sunday, August 02, 2020
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// Author: DEV
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// Date: Wednesday, July 13, 2022
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// Author: makenne
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//
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0x00F0,
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0x00F0,
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@ -15,9 +15,9 @@
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0x003C,
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0xEA60,
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0x0000,
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0x003D,
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0x6000,
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0x003C,
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0x0000,
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0x0000,
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0x0000,
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0x0000,
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0x0000,
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0x0000,
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@ -1,10 +1,10 @@
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//
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// Application:
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// Asic ID: MC33816
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// Asic ID: PT2001
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// Version:
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// DRAM
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// Date: Sunday, August 02, 2020
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// Author: DEV
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// Date: Wednesday, July 13, 2022
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// Author: makenne
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//
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0x00C1,
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0x00BF,
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@ -42,3 +42,12 @@
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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0000000000000000
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@ -1,6 +1,6 @@
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<Project xmlns="http://tempuri.org/project.xsd">
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<Identifiers>
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<Device>MC33816</Device>
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<Device>PT2001</Device>
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<ECU>IDE Project</ECU>
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<Application>%APPLICATION%</Application>
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<DeviceName>%DEVICEID%</DeviceName>
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@ -11,15 +11,12 @@
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<RegisterFile areaName="Main Configuration Registers (MCR)">Registers\main_config_reg.hex</RegisterFile>
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<RegisterFile areaName="Channel 1 Configuration Registers (C1PR)">Registers\ch1_config_reg.hex</RegisterFile>
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<RegisterFile areaName="Channel 2 Configuration Registers (C2PR)">Registers\ch2_config_reg.hex</RegisterFile>
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<RegisterFile areaName="Channel 3 Configuration Registers (C3PR)">Registers\ch3_config_reg.hex</RegisterFile>
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<RegisterFile areaName="Diagnosis Configuration Registers (DCR)">Registers\diag_config_reg.hex</RegisterFile>
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<RegisterFile areaName="Crossbar Configuration Registers (XCR)">Registers\io_config_reg.hex</RegisterFile>
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<MicroCodeFile channel="1" type="source" date="130995272773175445">MicrocodeCh1\ch1.psc</MicroCodeFile>
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<MicroCodeFile channel="2" type="source" date="130995272773155443">MicrocodeCh2\ch2.psc</MicroCodeFile>
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<MicroCodeFile channel="3" type="source" date="130995272773145442">MicrocodeCh3\ch3.psc</MicroCodeFile>
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<DPramFile channel="1">Registers\dram1.hex</DPramFile>
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<DPramFile channel="2">Registers\dram2.hex</DPramFile>
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<DPramFile channel="3">Registers\dram3.hex</DPramFile>
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<AutoLoadFile>Simulator\AutoLoad.xml</AutoLoadFile>
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</Files>
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<General>
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@ -163,72 +160,6 @@
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<Entry address="62" format="Hex" unit="None" indexSelected="0" />
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<Entry address="63" format="Hex" unit="None" indexSelected="0" />
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</DPram>
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<DPram channel="3" addressFormat="Hex">
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<Entry address="0" format="Hex" unit="None" indexSelected="0" />
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<Entry address="1" format="Hex" unit="None" indexSelected="0" />
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<Entry address="2" format="Hex" unit="None" indexSelected="0" />
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<Entry address="3" format="Hex" unit="None" indexSelected="0" />
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<Entry address="4" format="Hex" unit="None" indexSelected="0" />
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<Entry address="5" format="Hex" unit="None" indexSelected="0" />
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<Entry address="6" format="Hex" unit="None" indexSelected="0" />
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<Entry address="7" format="Hex" unit="None" indexSelected="0" />
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<Entry address="8" format="Hex" unit="None" indexSelected="0" />
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<Entry address="9" format="Hex" unit="None" indexSelected="0" />
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<Entry address="10" format="Hex" unit="None" indexSelected="0" />
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<Entry address="11" format="Hex" unit="None" indexSelected="0" />
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<Entry address="12" format="Hex" unit="None" indexSelected="0" />
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<Entry address="13" format="Hex" unit="None" indexSelected="0" />
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<Entry address="14" format="Hex" unit="None" indexSelected="0" />
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<Entry address="15" format="Hex" unit="None" indexSelected="0" />
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<Entry address="16" format="Hex" unit="None" indexSelected="0" />
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<Entry address="17" format="Hex" unit="None" indexSelected="0" />
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<Entry address="18" format="Hex" unit="None" indexSelected="0" />
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<Entry address="19" format="Hex" unit="None" indexSelected="0" />
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<Entry address="20" format="Hex" unit="None" indexSelected="0" />
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<Entry address="21" format="Hex" unit="None" indexSelected="0" />
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<Entry address="22" format="Hex" unit="None" indexSelected="0" />
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<Entry address="23" format="Hex" unit="None" indexSelected="0" />
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<Entry address="24" format="Hex" unit="None" indexSelected="0" />
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<Entry address="25" format="Hex" unit="None" indexSelected="0" />
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<Entry address="26" format="Hex" unit="None" indexSelected="0" />
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<Entry address="27" format="Hex" unit="None" indexSelected="0" />
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<Entry address="28" format="Hex" unit="None" indexSelected="0" />
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<Entry address="29" format="Hex" unit="None" indexSelected="0" />
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<Entry address="30" format="Hex" unit="None" indexSelected="0" />
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<Entry address="31" format="Hex" unit="None" indexSelected="0" />
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<Entry address="32" format="Hex" unit="None" indexSelected="0" />
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<Entry address="33" format="Hex" unit="None" indexSelected="0" />
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<Entry address="34" format="Hex" unit="None" indexSelected="0" />
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<Entry address="35" format="Hex" unit="None" indexSelected="0" />
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<Entry address="36" format="Hex" unit="None" indexSelected="0" />
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<Entry address="37" format="Hex" unit="None" indexSelected="0" />
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<Entry address="38" format="Hex" unit="None" indexSelected="0" />
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<Entry address="39" format="Hex" unit="None" indexSelected="0" />
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<Entry address="40" format="Hex" unit="None" indexSelected="0" />
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<Entry address="41" format="Hex" unit="None" indexSelected="0" />
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<Entry address="42" format="Hex" unit="None" indexSelected="0" />
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<Entry address="43" format="Hex" unit="None" indexSelected="0" />
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<Entry address="44" format="Hex" unit="None" indexSelected="0" />
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<Entry address="45" format="Hex" unit="None" indexSelected="0" />
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<Entry address="46" format="Hex" unit="None" indexSelected="0" />
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<Entry address="47" format="Hex" unit="None" indexSelected="0" />
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<Entry address="48" format="Hex" unit="None" indexSelected="0" />
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<Entry address="49" format="Hex" unit="None" indexSelected="0" />
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<Entry address="50" format="Hex" unit="None" indexSelected="0" />
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<Entry address="51" format="Hex" unit="None" indexSelected="0" />
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<Entry address="52" format="Hex" unit="None" indexSelected="0" />
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<Entry address="53" format="Hex" unit="None" indexSelected="0" />
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<Entry address="54" format="Hex" unit="None" indexSelected="0" />
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<Entry address="55" format="Hex" unit="None" indexSelected="0" />
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<Entry address="56" format="Hex" unit="None" indexSelected="0" />
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<Entry address="57" format="Hex" unit="None" indexSelected="0" />
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<Entry address="58" format="Hex" unit="None" indexSelected="0" />
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<Entry address="59" format="Hex" unit="None" indexSelected="0" />
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<Entry address="60" format="Hex" unit="None" indexSelected="0" />
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<Entry address="61" format="Hex" unit="None" indexSelected="0" />
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<Entry address="62" format="Hex" unit="None" indexSelected="0" />
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<Entry address="63" format="Hex" unit="None" indexSelected="0" />
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</DPram>
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<RegisterArea name="Main Configuration Registers (MCR)">
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<Reg>Hex</Reg>
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<Reg>Hex</Reg>
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@ -4,9 +4,8 @@ Source code here is different from but is heavily inspired by MC33816 example as
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* Hit 'Build' button in MC33816 Developer Studio to get assembly stuff in 'build' folder. At the moment we use PT2001 version
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of the chip so actually "PT2001 Developer studio"
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* Once you are done wit 'Build' second step is 'Generate PT2001 Load Data Code'. See sample_code/PT2001_LoadData.c
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* Once you are done wit 'Build' second step is 'Generate PT2001 Load Data Code'. See sample_code/PT2001_LoadData.c. Some of the files in this directory are included/compiled in to rusEFI, in order to download the firmware and configuration to the PT2001.
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* Fun fact: it looks like the difference between "MC33816 Developer Studio" and "PT2001 Developer studio" is ``assembler\cipher\key4.key`` file
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Just in case we have a backup of both tools at https://github.com/rusefi/rusefi_external_utils/tree/master/NXP-GDI
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@ -1,21 +1,54 @@
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/*
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* mc33816_data.c
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*
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* For historic reasons rusEFI source code refers to all this as mc33816 while the microcode
|
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* is signed with MC33PT2001 key. to use real mc33816 you would have to replace binary data with true mc33816 version
|
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*
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* this is manual copy-paste of sample_code/PT2001_LoadData.c
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* see mc33816/rusefi/readme.md
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*/
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/*******************************************************************************
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* Example Code
|
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*
|
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* Copyright(C) 2022 NXP Semiconductors
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* NXP Semiconductors Confidential and Proprietary
|
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*
|
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* Software that is described herein is for illustrative purposes only
|
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* which provides customers with programming information regarding the
|
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* NXP products. This software is supplied "AS IS" without any warranties
|
||||
* of any kind, and NXP Semiconductors and its licensor disclaim any and
|
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* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights
|
||||
* under any patent, copyright, mask work right, or any other intellectual
|
||||
* property rights in or to any products. NXP Semiconductors reserves the
|
||||
* right to make changes in the software without notification. NXP
|
||||
* Semiconductors also makes no representation or warranty that such
|
||||
* application will be suitable for the specified use without further testing
|
||||
* or modification.
|
||||
*
|
||||
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
|
||||
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
|
||||
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
|
||||
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
|
||||
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
|
||||
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
|
||||
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
|
||||
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided
|
||||
* that it is used in conjunction with NXP Semiconductors devices. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies
|
||||
* of this code.
|
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*******************************************************************************/
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#include "pch.h"
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//==============================================================================
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// This file contains data arrays that are used to load the code RAM, data RAM
|
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// and registers on the PT2001.
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//==============================================================================
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#include "mc33816_data.h"
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// ECU: IDE Project
|
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// Project: rusefi
|
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|
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#if EFI_MC33816
|
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#include "PT2001_LoadData.h"
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|
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// Data to be loaded into the Code RAM 1 memory space
|
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const unsigned short MC33816_code_RAM1[88] =
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unsigned short PT2001_code_RAM1[88] =
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{
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0x7612, 0x6C2B, 0x917F, 0xA514, 0x8DD1, 0xC289, 0x7C38, 0xA73B, 0xF359, 0x56C3,
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0xEE73, 0x812F, 0xDFA9, 0x2ED5, 0x2722, 0xBC58, 0x649B, 0xFB66, 0xFAD7, 0xBB51,
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@ -29,7 +62,7 @@ const unsigned short MC33816_code_RAM1[88] =
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};
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// Data to be loaded into the Code RAM 2 memory space
|
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const unsigned short MC33816_code_RAM2[43] =
|
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unsigned short PT2001_code_RAM2[43] =
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{
|
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0x761B, 0x6F45, 0x838D, 0x80B4, 0x53F2, 0x0EBC, 0x8F2D, 0xA78E, 0xE8AB, 0xE3DB,
|
||||
0xF477, 0x800F, 0x2336, 0x2F77, 0x267B, 0xBC19, 0x007E, 0x4E55, 0x28AA, 0x52E4,
|
||||
|
|
@ -39,10 +72,10 @@ const unsigned short MC33816_code_RAM2[43] =
|
|||
};
|
||||
|
||||
// Data to be loaded into the Data RAM memory space
|
||||
const unsigned short MC33816_data_RAM[128] =
|
||||
unsigned short PT2001_data_RAM[128] =
|
||||
{
|
||||
0x00F0, 0x00F0, 0x008C, 0x2000, 0x01F4, 0x00B4, 0x003C, 0xEA60, 0x0000, 0x003D,
|
||||
0x6000, 0x003C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x00F0, 0x00F0, 0x008C, 0x2000, 0x01F4, 0x00B4, 0x003C, 0xEA60, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
|
|
@ -56,44 +89,41 @@ const unsigned short MC33816_data_RAM[128] =
|
|||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// 0x1CE
|
||||
// if set to '1' Driver_status register is reset on read.
|
||||
#define Rsetbr 1
|
||||
|
||||
// Data to be loaded into the Main register memory space
|
||||
const unsigned short MC33816_main_config[29] =
|
||||
unsigned short PT2001_main_config[29] =
|
||||
{
|
||||
0x0003, 0x1FFE, 0x0000, 0x1200, 0x0000, 0x0000, 0x0001, 0x0000, 0x001F, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, Rsetbr, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the CH1 register memory space
|
||||
const unsigned short MC33816_ch1_config[19] =
|
||||
unsigned short PT2001_ch1_config[19] =
|
||||
{
|
||||
0x0008, 0x0000, 0x0000, 0x0000, 0x0303, 0x0000, 0x0000, 0x0058, 0x8E62, 0x7B23,
|
||||
0x0000, 0x002C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the CH2 register memory space
|
||||
const unsigned short MC33816_ch2_config[19] =
|
||||
unsigned short PT2001_ch2_config[19] =
|
||||
{
|
||||
0x0008, 0x0000, 0x0000, 0x0000, 0x0C00, 0x0000, 0x0000, 0x002B, 0x218C, 0xDCB6,
|
||||
0x0000, 0x0014, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the IO register memory space
|
||||
const unsigned short MC33816_io_config[44] =
|
||||
unsigned short PT2001_io_config[53] =
|
||||
{
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0063, 0x018C, 0x0800, 0x0410, 0x0041, 0x0098,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0041, 0x0041, 0x0041, 0x0000, 0x0004, 0x1000,
|
||||
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x7F7F, 0x7F7F,
|
||||
0x007F, 0x0000, 0x0000, 0x0000
|
||||
0x007F, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
|
||||
0x0000, 0x0000, 0x0000
|
||||
};
|
||||
|
||||
// Data to be loaded into the Diag register memory space
|
||||
const unsigned short MC33816_diag_config[44] =
|
||||
unsigned short PT2001_diag_config[44] =
|
||||
{
|
||||
0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000,
|
||||
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x001E, 0x0000,
|
||||
|
|
@ -102,4 +132,3 @@ const unsigned short MC33816_diag_config[44] =
|
|||
0x0000, 0x0000, 0x0000, 0x0001
|
||||
};
|
||||
|
||||
#endif // EFI_MC33816
|
||||
|
|
@ -0,0 +1,60 @@
|
|||
/*******************************************************************************
|
||||
* Example Code
|
||||
*
|
||||
* Copyright(C) 2022 NXP Semiconductors
|
||||
* NXP Semiconductors Confidential and Proprietary
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* NXP products. This software is supplied "AS IS" without any warranties
|
||||
* of any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights
|
||||
* under any patent, copyright, mask work right, or any other intellectual
|
||||
* property rights in or to any products. NXP Semiconductors reserves the
|
||||
* right to make changes in the software without notification. NXP
|
||||
* Semiconductors also makes no representation or warranty that such
|
||||
* application will be suitable for the specified use without further testing
|
||||
* or modification.
|
||||
*
|
||||
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
|
||||
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
|
||||
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
|
||||
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
|
||||
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
|
||||
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
|
||||
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
|
||||
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided
|
||||
* that it is used in conjunction with NXP Semiconductors devices. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies
|
||||
* of this code.
|
||||
*******************************************************************************/
|
||||
|
||||
//==============================================================================
|
||||
// This file contains data array declarations for the code RAM, data RAM and
|
||||
// register arrays for the PT2001.
|
||||
//==============================================================================
|
||||
|
||||
// ECU: IDE Project
|
||||
// Project: rusefi
|
||||
|
||||
#ifndef PT2001_DATA_H_
|
||||
#define PT2001_DATA_H_
|
||||
|
||||
extern unsigned short PT2001_code_RAM1[88]; // CODE RAM CH 1
|
||||
extern unsigned short PT2001_code_RAM2[43]; // CODE RAM CH 2
|
||||
extern unsigned short PT2001_data_RAM[128]; // DATA RAM
|
||||
extern unsigned short PT2001_main_config[29]; // main configurations
|
||||
extern unsigned short PT2001_ch1_config[19]; // CH 1 configurations
|
||||
extern unsigned short PT2001_ch2_config[19]; // CH 2 configurations
|
||||
extern unsigned short PT2001_io_config[53]; // IO configurations
|
||||
extern unsigned short PT2001_diag_config[44]; // diag configurations
|
||||
|
||||
#endif /* PT2001_DATA_H_ */
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
/*******************************************************************************
|
||||
* Example Code
|
||||
*
|
||||
* Copyright(C) 2022 NXP Semiconductors
|
||||
* NXP Semiconductors Confidential and Proprietary
|
||||
*
|
||||
* Software that is described herein is for illustrative purposes only
|
||||
* which provides customers with programming information regarding the
|
||||
* NXP products. This software is supplied "AS IS" without any warranties
|
||||
* of any kind, and NXP Semiconductors and its licensor disclaim any and
|
||||
* all warranties, express or implied, including all implied warranties of
|
||||
* merchantability, fitness for a particular purpose and non-infringement of
|
||||
* intellectual property rights. NXP Semiconductors assumes no responsibility
|
||||
* or liability for the use of the software, conveys no license or rights
|
||||
* under any patent, copyright, mask work right, or any other intellectual
|
||||
* property rights in or to any products. NXP Semiconductors reserves the
|
||||
* right to make changes in the software without notification. NXP
|
||||
* Semiconductors also makes no representation or warranty that such
|
||||
* application will be suitable for the specified use without further testing
|
||||
* or modification.
|
||||
*
|
||||
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
|
||||
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
|
||||
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
|
||||
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
|
||||
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
|
||||
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
|
||||
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
|
||||
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
|
||||
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software and its
|
||||
* documentation is hereby granted, under NXP Semiconductors' and its
|
||||
* licensor's relevant copyrights in the software, without fee, provided
|
||||
* that it is used in conjunction with NXP Semiconductors devices. This
|
||||
* copyright, permission, and disclaimer notice must appear in all copies
|
||||
* of this code.
|
||||
*******************************************************************************/
|
||||
|
||||
/*
|
||||
* PT2001_dram.h
|
||||
*
|
||||
* DRAM Header File
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef PT2001_DRAM_H_
|
||||
#define PT2001_DRAM_H_
|
||||
|
||||
// DRAM 1 Parameter Addresses
|
||||
#define PT2001_D1_Iboost 0x00
|
||||
#define PT2001_D1_Ipeak 0x01
|
||||
#define PT2001_D1_Ihold 0x02
|
||||
#define PT2001_D1_Tpeak_off 0x03
|
||||
#define PT2001_D1_Tpeak_tot 0x04
|
||||
#define PT2001_D1_Tbypass 0x05
|
||||
#define PT2001_D1_Thold_off 0x06
|
||||
#define PT2001_D1_Thold_tot 0x07
|
||||
|
||||
// DRAM 2 Parameter Addresses
|
||||
#define PT2001_D2_Vboost_high 0x40
|
||||
#define PT2001_D2_Vboost_low 0x41
|
||||
#define PT2001_D2_Isense4_high 0x42
|
||||
#define PT2001_D2_Isense4_low 0x43
|
||||
#define PT2001_D2_PCV_Ipeak 0x45
|
||||
#define PT2001_D2_PCV_Ihold 0x46
|
||||
#define PT2001_D2_PCV_Thold_off 0x47
|
||||
#define PT2001_D2_PCV_Thold_tot 0x48
|
||||
|
||||
#endif /* PT2001_DRAM_H_ */
|
||||
|
|
@ -1,18 +0,0 @@
|
|||
/*
|
||||
* mc33816_data.h
|
||||
*
|
||||
* @date May 3, 2019
|
||||
* @author Andrey Belomutskiy, (c) 2012-2020
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
extern const unsigned short MC33816_code_RAM1[88]; // CODE RAM CH 1
|
||||
extern const unsigned short MC33816_code_RAM2[43]; // CODE RAM CH 2
|
||||
extern const unsigned short MC33816_data_RAM[128]; // DATA RAM
|
||||
extern const unsigned short MC33816_main_config[29]; // main configurations
|
||||
extern const unsigned short MC33816_ch1_config[19]; // CH 1 configurations
|
||||
extern const unsigned short MC33816_ch2_config[19]; // CH 2 configurations
|
||||
extern const unsigned short MC33816_io_config[44]; // IO configurations
|
||||
extern const unsigned short MC33816_diag_config[44]; // diag configurations
|
||||
|
||||
|
|
@ -2,23 +2,25 @@
|
|||
* see mc33816/rusefi/readme.md
|
||||
*/
|
||||
|
||||
#include "mc33816/rusefi/sample_code/PT2001_dram.h"
|
||||
|
||||
typedef enum {
|
||||
// see dram1.def values
|
||||
Iboost = 0,
|
||||
Ipeak = 1,
|
||||
Ihold = 2,
|
||||
Tpeak_off = 3,
|
||||
Tpeak_tot = 4,
|
||||
Tbypass = 5,
|
||||
Thold_off = 6,
|
||||
Thold_tot = 7,
|
||||
Iboost = PT2001_D1_Iboost,
|
||||
Ipeak = PT2001_D1_Ipeak,
|
||||
Ihold = PT2001_D1_Ihold,
|
||||
Tpeak_off = PT2001_D1_Tpeak_off,
|
||||
Tpeak_tot = PT2001_D1_Tpeak_tot,
|
||||
Tbypass = PT2001_D1_Tbypass,
|
||||
Thold_off = PT2001_D1_Thold_off,
|
||||
Thold_tot = PT2001_D1_Thold_tot,
|
||||
// see dram2.def values, base 64 for channel 2
|
||||
Vboost_high = 64,
|
||||
Vboost_low = 65,
|
||||
Isense4_high = 66,
|
||||
Isense4_low = 67,
|
||||
HPFP_Ipeak = 69,
|
||||
HPFP_Ihold = 70,
|
||||
HPFP_Thold_off = 71,
|
||||
HPFP_Thold_tot = 72,
|
||||
Vboost_high = PT2001_D2_Vboost_high,
|
||||
Vboost_low = PT2001_D2_Vboost_low,
|
||||
Isense4_high = PT2001_D2_Isense4_high,
|
||||
Isense4_low = PT2001_D2_Isense4_low,
|
||||
HPFP_Ipeak = PT2001_D2_PCV_Ipeak,
|
||||
HPFP_Ihold = PT2001_D2_PCV_Ihold,
|
||||
HPFP_Thold_off = PT2001_D2_PCV_Thold_off,
|
||||
HPFP_Thold_tot = PT2001_D2_PCV_Thold_tot,
|
||||
} MC33816Mem;
|
||||
|
|
|
|||
Loading…
Reference in New Issue