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pt2001 updates (#4340) 

* delete registers/

* update gitignore

* readme

* Revert "delete registers/"

This reverts commit de10448d5479487b529b4e9ee551f45f271daa8c.

* remove dead dram constants

* switch to use generated C source instead of copy/paste

* more memory map
This commit is contained in:
Matthew Kennedy 2022-07-14 09:47:51 -07:00 committed by GitHub
parent cad14d6541
commit c55873593d
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
15 changed files with 251 additions and 169 deletions
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2
firmware/hw_layer/hw_layer.mk
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@ -23,7 +23,6 @@ HW_LAYER_EMS_CPP = \
$(PROJECT_DIR)/hw_layer/sensors/hip9011.cpp \ $(PROJECT_DIR)/hw_layer/sensors/hip9011.cpp \
$(PROJECT_DIR)/hw_layer/sensors/hip9011_logic.cpp \ $(PROJECT_DIR)/hw_layer/sensors/hip9011_logic.cpp \
$(PROJECT_DIR)/hw_layer/mc33816.cpp \ $(PROJECT_DIR)/hw_layer/mc33816.cpp \
$(PROJECT_DIR)/hw_layer/mc33816_data.cpp \
$(PROJECT_DIR)/hw_layer/stepper.cpp \ $(PROJECT_DIR)/hw_layer/stepper.cpp \
$(PROJECT_DIR)/hw_layer/stepper_dual_hbridge.cpp \ $(PROJECT_DIR)/hw_layer/stepper_dual_hbridge.cpp \
$(PROJECT_DIR)/hw_layer/servo.cpp \ $(PROJECT_DIR)/hw_layer/servo.cpp \
@ -33,6 +32,7 @@ HW_LAYER_EMS_CPP = \
$(PROJECT_DIR)/hw_layer/debounce.cpp \ $(PROJECT_DIR)/hw_layer/debounce.cpp \
$(PROJECT_DIR)/hw_layer/adc/mcp3208.cpp \ $(PROJECT_DIR)/hw_layer/adc/mcp3208.cpp \
ALLCSRC += $(PROJECT_DIR)/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.c
# #
# '-include' is a magic kind of 'include' which would survive if file to be included is not found # '-include' is a magic kind of 'include' which would survive if file to be included is not found

34
firmware/hw_layer/mc33816.cpp
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@ -21,7 +21,7 @@
#include "mc33816.h" #include "mc33816.h"
#include "mc33816_memory_map.h" #include "mc33816_memory_map.h"
#include "hardware.h" #include "hardware.h"
#include "mc33816_data.h" #include "mc33816/rusefi/sample_code/PT2001_LoadData.h"
#include "mpu_util.h" #include "mpu_util.h"
static bool isInitializaed = false; static bool isInitializaed = false;
@ -295,23 +295,23 @@ static void download_RAM(int target) {
memory_area = 0x1; memory_area = 0x1;
start_address = 0; start_address = 0;
codeWidthRegAddr = 0x107; codeWidthRegAddr = 0x107;
RAM_ptr = MC33816_code_RAM1; RAM_ptr = PT2001_code_RAM1;
size = sizeof(MC33816_code_RAM1) / 2; size = sizeof(PT2001_code_RAM1) / 2;
break; break;
case CODE_RAM2: case CODE_RAM2:
memory_area = 0x2; memory_area = 0x2;
start_address = 0; start_address = 0;
codeWidthRegAddr = 0x127; codeWidthRegAddr = 0x127;
RAM_ptr = MC33816_code_RAM2; RAM_ptr = PT2001_code_RAM2;
size = sizeof(MC33816_code_RAM2) / 2; size = sizeof(PT2001_code_RAM2) / 2;
break; break;
case DATA_RAM: // ch1 only? case DATA_RAM: // ch1 only?
memory_area = 0x4; memory_area = 0x4;
start_address = 0; start_address = 0;
RAM_ptr = MC33816_data_RAM; RAM_ptr = PT2001_data_RAM;
size = sizeof(MC33816_data_RAM) / 2; size = sizeof(PT2001_data_RAM) / 2;
break; break;
// optional, both data_rams with 0x3, writes same code to both // optional, both data_rams with 0x3, writes same code to both
default: default:
@ -355,32 +355,32 @@ static void download_register(int r_target) {
{ {
case REG_CH1: // channel 1 configurations case REG_CH1: // channel 1 configurations
r_start_address = 0x100; r_start_address = 0x100;
reg_ptr = MC33816_ch1_config; reg_ptr = PT2001_ch1_config;
r_size = sizeof(MC33816_ch1_config) / 2; // gets number of words to be sent r_size = sizeof(PT2001_ch1_config) / 2; // gets number of words to be sent
break; break;
case REG_CH2: // channel 2 configurations case REG_CH2: // channel 2 configurations
r_start_address = 0x120; r_start_address = 0x120;
reg_ptr = MC33816_ch2_config; reg_ptr = PT2001_ch2_config;
r_size = sizeof(MC33816_ch2_config) / 2; // gets number of words to be sent r_size = sizeof(PT2001_ch2_config) / 2; // gets number of words to be sent
break; break;
case REG_DIAG: // diagnostic configurations case REG_DIAG: // diagnostic configurations
r_start_address = 0x140; r_start_address = 0x140;
reg_ptr = MC33816_diag_config; reg_ptr = PT2001_diag_config;
r_size = sizeof(MC33816_diag_config) / 2; // gets number of words to be sent r_size = sizeof(PT2001_diag_config) / 2; // gets number of words to be sent
break; break;
case REG_IO: // IO configurations case REG_IO: // IO configurations
r_start_address = 0x180; r_start_address = 0x180;
reg_ptr = MC33816_io_config; reg_ptr = PT2001_io_config;
r_size = sizeof(MC33816_io_config) / 2; // gets number of words to be sent r_size = sizeof(PT2001_io_config) / 2; // gets number of words to be sent
break; break;
case REG_MAIN: // main configurations case REG_MAIN: // main configurations
r_start_address = 0x1C0; r_start_address = 0x1C0;
reg_ptr = MC33816_main_config; reg_ptr = PT2001_main_config;
r_size = sizeof(MC33816_main_config) / 2; // gets number of words to be sent r_size = sizeof(PT2001_main_config) / 2; // gets number of words to be sent
break; break;
default: default:

5
firmware/hw_layer/mc33816/rusefi/.gitignore vendored
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@ -1,5 +1,8 @@
bin bin
sample_code sample_code/*
!sample_code/PT2001_dram.h
!sample_code/PT2001_LoadData.c
!sample_code/PT2001_LoadData.h
CSV Files CSV Files
Registers/*.hex Registers/*.hex
*.txt *.txt

3
firmware/hw_layer/mc33816/rusefi/MicrocodeCh1/dram1.def
View File

@ -6,6 +6,3 @@
#define Tbypass 5; #define Tbypass 5;
#define Thold_off 6; #define Thold_off 6;
#define Thold_tot 7; #define Thold_tot 7;
#define SCV_I_hold 9;
#define SCV_Thold_tot 10;
#define SCV_Thold_off 11;

6
firmware/hw_layer/mc33816/rusefi/Registers/dram1.bin
View File

@ -7,9 +7,9 @@
0000000000111100 0000000000111100
1110101001100000 1110101001100000
0000000000000000 0000000000000000
0000000000111101 0000000000000000
0110000000000000 0000000000000000
0000000000111100 0000000000000000
0000000000000000 0000000000000000
0000000000000000 0000000000000000
0000000000000000 0000000000000000

12
firmware/hw_layer/mc33816/rusefi/Registers/dram1.hex
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@ -1,10 +1,10 @@
// //
// Application: // Application:
// Asic ID: MC33816 // Asic ID: PT2001
// Version: // Version:
// DRAM // DRAM
// Date: Sunday, August 02, 2020 // Date: Wednesday, July 13, 2022
// Author: DEV // Author: makenne
// //
0x00F0, 0x00F0,
0x00F0, 0x00F0,
@ -15,9 +15,9 @@
0x003C, 0x003C,
0xEA60, 0xEA60,
0x0000, 0x0000,
0x003D, 0x0000,
0x6000, 0x0000,
0x003C, 0x0000,
0x0000, 0x0000,
0x0000, 0x0000,
0x0000, 0x0000,

6
firmware/hw_layer/mc33816/rusefi/Registers/dram2.hex
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@ -1,10 +1,10 @@
// //
// Application: // Application:
// Asic ID: MC33816 // Asic ID: PT2001
// Version: // Version:
// DRAM // DRAM
// Date: Sunday, August 02, 2020 // Date: Wednesday, July 13, 2022
// Author: DEV // Author: makenne
// //
0x00C1, 0x00C1,
0x00BF, 0x00BF,

9
firmware/hw_layer/mc33816/rusefi/Registers/io_config_reg.bin
View File

@ -42,3 +42,12 @@
0000000000000000 0000000000000000
0000000000000000 0000000000000000
0000000000000000 0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000
0000000000000000

71
firmware/hw_layer/mc33816/rusefi/project.xml
View File

@ -1,6 +1,6 @@
<Project xmlns="http://tempuri.org/project.xsd"> <Project xmlns="http://tempuri.org/project.xsd">
<Identifiers> <Identifiers>
<Device>MC33816</Device> <Device>PT2001</Device>
<ECU>IDE Project</ECU> <ECU>IDE Project</ECU>
<Application>%APPLICATION%</Application> <Application>%APPLICATION%</Application>
<DeviceName>%DEVICEID%</DeviceName> <DeviceName>%DEVICEID%</DeviceName>
@ -11,15 +11,12 @@
<RegisterFile areaName="Main Configuration Registers (MCR)">Registers\main_config_reg.hex</RegisterFile> <RegisterFile areaName="Main Configuration Registers (MCR)">Registers\main_config_reg.hex</RegisterFile>
<RegisterFile areaName="Channel 1 Configuration Registers (C1PR)">Registers\ch1_config_reg.hex</RegisterFile> <RegisterFile areaName="Channel 1 Configuration Registers (C1PR)">Registers\ch1_config_reg.hex</RegisterFile>
<RegisterFile areaName="Channel 2 Configuration Registers (C2PR)">Registers\ch2_config_reg.hex</RegisterFile> <RegisterFile areaName="Channel 2 Configuration Registers (C2PR)">Registers\ch2_config_reg.hex</RegisterFile>
<RegisterFile areaName="Channel 3 Configuration Registers (C3PR)">Registers\ch3_config_reg.hex</RegisterFile>
<RegisterFile areaName="Diagnosis Configuration Registers (DCR)">Registers\diag_config_reg.hex</RegisterFile> <RegisterFile areaName="Diagnosis Configuration Registers (DCR)">Registers\diag_config_reg.hex</RegisterFile>
<RegisterFile areaName="Crossbar Configuration Registers (XCR)">Registers\io_config_reg.hex</RegisterFile> <RegisterFile areaName="Crossbar Configuration Registers (XCR)">Registers\io_config_reg.hex</RegisterFile>
<MicroCodeFile channel="1" type="source" date="130995272773175445">MicrocodeCh1\ch1.psc</MicroCodeFile> <MicroCodeFile channel="1" type="source" date="130995272773175445">MicrocodeCh1\ch1.psc</MicroCodeFile>
<MicroCodeFile channel="2" type="source" date="130995272773155443">MicrocodeCh2\ch2.psc</MicroCodeFile> <MicroCodeFile channel="2" type="source" date="130995272773155443">MicrocodeCh2\ch2.psc</MicroCodeFile>
<MicroCodeFile channel="3" type="source" date="130995272773145442">MicrocodeCh3\ch3.psc</MicroCodeFile>
<DPramFile channel="1">Registers\dram1.hex</DPramFile> <DPramFile channel="1">Registers\dram1.hex</DPramFile>
<DPramFile channel="2">Registers\dram2.hex</DPramFile> <DPramFile channel="2">Registers\dram2.hex</DPramFile>
<DPramFile channel="3">Registers\dram3.hex</DPramFile>
<AutoLoadFile>Simulator\AutoLoad.xml</AutoLoadFile> <AutoLoadFile>Simulator\AutoLoad.xml</AutoLoadFile>
</Files> </Files>
<General> <General>
@ -163,72 +160,6 @@
<Entry address="62" format="Hex" unit="None" indexSelected="0" /> <Entry address="62" format="Hex" unit="None" indexSelected="0" />
<Entry address="63" format="Hex" unit="None" indexSelected="0" /> <Entry address="63" format="Hex" unit="None" indexSelected="0" />
</DPram> </DPram>
<DPram channel="3" addressFormat="Hex">
<Entry address="0" format="Hex" unit="None" indexSelected="0" />
<Entry address="1" format="Hex" unit="None" indexSelected="0" />
<Entry address="2" format="Hex" unit="None" indexSelected="0" />
<Entry address="3" format="Hex" unit="None" indexSelected="0" />
<Entry address="4" format="Hex" unit="None" indexSelected="0" />
<Entry address="5" format="Hex" unit="None" indexSelected="0" />
<Entry address="6" format="Hex" unit="None" indexSelected="0" />
<Entry address="7" format="Hex" unit="None" indexSelected="0" />
<Entry address="8" format="Hex" unit="None" indexSelected="0" />
<Entry address="9" format="Hex" unit="None" indexSelected="0" />
<Entry address="10" format="Hex" unit="None" indexSelected="0" />
<Entry address="11" format="Hex" unit="None" indexSelected="0" />
<Entry address="12" format="Hex" unit="None" indexSelected="0" />
<Entry address="13" format="Hex" unit="None" indexSelected="0" />
<Entry address="14" format="Hex" unit="None" indexSelected="0" />
<Entry address="15" format="Hex" unit="None" indexSelected="0" />
<Entry address="16" format="Hex" unit="None" indexSelected="0" />
<Entry address="17" format="Hex" unit="None" indexSelected="0" />
<Entry address="18" format="Hex" unit="None" indexSelected="0" />
<Entry address="19" format="Hex" unit="None" indexSelected="0" />
<Entry address="20" format="Hex" unit="None" indexSelected="0" />
<Entry address="21" format="Hex" unit="None" indexSelected="0" />
<Entry address="22" format="Hex" unit="None" indexSelected="0" />
<Entry address="23" format="Hex" unit="None" indexSelected="0" />
<Entry address="24" format="Hex" unit="None" indexSelected="0" />
<Entry address="25" format="Hex" unit="None" indexSelected="0" />
<Entry address="26" format="Hex" unit="None" indexSelected="0" />
<Entry address="27" format="Hex" unit="None" indexSelected="0" />
<Entry address="28" format="Hex" unit="None" indexSelected="0" />
<Entry address="29" format="Hex" unit="None" indexSelected="0" />
<Entry address="30" format="Hex" unit="None" indexSelected="0" />
<Entry address="31" format="Hex" unit="None" indexSelected="0" />
<Entry address="32" format="Hex" unit="None" indexSelected="0" />
<Entry address="33" format="Hex" unit="None" indexSelected="0" />
<Entry address="34" format="Hex" unit="None" indexSelected="0" />
<Entry address="35" format="Hex" unit="None" indexSelected="0" />
<Entry address="36" format="Hex" unit="None" indexSelected="0" />
<Entry address="37" format="Hex" unit="None" indexSelected="0" />
<Entry address="38" format="Hex" unit="None" indexSelected="0" />
<Entry address="39" format="Hex" unit="None" indexSelected="0" />
<Entry address="40" format="Hex" unit="None" indexSelected="0" />
<Entry address="41" format="Hex" unit="None" indexSelected="0" />
<Entry address="42" format="Hex" unit="None" indexSelected="0" />
<Entry address="43" format="Hex" unit="None" indexSelected="0" />
<Entry address="44" format="Hex" unit="None" indexSelected="0" />
<Entry address="45" format="Hex" unit="None" indexSelected="0" />
<Entry address="46" format="Hex" unit="None" indexSelected="0" />
<Entry address="47" format="Hex" unit="None" indexSelected="0" />
<Entry address="48" format="Hex" unit="None" indexSelected="0" />
<Entry address="49" format="Hex" unit="None" indexSelected="0" />
<Entry address="50" format="Hex" unit="None" indexSelected="0" />
<Entry address="51" format="Hex" unit="None" indexSelected="0" />
<Entry address="52" format="Hex" unit="None" indexSelected="0" />
<Entry address="53" format="Hex" unit="None" indexSelected="0" />
<Entry address="54" format="Hex" unit="None" indexSelected="0" />
<Entry address="55" format="Hex" unit="None" indexSelected="0" />
<Entry address="56" format="Hex" unit="None" indexSelected="0" />
<Entry address="57" format="Hex" unit="None" indexSelected="0" />
<Entry address="58" format="Hex" unit="None" indexSelected="0" />
<Entry address="59" format="Hex" unit="None" indexSelected="0" />
<Entry address="60" format="Hex" unit="None" indexSelected="0" />
<Entry address="61" format="Hex" unit="None" indexSelected="0" />
<Entry address="62" format="Hex" unit="None" indexSelected="0" />
<Entry address="63" format="Hex" unit="None" indexSelected="0" />
</DPram>
<RegisterArea name="Main Configuration Registers (MCR)"> <RegisterArea name="Main Configuration Registers (MCR)">
<Reg>Hex</Reg> <Reg>Hex</Reg>
<Reg>Hex</Reg> <Reg>Hex</Reg>

3
firmware/hw_layer/mc33816/rusefi/readme.md
View File

@ -4,9 +4,8 @@ Source code here is different from but is heavily inspired by MC33816 example as
* Hit 'Build' button in MC33816 Developer Studio to get assembly stuff in 'build' folder. At the moment we use PT2001 version * Hit 'Build' button in MC33816 Developer Studio to get assembly stuff in 'build' folder. At the moment we use PT2001 version
of the chip so actually "PT2001 Developer studio" of the chip so actually "PT2001 Developer studio"
* Once you are done wit 'Build' second step is 'Generate PT2001 Load Data Code'. See sample_code/PT2001_LoadData.c * Once you are done wit 'Build' second step is 'Generate PT2001 Load Data Code'. See sample_code/PT2001_LoadData.c. Some of the files in this directory are included/compiled in to rusEFI, in order to download the firmware and configuration to the PT2001.
* Fun fact: it looks like the difference between "MC33816 Developer Studio" and "PT2001 Developer studio" is ``assembler\cipher\key4.key`` file * Fun fact: it looks like the difference between "MC33816 Developer Studio" and "PT2001 Developer studio" is ``assembler\cipher\key4.key`` file
Just in case we have a backup of both tools at https://github.com/rusefi/rusefi_external_utils/tree/master/NXP-GDI Just in case we have a backup of both tools at https://github.com/rusefi/rusefi_external_utils/tree/master/NXP-GDI

83
firmware/hw_layer/mc33816_data.cpp → firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.c
View File

@ -1,21 +1,54 @@
/* /*******************************************************************************
* mc33816_data.c * Example Code
* *
* For historic reasons rusEFI source code refers to all this as mc33816 while the microcode * Copyright(C) 2022 NXP Semiconductors
* is signed with MC33PT2001 key. to use real mc33816 you would have to replace binary data with true mc33816 version * NXP Semiconductors Confidential and Proprietary
* *
* this is manual copy-paste of sample_code/PT2001_LoadData.c * Software that is described herein is for illustrative purposes only
* see mc33816/rusefi/readme.md * which provides customers with programming information regarding the
*/ * NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
#include "pch.h" //==============================================================================
// This file contains data arrays that are used to load the code RAM, data RAM
// and registers on the PT2001.
//==============================================================================
#include "mc33816_data.h" // ECU: IDE Project
// Project: rusefi
#if EFI_MC33816 #include "PT2001_LoadData.h"
// Data to be loaded into the Code RAM 1 memory space // Data to be loaded into the Code RAM 1 memory space
const unsigned short MC33816_code_RAM1[88] = unsigned short PT2001_code_RAM1[88] =
{ {
0x7612, 0x6C2B, 0x917F, 0xA514, 0x8DD1, 0xC289, 0x7C38, 0xA73B, 0xF359, 0x56C3, 0x7612, 0x6C2B, 0x917F, 0xA514, 0x8DD1, 0xC289, 0x7C38, 0xA73B, 0xF359, 0x56C3,
0xEE73, 0x812F, 0xDFA9, 0x2ED5, 0x2722, 0xBC58, 0x649B, 0xFB66, 0xFAD7, 0xBB51, 0xEE73, 0x812F, 0xDFA9, 0x2ED5, 0x2722, 0xBC58, 0x649B, 0xFB66, 0xFAD7, 0xBB51,
@ -29,7 +62,7 @@ const unsigned short MC33816_code_RAM1[88] =
}; };
// Data to be loaded into the Code RAM 2 memory space // Data to be loaded into the Code RAM 2 memory space
const unsigned short MC33816_code_RAM2[43] = unsigned short PT2001_code_RAM2[43] =
{ {
0x761B, 0x6F45, 0x838D, 0x80B4, 0x53F2, 0x0EBC, 0x8F2D, 0xA78E, 0xE8AB, 0xE3DB, 0x761B, 0x6F45, 0x838D, 0x80B4, 0x53F2, 0x0EBC, 0x8F2D, 0xA78E, 0xE8AB, 0xE3DB,
0xF477, 0x800F, 0x2336, 0x2F77, 0x267B, 0xBC19, 0x007E, 0x4E55, 0x28AA, 0x52E4, 0xF477, 0x800F, 0x2336, 0x2F77, 0x267B, 0xBC19, 0x007E, 0x4E55, 0x28AA, 0x52E4,
@ -39,10 +72,10 @@ const unsigned short MC33816_code_RAM2[43] =
}; };
// Data to be loaded into the Data RAM memory space // Data to be loaded into the Data RAM memory space
const unsigned short MC33816_data_RAM[128] = unsigned short PT2001_data_RAM[128] =
{ {
0x00F0, 0x00F0, 0x008C, 0x2000, 0x01F4, 0x00B4, 0x003C, 0xEA60, 0x0000, 0x003D, 0x00F0, 0x00F0, 0x008C, 0x2000, 0x01F4, 0x00B4, 0x003C, 0xEA60, 0x0000, 0x0000,
0x6000, 0x003C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
@ -56,44 +89,41 @@ const unsigned short MC33816_data_RAM[128] =
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
}; };
// 0x1CE
// if set to '1' Driver_status register is reset on read.
#define Rsetbr 1
// Data to be loaded into the Main register memory space // Data to be loaded into the Main register memory space
const unsigned short MC33816_main_config[29] = unsigned short PT2001_main_config[29] =
{ {
0x0003, 0x1FFE, 0x0000, 0x1200, 0x0000, 0x0000, 0x0001, 0x0000, 0x001F, 0x0000, 0x0003, 0x1FFE, 0x0000, 0x1200, 0x0000, 0x0000, 0x0001, 0x0000, 0x001F, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, Rsetbr, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
}; };
// Data to be loaded into the CH1 register memory space // Data to be loaded into the CH1 register memory space
const unsigned short MC33816_ch1_config[19] = unsigned short PT2001_ch1_config[19] =
{ {
0x0008, 0x0000, 0x0000, 0x0000, 0x0303, 0x0000, 0x0000, 0x0058, 0x8E62, 0x7B23, 0x0008, 0x0000, 0x0000, 0x0000, 0x0303, 0x0000, 0x0000, 0x0058, 0x8E62, 0x7B23,
0x0000, 0x002C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 0x0000, 0x002C, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
}; };
// Data to be loaded into the CH2 register memory space // Data to be loaded into the CH2 register memory space
const unsigned short MC33816_ch2_config[19] = unsigned short PT2001_ch2_config[19] =
{ {
0x0008, 0x0000, 0x0000, 0x0000, 0x0C00, 0x0000, 0x0000, 0x002B, 0x218C, 0xDCB6, 0x0008, 0x0000, 0x0000, 0x0000, 0x0C00, 0x0000, 0x0000, 0x002B, 0x218C, 0xDCB6,
0x0000, 0x0014, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 0x0000, 0x0014, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
}; };
// Data to be loaded into the IO register memory space // Data to be loaded into the IO register memory space
const unsigned short MC33816_io_config[44] = unsigned short PT2001_io_config[53] =
{ {
0x0000, 0x0000, 0x0000, 0x0000, 0x0063, 0x018C, 0x0800, 0x0410, 0x0041, 0x0098, 0x0000, 0x0000, 0x0000, 0x0000, 0x0063, 0x018C, 0x0800, 0x0410, 0x0041, 0x0098,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0041, 0x0041, 0x0041, 0x0000, 0x0004, 0x1000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0041, 0x0041, 0x0041, 0x0000, 0x0004, 0x1000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x7F7F, 0x7F7F, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x7F7F, 0x7F7F,
0x007F, 0x0000, 0x0000, 0x0000 0x007F, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000
}; };
// Data to be loaded into the Diag register memory space // Data to be loaded into the Diag register memory space
const unsigned short MC33816_diag_config[44] = unsigned short PT2001_diag_config[44] =
{ {
0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000,
0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x0000, 0x0000, 0x001E, 0x001E, 0x0000,
@ -102,4 +132,3 @@ const unsigned short MC33816_diag_config[44] =
0x0000, 0x0000, 0x0000, 0x0001 0x0000, 0x0000, 0x0000, 0x0001
}; };
#endif // EFI_MC33816

60
firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_LoadData.h Normal file
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@ -0,0 +1,60 @@
/*******************************************************************************
* Example Code
*
* Copyright(C) 2022 NXP Semiconductors
* NXP Semiconductors Confidential and Proprietary
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
//==============================================================================
// This file contains data array declarations for the code RAM, data RAM and
// register arrays for the PT2001.
//==============================================================================
// ECU: IDE Project
// Project: rusefi
#ifndef PT2001_DATA_H_
#define PT2001_DATA_H_
extern unsigned short PT2001_code_RAM1[88]; // CODE RAM CH 1
extern unsigned short PT2001_code_RAM2[43]; // CODE RAM CH 2
extern unsigned short PT2001_data_RAM[128]; // DATA RAM
extern unsigned short PT2001_main_config[29]; // main configurations
extern unsigned short PT2001_ch1_config[19]; // CH 1 configurations
extern unsigned short PT2001_ch2_config[19]; // CH 2 configurations
extern unsigned short PT2001_io_config[53]; // IO configurations
extern unsigned short PT2001_diag_config[44]; // diag configurations
#endif /* PT2001_DATA_H_ */

70
firmware/hw_layer/mc33816/rusefi/sample_code/PT2001_dram.h Normal file
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@ -0,0 +1,70 @@
/*******************************************************************************
* Example Code
*
* Copyright(C) 2022 NXP Semiconductors
* NXP Semiconductors Confidential and Proprietary
*
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* NXP products. This software is supplied "AS IS" without any warranties
* of any kind, and NXP Semiconductors and its licensor disclaim any and
* all warranties, express or implied, including all implied warranties of
* merchantability, fitness for a particular purpose and non-infringement of
* intellectual property rights. NXP Semiconductors assumes no responsibility
* or liability for the use of the software, conveys no license or rights
* under any patent, copyright, mask work right, or any other intellectual
* property rights in or to any products. NXP Semiconductors reserves the
* right to make changes in the software without notification. NXP
* Semiconductors also makes no representation or warranty that such
* application will be suitable for the specified use without further testing
* or modification.
*
* IN NO EVENT WILL NXP SEMICONDUCTORS BE LIABLE, WHETHER IN CONTRACT,
* TORT, OR OTHERWISE, FOR ANY INCIDENTAL, SPECIAL, INDIRECT, CONSEQUENTIAL
* OR PUNITIVE DAMAGES, INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR ANY
* LOSS OF USE, LOSS OF TIME, INCONVENIENCE, COMMERCIAL LOSS, OR LOST
* PROFITS, SAVINGS, OR REVENUES, TO THE FULL EXTENT SUCH MAY BE DISCLAIMED
* BY LAW. NXP SEMICONDUCTOR’S TOTAL LIABILITY FOR ALL COSTS, DAMAGES,
* CLAIMS, OR LOSSES WHATSOEVER ARISING OUT OF OR IN CONNECTION WITH THE
* SOFTWARE IS LIMITED TO THE AGGREGATE AMOUNT PAID BY YOU TO NXP SEMICONDUCTORS
* IN CONNECTION WITH THE SOFTWARE TO WHICH LOSSES OR DAMAGES ARE CLAIMED.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation is hereby granted, under NXP Semiconductors' and its
* licensor's relevant copyrights in the software, without fee, provided
* that it is used in conjunction with NXP Semiconductors devices. This
* copyright, permission, and disclaimer notice must appear in all copies
* of this code.
*******************************************************************************/
/*
* PT2001_dram.h
*
* DRAM Header File
*
*/
#ifndef PT2001_DRAM_H_
#define PT2001_DRAM_H_
// DRAM 1 Parameter Addresses
#define PT2001_D1_Iboost 0x00
#define PT2001_D1_Ipeak 0x01
#define PT2001_D1_Ihold 0x02
#define PT2001_D1_Tpeak_off 0x03
#define PT2001_D1_Tpeak_tot 0x04
#define PT2001_D1_Tbypass 0x05
#define PT2001_D1_Thold_off 0x06
#define PT2001_D1_Thold_tot 0x07
// DRAM 2 Parameter Addresses
#define PT2001_D2_Vboost_high 0x40
#define PT2001_D2_Vboost_low 0x41
#define PT2001_D2_Isense4_high 0x42
#define PT2001_D2_Isense4_low 0x43
#define PT2001_D2_PCV_Ipeak 0x45
#define PT2001_D2_PCV_Ihold 0x46
#define PT2001_D2_PCV_Thold_off 0x47
#define PT2001_D2_PCV_Thold_tot 0x48
#endif /* PT2001_DRAM_H_ */

18
firmware/hw_layer/mc33816_data.h
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@ -1,18 +0,0 @@
/*
* mc33816_data.h
*
* @date May 3, 2019
* @author Andrey Belomutskiy, (c) 2012-2020
*/
#pragma once
extern const unsigned short MC33816_code_RAM1[88]; // CODE RAM CH 1
extern const unsigned short MC33816_code_RAM2[43]; // CODE RAM CH 2
extern const unsigned short MC33816_data_RAM[128]; // DATA RAM
extern const unsigned short MC33816_main_config[29]; // main configurations
extern const unsigned short MC33816_ch1_config[19]; // CH 1 configurations
extern const unsigned short MC33816_ch2_config[19]; // CH 2 configurations
extern const unsigned short MC33816_io_config[44]; // IO configurations
extern const unsigned short MC33816_diag_config[44]; // diag configurations

34
firmware/hw_layer/mc33816_memory_map.h
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@ -2,23 +2,25 @@
* see mc33816/rusefi/readme.md * see mc33816/rusefi/readme.md
*/ */
#include "mc33816/rusefi/sample_code/PT2001_dram.h"
typedef enum { typedef enum {
// see dram1.def values // see dram1.def values
Iboost = 0, Iboost = PT2001_D1_Iboost,
Ipeak = 1, Ipeak = PT2001_D1_Ipeak,
Ihold = 2, Ihold = PT2001_D1_Ihold,
Tpeak_off = 3, Tpeak_off = PT2001_D1_Tpeak_off,
Tpeak_tot = 4, Tpeak_tot = PT2001_D1_Tpeak_tot,
Tbypass = 5, Tbypass = PT2001_D1_Tbypass,
Thold_off = 6, Thold_off = PT2001_D1_Thold_off,
Thold_tot = 7, Thold_tot = PT2001_D1_Thold_tot,
// see dram2.def values, base 64 for channel 2 // see dram2.def values, base 64 for channel 2
Vboost_high = 64, Vboost_high = PT2001_D2_Vboost_high,
Vboost_low = 65, Vboost_low = PT2001_D2_Vboost_low,
Isense4_high = 66, Isense4_high = PT2001_D2_Isense4_high,
Isense4_low = 67, Isense4_low = PT2001_D2_Isense4_low,
HPFP_Ipeak = 69, HPFP_Ipeak = PT2001_D2_PCV_Ipeak,
HPFP_Ihold = 70, HPFP_Ihold = PT2001_D2_PCV_Ihold,
HPFP_Thold_off = 71, HPFP_Thold_off = PT2001_D2_PCV_Thold_off,
HPFP_Thold_tot = 72, HPFP_Thold_tot = PT2001_D2_PCV_Thold_tot,
} MC33816Mem; } MC33816Mem;