This commit is contained in:
rusefi 2017-05-14 15:46:13 -04:00
parent 819aeadd42
commit dcc6ecfa75
1 changed files with 9 additions and 6 deletions

View File

@ -280,12 +280,15 @@
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12
/**
* UART priority should not be too low so that we do not miss bytes
*/
#define STM32_SERIAL_USART1_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
#define STM32_SERIAL_USART2_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
#define STM32_SERIAL_USART3_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
#define STM32_SERIAL_UART4_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
#define STM32_SERIAL_UART5_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
#define STM32_SERIAL_USART6_PRIORITY (PRECISE_SCHEDULING_TIMER_PRIORITY + 2)
/*
* SPI driver system settings.