mirror of https://github.com/rusefi/rusefi-1.git
moving from discovery to brain board
This commit is contained in:
rusefi
parent
8a5f3eb38c
commit
eda9751bbd
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@ -91,7 +91,7 @@ CHIBIOS = ChibiOS
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CHIBIOS_CONTRIB = ChibiOS-Contrib
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ifneq ($(PROJECT_BOARD),OLIMEX_STM32_E407)
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PROJECT_BOARD = ST_STM32F4_DISCOVERY
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PROJECT_BOARD = ST_STM32F4
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endif
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DDEFS += -D$(PROJECT_BOARD)
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@ -1,5 +1,5 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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@ -14,7 +14,11 @@
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limitations under the License.
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*/
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#include "ch.h"
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#include "hal.h"
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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@ -23,26 +27,43 @@
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* @details Digital I/O ports static configuration as defined in @p board.h.
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* This variable is used by the HAL when initializing the PAL driver.
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*/
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const PALConfig pal_default_config =
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{
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const PALConfig pal_default_config = {
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#if STM32_HAS_GPIOA
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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#endif
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#if STM32_HAS_GPIOB
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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#endif
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#if STM32_HAS_GPIOC
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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#endif
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#if STM32_HAS_GPIOD
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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#endif
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#if STM32_HAS_GPIOE
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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#endif
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#if STM32_HAS_GPIOF
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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#endif
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#if STM32_HAS_GPIOG
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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#endif
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#if STM32_HAS_GPIOH
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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#endif
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#if STM32_HAS_GPIOI
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{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
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VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
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#endif
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};
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#endif
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@ -60,21 +81,21 @@ void __early_init(void) {
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/**
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* @brief SDC card detection.
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*/
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bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
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(void)sdcp;
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/* TODO: Fill the implementation.*/
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return TRUE;
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return true;
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}
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/**
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* @brief SDC card write protection detection.
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*/
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bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
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bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
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(void)sdcp;
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/* TODO: Fill the implementation.*/
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return FALSE;
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return false;
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}
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#endif /* HAL_USE_SDC */
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@ -82,21 +103,21 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
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/**
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* @brief MMC_SPI card detection.
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*/
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bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return TRUE;
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return true;
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}
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/**
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* @brief MMC_SPI card write protection detection.
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*/
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bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
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bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
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(void)mmcp;
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/* TODO: Fill the implementation.*/
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return FALSE;
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return false;
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}
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#endif
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@ -1,5 +1,5 @@
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/*
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ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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@ -14,8 +14,13 @@
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limitations under the License.
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*/
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#ifndef _BOARD_H_
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#define _BOARD_H_
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*
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* Setup for STMicroelectronics STM32F4-Discovery board.
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@ -25,32 +30,30 @@
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* Board identifier.
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*/
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#define BOARD_ST_STM32F4_DISCOVERY
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#define BOARD_NAME "STMicroelectronics STM32F4-Discovery"
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#define STM32_LSECLK 32768
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#define BOARD_NAME "STM32F4-Discovery for RusEFI"
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 0
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#define STM32_LSECLK 32768U
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#endif
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 8000000
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#define STM32_HSECLK 8000000U
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 300
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#define STM32_VDD 300U
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/*
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* MCU type as defined in the ST header.
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*/
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#define STM32F40_41xxx
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#define STM32F407xx
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/*
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* IO pins assignments.
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@ -208,27 +211,70 @@
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#define GPIOI_PIN14 14
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#define GPIOI_PIN15 15
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/*
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* IO lines assignments.
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*/
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#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
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#define LINE_LRCK PAL_LINE(GPIOA, 4U)
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#define LINE_SPC PAL_LINE(GPIOA, 5U)
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#define LINE_SDO PAL_LINE(GPIOA, 6U)
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#define LINE_SDI PAL_LINE(GPIOA, 7U)
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#define LINE_VBUS_FS PAL_LINE(GPIOA, 9U)
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#define LINE_OTG_FS_ID PAL_LINE(GPIOA, 10U)
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#define LINE_OTG_FS_DM PAL_LINE(GPIOA, 11U)
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#define LINE_OTG_FS_DP PAL_LINE(GPIOA, 12U)
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#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
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#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
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#define LINE_SWO PAL_LINE(GPIOB, 3U)
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#define LINE_SCL PAL_LINE(GPIOB, 6U)
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#define LINE_SDA PAL_LINE(GPIOB, 9U)
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#define LINE_CLK_IN PAL_LINE(GPIOB, 10U)
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#define LINE_OTG_FS_POWER_ON PAL_LINE(GPIOC, 0U)
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#define LINE_PDM_OUT PAL_LINE(GPIOC, 3U)
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#define LINE_MCLK PAL_LINE(GPIOC, 7U)
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#define LINE_SCLK PAL_LINE(GPIOC, 10U)
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#define LINE_SDIN PAL_LINE(GPIOC, 12U)
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#define LINE_RESET PAL_LINE(GPIOD, 4U)
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#define LINE_OVER_CURRENT PAL_LINE(GPIOD, 5U)
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#define LINE_LED4 PAL_LINE(GPIOD, 12U)
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#define LINE_LED3 PAL_LINE(GPIOD, 13U)
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#define LINE_LED5 PAL_LINE(GPIOD, 14U)
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#define LINE_LED6 PAL_LINE(GPIOD, 15U)
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#define LINE_INT1 PAL_LINE(GPIOE, 0U)
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#define LINE_INT2 PAL_LINE(GPIOE, 1U)
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#define LINE_CS_SPI PAL_LINE(GPIOE, 3U)
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#define LINE_OSC_IN PAL_LINE(GPIOH, 0U)
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#define LINE_OSC_OUT PAL_LINE(GPIOH, 1U)
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
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#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
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#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
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#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
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#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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/*
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* GPIOA setup:
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@ -282,22 +328,22 @@
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PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
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PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
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PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_BUTTON) | \
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PIN_OSPEED_100M(GPIOA_PIN1) | \
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PIN_OSPEED_100M(GPIOA_PIN2) | \
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PIN_OSPEED_100M(GPIOA_PIN3) | \
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PIN_OSPEED_100M(GPIOA_LRCK) | \
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PIN_OSPEED_50M(GPIOA_SPC) | \
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PIN_OSPEED_50M(GPIOA_SDO) | \
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PIN_OSPEED_50M(GPIOA_SDI) | \
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PIN_OSPEED_100M(GPIOA_PIN8) | \
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PIN_OSPEED_100M(GPIOA_VBUS_FS) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
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PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
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PIN_OSPEED_100M(GPIOA_SWDIO) | \
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PIN_OSPEED_100M(GPIOA_SWCLK) | \
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PIN_OSPEED_100M(GPIOA_PIN15))
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#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_HIGH(GPIOA_BUTTON) | \
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PIN_OSPEED_HIGH(GPIOA_PIN1) | \
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PIN_OSPEED_HIGH(GPIOA_PIN2) | \
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PIN_OSPEED_HIGH(GPIOA_PIN3) | \
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PIN_OSPEED_HIGH(GPIOA_LRCK) | \
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PIN_OSPEED_MEDIUM(GPIOA_SPC) | \
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PIN_OSPEED_MEDIUM(GPIOA_SDO) | \
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PIN_OSPEED_MEDIUM(GPIOA_SDI) | \
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PIN_OSPEED_HIGH(GPIOA_PIN8) | \
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PIN_OSPEED_HIGH(GPIOA_VBUS_FS) | \
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PIN_OSPEED_HIGH(GPIOA_OTG_FS_ID) | \
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PIN_OSPEED_HIGH(GPIOA_OTG_FS_DM) | \
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PIN_OSPEED_HIGH(GPIOA_OTG_FS_DP) | \
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PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
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PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
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PIN_OSPEED_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
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PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
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@ -330,22 +376,22 @@
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PIN_ODR_HIGH(GPIOA_SWDIO) | \
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PIN_ODR_HIGH(GPIOA_SWCLK) | \
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PIN_ODR_HIGH(GPIOA_PIN15))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \
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PIN_AFIO_AF(GPIOA_PIN1, 0) | \
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PIN_AFIO_AF(GPIOA_PIN2, 0) | \
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PIN_AFIO_AF(GPIOA_PIN3, 0) | \
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PIN_AFIO_AF(GPIOA_LRCK, 6) | \
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PIN_AFIO_AF(GPIOA_SPC, 5) | \
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PIN_AFIO_AF(GPIOA_SDO, 5) | \
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PIN_AFIO_AF(GPIOA_SDI, 5))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
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PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
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PIN_AFIO_AF(GPIOA_PIN15, 0))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
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PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
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PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
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PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
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PIN_AFIO_AF(GPIOA_LRCK, 6U) | \
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PIN_AFIO_AF(GPIOA_SPC, 5U) | \
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PIN_AFIO_AF(GPIOA_SDO, 5U) | \
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PIN_AFIO_AF(GPIOA_SDI, 5U))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
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PIN_AFIO_AF(GPIOA_VBUS_FS, 0U) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10U) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10U) | \
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PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10U) | \
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PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
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PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
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PIN_AFIO_AF(GPIOA_PIN15, 0U))
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/*
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* GPIOB setup:
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@ -376,8 +422,8 @@
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PIN_MODE_ALTERNATE(GPIOB_SCL) | \
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PIN_MODE_INPUT(GPIOB_PIN7) | \
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PIN_MODE_INPUT(GPIOB_PIN8) | \
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PIN_MODE_INPUT(GPIOB_PIN9) | \
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PIN_MODE_INPUT(GPIOB_PIN10) | \
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PIN_MODE_INPUT(GPIOB_PIN9) | \
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PIN_MODE_INPUT(GPIOB_PIN10) | \
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PIN_MODE_INPUT(GPIOB_PIN11) | \
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PIN_MODE_INPUT(GPIOB_PIN12) | \
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PIN_MODE_INPUT(GPIOB_PIN13) | \
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@ -389,7 +435,7 @@
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PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
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PIN_OTYPE_PUSHPULL(GPIOB_SCL) | \
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PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
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PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
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@ -399,28 +445,28 @@
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PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOB_SWO) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOB_SCL) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_PUPDR (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
|
||||
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_HIGH(GPIOB_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_SWO) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_SCL) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
|
||||
PIN_PUPDR_FLOATING(GPIOB_SWO) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOB_PIN4) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOB_PIN5) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
|
||||
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
|
||||
PIN_PUPDR_FLOATING(GPIOB_SCL) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOB_PIN8) | \
|
||||
|
|
@ -447,22 +493,22 @@
|
|||
PIN_ODR_HIGH(GPIOB_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOB_PIN15))
|
||||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_SWO, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_SCL, 4) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN7, 0))
|
||||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN9, 4) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN15, 0))
|
||||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_SWO, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_SCL, 4U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN7, 0U))
|
||||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOB_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOC setup:
|
||||
|
|
@ -512,26 +558,26 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\
|
||||
PIN_OSPEED_100M(GPIOC_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_HIGH(GPIOC_OTG_FS_POWER_ON) |\
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
|
||||
PIN_PUPDR_PULLDOWN(GPIOC_PIN1) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOC_PIN2) | \
|
||||
|
|
@ -564,22 +610,22 @@
|
|||
PIN_ODR_HIGH(GPIOC_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOC_PIN15))
|
||||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\
|
||||
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN7, 6))
|
||||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN10, 6) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN12, 6) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN15, 0))
|
||||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0U) |\
|
||||
PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN7, 0U))
|
||||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOC_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOD setup:
|
||||
|
|
@ -633,32 +679,32 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOD_LED6))
|
||||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOD_RESET) | \
|
||||
PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOD_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOD_LED4) | \
|
||||
PIN_OSPEED_100M(GPIOD_LED3) | \
|
||||
PIN_OSPEED_100M(GPIOD_LED5) | \
|
||||
PIN_OSPEED_100M(GPIOD_LED6))
|
||||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLDOWN(GPIOD_PIN0) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN1) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN2) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN3) | \
|
||||
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_HIGH(GPIOD_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_RESET) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_OVER_CURRENT) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_LED4) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_LED3) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_LED5) | \
|
||||
PIN_OSPEED_HIGH(GPIOD_LED6))
|
||||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
|
||||
PIN_PUPDR_FLOATING(GPIOD_RESET) | \
|
||||
PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN6) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN7) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN8) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOD_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
|
||||
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
|
||||
PIN_PUPDR_FLOATING(GPIOD_LED4) | \
|
||||
|
|
@ -681,30 +727,30 @@
|
|||
PIN_ODR_LOW(GPIOD_LED3) | \
|
||||
PIN_ODR_LOW(GPIOD_LED5) | \
|
||||
PIN_ODR_LOW(GPIOD_LED6))
|
||||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_RESET, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN7, 0))
|
||||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_LED4, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_LED3, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_LED5, 0) | \
|
||||
PIN_AFIO_AF(GPIOD_LED6, 0))
|
||||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_RESET, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN7, 0U))
|
||||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_LED4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_LED3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_LED5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOD_LED6, 0U))
|
||||
|
||||
/*
|
||||
* GPIOE setup:
|
||||
*
|
||||
* PE0 - PIN0 (input floating).
|
||||
* PE1 - PIN1 (input floating).
|
||||
* PE0 - INT1 (input floating).
|
||||
* PE1 - INT2 (input floating).
|
||||
* PE2 - PIN2 (input floating).
|
||||
* PE3 - PIN3 (input floating).
|
||||
* PE3 - CS_SPI (output pushpull maximum).
|
||||
* PE4 - PIN4 (input floating).
|
||||
* PE5 - PIN5 (input floating).
|
||||
* PE6 - PIN6 (input floating).
|
||||
|
|
@ -721,7 +767,7 @@
|
|||
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN1) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN2) | \
|
||||
PIN_MODE_OUTPUT(GPIOE_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN3) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN4) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN5) | \
|
||||
PIN_MODE_INPUT(GPIOE_PIN6) | \
|
||||
|
|
@ -750,38 +796,38 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLDOWN(GPIOE_PIN0) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN1) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN2) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN4) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN5) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN6) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN7) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN8) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN9) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN10) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN11) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN12) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN13) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN14) | \
|
||||
PIN_PUPDR_PULLDOWN(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_HIGH(GPIOE_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_PIN0) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN2) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN4) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN5) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \
|
||||
PIN_PUPDR_FLOATING(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN1) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN2) | \
|
||||
|
|
@ -798,22 +844,22 @@
|
|||
PIN_ODR_HIGH(GPIOE_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOE_PIN15))
|
||||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN7, 0))
|
||||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN15, 0))
|
||||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN7, 0U))
|
||||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOE_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOF setup:
|
||||
|
|
@ -867,22 +913,22 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \
|
||||
PIN_PUPDR_FLOATING(GPIOF_PIN1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOF_PIN2) | \
|
||||
|
|
@ -915,22 +961,22 @@
|
|||
PIN_ODR_HIGH(GPIOF_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOF_PIN15))
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN7, 0))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN15, 0))
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN7, 0U))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOF_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOG setup:
|
||||
|
|
@ -984,22 +1030,22 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
|
||||
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOG_PIN15))
|
||||
#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_HIGH(GPIOG_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOG_PIN15))
|
||||
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \
|
||||
PIN_PUPDR_FLOATING(GPIOG_PIN1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOG_PIN2) | \
|
||||
|
|
@ -1032,22 +1078,22 @@
|
|||
PIN_ODR_HIGH(GPIOG_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOG_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOG_PIN15))
|
||||
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN7, 0))
|
||||
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN15, 0))
|
||||
#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN7, 0U))
|
||||
#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOG_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOH setup:
|
||||
|
|
@ -1101,22 +1147,22 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
|
||||
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \
|
||||
PIN_OSPEED_100M(GPIOH_OSC_OUT) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOH_PIN15))
|
||||
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_HIGH(GPIOH_OSC_IN) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_OSC_OUT) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOH_PIN15))
|
||||
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
|
||||
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \
|
||||
PIN_PUPDR_FLOATING(GPIOH_PIN2) | \
|
||||
|
|
@ -1149,22 +1195,22 @@
|
|||
PIN_ODR_HIGH(GPIOH_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOH_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOH_PIN15))
|
||||
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN7, 0))
|
||||
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN15, 0))
|
||||
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_OSC_OUT, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN7, 0U))
|
||||
#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOH_PIN15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOI setup:
|
||||
|
|
@ -1218,22 +1264,22 @@
|
|||
PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \
|
||||
PIN_OTYPE_PUSHPULL(GPIOI_PIN15))
|
||||
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN1) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN2) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN3) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN4) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN5) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN6) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN7) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN8) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN9) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN10) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN11) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN12) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN13) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN14) | \
|
||||
PIN_OSPEED_100M(GPIOI_PIN15))
|
||||
#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_HIGH(GPIOI_PIN0) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN1) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN2) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN3) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN4) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN5) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN6) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN7) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN8) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN9) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN10) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN11) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN12) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN13) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN14) | \
|
||||
PIN_OSPEED_HIGH(GPIOI_PIN15))
|
||||
#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \
|
||||
PIN_PUPDR_FLOATING(GPIOI_PIN1) | \
|
||||
PIN_PUPDR_FLOATING(GPIOI_PIN2) | \
|
||||
|
|
@ -1266,22 +1312,22 @@
|
|||
PIN_ODR_HIGH(GPIOI_PIN13) | \
|
||||
PIN_ODR_HIGH(GPIOI_PIN14) | \
|
||||
PIN_ODR_HIGH(GPIOI_PIN15))
|
||||
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN1, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN2, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN3, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN4, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN5, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN6, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN7, 0))
|
||||
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN9, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN10, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN11, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN12, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN13, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN14, 0) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN15, 0))
|
||||
#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN1, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN2, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN3, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN4, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN5, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN6, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN7, 0U))
|
||||
#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN9, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN10, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN11, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN12, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN13, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN14, 0U) | \
|
||||
PIN_AFIO_AF(GPIOI_PIN15, 0U))
|
||||
|
||||
|
||||
#if !defined(_FROM_ASM_)
|
||||
|
|
@ -1294,4 +1340,4 @@ extern "C" {
|
|||
#endif
|
||||
#endif /* _FROM_ASM_ */
|
||||
|
||||
#endif /* _BOARD_H_ */
|
||||
#endif /* BOARD_H */
|
||||
|
|
|
|||
|
|
@ -1,129 +0,0 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file has been automatically generated using ChibiStudio board
|
||||
* generator plugin. Do not edit manually.
|
||||
*/
|
||||
|
||||
#include "hal.h"
|
||||
|
||||
#if HAL_USE_PAL || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief PAL setup.
|
||||
* @details Digital I/O ports static configuration as defined in @p board.h.
|
||||
* This variable is used by the HAL when initializing the PAL driver.
|
||||
*/
|
||||
const PALConfig pal_default_config = {
|
||||
#if STM32_HAS_GPIOA
|
||||
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
|
||||
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOB
|
||||
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
|
||||
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOC
|
||||
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
|
||||
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOD
|
||||
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
|
||||
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOE
|
||||
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
|
||||
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOF
|
||||
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
|
||||
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOG
|
||||
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
|
||||
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOH
|
||||
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
|
||||
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
|
||||
#endif
|
||||
#if STM32_HAS_GPIOI
|
||||
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
|
||||
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
|
||||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Early initialization code.
|
||||
* @details This initialization must be performed just after stack setup
|
||||
* and before any other initialization.
|
||||
*/
|
||||
void __early_init(void) {
|
||||
|
||||
stm32_clock_init();
|
||||
}
|
||||
|
||||
#if HAL_USE_SDC || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief SDC card detection.
|
||||
*/
|
||||
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief SDC card write protection detection.
|
||||
*/
|
||||
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
|
||||
|
||||
(void)sdcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif /* HAL_USE_SDC */
|
||||
|
||||
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief MMC_SPI card detection.
|
||||
*/
|
||||
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
|
||||
|
||||
(void)mmcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return true;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief MMC_SPI card write protection detection.
|
||||
*/
|
||||
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
|
||||
|
||||
(void)mmcp;
|
||||
/* TODO: Fill the implementation.*/
|
||||
return false;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Board-specific initialization code.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void boardInit(void) {
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,5 +0,0 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = $(PROJECT_DIR)/config/boards/ST_STM32F4_DISCOVERY/board.c
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(PROJECT_DIR)/config/boards/ST_STM32F4_DISCOVERY
|
||||
Loading…
Reference in New Issue