auto-sync

This commit is contained in:
rusEfi 2016-02-04 12:01:41 -05:00
parent 0faf7ab4c3
commit f3e49f96ae
7 changed files with 20 additions and 20 deletions

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@ -42,7 +42,7 @@ extern AdcDevice fastAdc;
static void processAdcPin(AdcDevice *adc, int index) { static void processAdcPin(AdcDevice *adc, int index) {
adc_channel_e hwIndex = adc->getAdcHardwareIndexByInternalIndex(index); adc_channel_e hwIndex = adc->getAdcHardwareIndexByInternalIndex(index);
GPIO_TypeDef* port = getAdcChannelPort(hwIndex); ioportid_t port = getAdcChannelPort(hwIndex);
int pin = getAdcChannelPin(hwIndex); int pin = getAdcChannelPin(hwIndex);
int copy = stepCoutner; int copy = stepCoutner;
@ -114,7 +114,7 @@ int pinsCount = sizeof(BLINK_PINS) / sizeof(brain_pin_e);
static THD_WORKING_AREA(btThreadStack, UTILITY_THREAD_STACK_SIZE); static THD_WORKING_AREA(btThreadStack, UTILITY_THREAD_STACK_SIZE);
static void setCurrentPinValue(bool value) { static void setCurrentPinValue(bool value) {
GPIO_TypeDef *hwPort = getHwPort(currentPin); ioportid_t hwPort = getHwPort(currentPin);
uint32_t hwPin = getHwPin(currentPin); uint32_t hwPin = getHwPin(currentPin);
palWritePad(hwPort, hwPin, value); palWritePad(hwPort, hwPin, value);
} }

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@ -30,7 +30,7 @@
/** /**
* @brief Initialize the hardware output pin while also assigning it a logical name * @brief Initialize the hardware output pin while also assigning it a logical name
*/ */
void initOutputPinExt(const char *msg, OutputPin *outputPin, GPIO_TypeDef *port, uint32_t pinNumber, iomode_t mode) { void initOutputPinExt(const char *msg, OutputPin *outputPin, ioportid_t port, uint32_t pinNumber, iomode_t mode) {
if (outputPin->port != NULL) { if (outputPin->port != NULL) {
/** /**
* here we check if another physical pin is already assigned to this logical output * here we check if another physical pin is already assigned to this logical output
@ -46,7 +46,7 @@ void initOutputPinExt(const char *msg, OutputPin *outputPin, GPIO_TypeDef *port,
mySetPadMode(msg, port, pinNumber, mode); mySetPadMode(msg, port, pinNumber, mode);
} }
void initOutputPin(const char *msg, OutputPin *outputPin, GPIO_TypeDef *port, uint32_t pinNumber) { void initOutputPin(const char *msg, OutputPin *outputPin, ioportid_t port, uint32_t pinNumber) {
initOutputPinExt(msg, outputPin, port, pinNumber, PAL_MODE_OUTPUT_PUSHPULL); initOutputPinExt(msg, outputPin, port, pinNumber, PAL_MODE_OUTPUT_PUSHPULL);
} }

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@ -13,7 +13,7 @@
#define INITIAL_PIN_STATE -1 #define INITIAL_PIN_STATE -1
void initOutputPin(const char *msg, OutputPin *outputPin, GPIO_TypeDef *port, uint32_t pinNumber); void initOutputPin(const char *msg, OutputPin *outputPin, ioportid_t port, uint32_t pinNumber);
void initOutputPinExt(const char *msg, OutputPin *outputPin, GPIO_TypeDef *port, uint32_t pinNumber, iomode_t mode); void initOutputPinExt(const char *msg, OutputPin *outputPin, ioportid_t port, uint32_t pinNumber, iomode_t mode);
#endif /* GPIO_HELPER_H_ */ #endif /* GPIO_HELPER_H_ */

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@ -30,9 +30,9 @@ static OutputPin sdCsPin;
extern engine_pins_s enginePins; extern engine_pins_s enginePins;
#if defined(STM32F4XX) #if defined(STM32F4XX)
static GPIO_TypeDef *PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH }; static ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH };
#else #else
static GPIO_TypeDef *PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOF}; static ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOF};
#endif #endif
pin_output_mode_e DEFAULT_OUTPUT = OM_DEFAULT; pin_output_mode_e DEFAULT_OUTPUT = OM_DEFAULT;
@ -41,7 +41,7 @@ pin_output_mode_e OPENDRAIN_OUTPUT = OM_OPENDRAIN;
/** /**
* This method is used for digital GPIO pins only, for peripheral pins see mySetPadMode * This method is used for digital GPIO pins only, for peripheral pins see mySetPadMode
*/ */
static void outputPinRegisterExt(const char *msg, OutputPin *output, GPIO_TypeDef *port, uint32_t pin, static void outputPinRegisterExt(const char *msg, OutputPin *output, ioportid_t port, uint32_t pin,
pin_output_mode_e *outputMode) { pin_output_mode_e *outputMode) {
#if EFI_GPIO #if EFI_GPIO
if (port == GPIO_NULL) { if (port == GPIO_NULL) {
@ -61,7 +61,7 @@ static void outputPinRegisterExt(const char *msg, OutputPin *output, GPIO_TypeDe
#endif #endif
} }
GPIO_TypeDef * getHwPort(brain_pin_e brainPin) { ioportid_t getHwPort(brain_pin_e brainPin) {
if (brainPin == GPIO_UNASSIGNED) if (brainPin == GPIO_UNASSIGNED)
return GPIO_NULL; return GPIO_NULL;
if (brainPin > GPIO_UNASSIGNED || brainPin < 0) { if (brainPin > GPIO_UNASSIGNED || brainPin < 0) {
@ -84,13 +84,13 @@ ioportmask_t getHwPin(brain_pin_e brainPin) {
void outputPinRegisterExt2(const char *msg, OutputPin *output, brain_pin_e brainPin, pin_output_mode_e *outputMode) { void outputPinRegisterExt2(const char *msg, OutputPin *output, brain_pin_e brainPin, pin_output_mode_e *outputMode) {
if (brainPin == GPIO_UNASSIGNED) if (brainPin == GPIO_UNASSIGNED)
return; return;
GPIO_TypeDef *hwPort = getHwPort(brainPin); ioportid_t hwPort = getHwPort(brainPin);
int hwPin = getHwPin(brainPin); int hwPin = getHwPin(brainPin);
outputPinRegisterExt(msg, output, hwPort, hwPin, outputMode); outputPinRegisterExt(msg, output, hwPort, hwPin, outputMode);
} }
void outputPinRegister(const char *msg, OutputPin *output, GPIO_TypeDef *port, uint32_t pin) { void outputPinRegister(const char *msg, OutputPin *output, ioportid_t port, uint32_t pin) {
outputPinRegisterExt(msg, output, port, pin, &DEFAULT_OUTPUT); outputPinRegisterExt(msg, output, port, pin, &DEFAULT_OUTPUT);
} }

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@ -102,7 +102,7 @@ static EXTConfig extcfg = { {
/* CH#21 */{ EXT_CH_MODE_DISABLED, NULL }, /* CH#21 */{ EXT_CH_MODE_DISABLED, NULL },
/* CH#22 */{ EXT_CH_MODE_DISABLED, NULL } } }; /* CH#22 */{ EXT_CH_MODE_DISABLED, NULL } } };
static uint32_t getExtMode(GPIO_TypeDef * port) { static uint32_t getExtMode(ioportid_t port) {
if (port == GPIOA) { if (port == GPIOA) {
return EXT_MODE_GPIOA; return EXT_MODE_GPIOA;
} else if (port == GPIOB) { } else if (port == GPIOB) {
@ -125,7 +125,7 @@ static void applyPin(brain_pin_e pin) {
return; return;
int index = getHwPin(pin); int index = getHwPin(pin);
GPIO_TypeDef * port = getHwPort(pin); ioportid_t port = getHwPort(pin);
extcfg.channels[index].mode = EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART | getExtMode(port); extcfg.channels[index].mode = EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART | getExtMode(port);
extcfg.channels[index].cb = extCallback; extcfg.channels[index].cb = extCallback;

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@ -18,17 +18,17 @@ public:
void setTargetPosition(int targetPosition); void setTargetPosition(int targetPosition);
int getTargetPosition(); int getTargetPosition();
GPIO_TypeDef * directionPort; ioportid_t directionPort;
ioportmask_t directionPin; ioportmask_t directionPin;
int currentPosition; int currentPosition;
float reactionTime; float reactionTime;
int totalSteps; int totalSteps;
private: private:
int targetPosition; int targetPosition;
GPIO_TypeDef * stepPort; ioportid_t stepPort;
ioportmask_t stepPin; ioportmask_t stepPin;
GPIO_TypeDef * enablePort; ioportid_t enablePort;
ioportmask_t enablePin; ioportmask_t enablePin;
THD_WORKING_AREA(stThreadStack, UTILITY_THREAD_STACK_SIZE); THD_WORKING_AREA(stThreadStack, UTILITY_THREAD_STACK_SIZE);

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@ -14,7 +14,7 @@
EXTERN_ENGINE; EXTERN_ENGINE;
extern "C" { extern "C" {
int getRemainingStack(Thread *otp); int getRemainingStack(thread_t *otp);
void prvGetRegistersFromStack(uint32_t *pulFaultStackAddress); void prvGetRegistersFromStack(uint32_t *pulFaultStackAddress);
} }
@ -25,7 +25,7 @@ extern uint32_t __main_stack_base__;
#if defined __GNUC__ #if defined __GNUC__
// GCC version // GCC version
int getRemainingStack(Thread *otp) { int getRemainingStack(thread_t *otp) {
#if CH_DBG_ENABLE_STACK_CHECK #if CH_DBG_ENABLE_STACK_CHECK
register struct intctx *r13 asm ("r13"); register struct intctx *r13 asm ("r13");
@ -50,7 +50,7 @@ int getRemainingStack(Thread *otp) {
extern uint32_t CSTACK$$Base; /* symbol created by the IAR linker */ extern uint32_t CSTACK$$Base; /* symbol created by the IAR linker */
extern uint32_t IRQSTACK$$Base; /* symbol created by the IAR linker */ extern uint32_t IRQSTACK$$Base; /* symbol created by the IAR linker */
int getRemainingStack(Thread *otp) { int getRemainingStack(thread_t *otp) {
#if CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__) #if CH_DBG_ENABLE_STACK_CHECK || defined(__DOXYGEN__)
int remainingStack; int remainingStack;
if (dbg_isr_cnt > 0) { if (dbg_isr_cnt > 0) {