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Dont cache dma buffers (#1110) 

* add no_cache

* don't disable cache

* conventions

* formatting
This commit is contained in:
Matthew Kennedy 2020-01-28 21:32:43 -08:00 committed by GitHub
parent 688a85a25d
commit ff3329655a
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GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 10 additions and 18 deletions
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2
firmware/global.h
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@ -77,8 +77,10 @@ typedef unsigned int time_t;
*/ */
#if defined(STM32F7XX) #if defined(STM32F7XX)
#define CCM_RAM ".ram3" #define CCM_RAM ".ram3"
#define NO_CACHE CCM_OPTIONAL
#else /* defined(STM32F4XX) */ #else /* defined(STM32F4XX) */
#define CCM_RAM ".ram4" #define CCM_RAM ".ram4"
#define NO_CACHE
#endif /* defined(STM32F4XX) */ #endif /* defined(STM32F4XX) */
#if EFI_USE_CCM #if EFI_USE_CCM

4
firmware/hw_layer/mmc_card.cpp
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@ -121,8 +121,8 @@ static void printError(const char *str, FRESULT f_error) {
scheduleMsg(&logger, "FATfs Error \"%s\" %d", str, f_error); scheduleMsg(&logger, "FATfs Error \"%s\" %d", str, f_error);
} }
static FIL FDLogFile; static FIL FDLogFile NO_CACHE;
static FIL FDCurrFile; static FIL FDCurrFile NO_CACHE;
static int logFileIndex = 1; static int logFileIndex = 1;
static char logName[_MAX_FILLER + 20]; static char logName[_MAX_FILLER + 20];

5
firmware/hw_layer/ports/stm32/stm32f7/mpu_util.cpp
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@ -77,12 +77,9 @@ EXTERNC int getRemainingStack(thread_t *otp) {
void baseMCUInit(void) { void baseMCUInit(void) {
// looks like this holds a random value on start? Let's set a nice clean zero // looks like this holds a random value on start? Let's set a nice clean zero
DWT->CYCCNT = 0; DWT->CYCCNT = 0;
BOR_Set(BOR_Level_1); // one step above default value BOR_Set(BOR_Level_1); // one step above default value
// open question if we need this or not
// SCB_DisableDCache();
} }
void _unhandled_exception(void) { void _unhandled_exception(void) {

17
firmware/hw_layer/sensors/cj125.cpp
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@ -29,12 +29,9 @@ EXTERN_ENGINE;
#include "pin_repository.h" #include "pin_repository.h"
static Logging *logger; static Logging *logger;
/**
* We need to make sure we do not get F7 SPI DMA caching issues static uint8_t tx_buff[2] NO_CACHE;
* We also have "SCB_DisableDCache();" which is about the same since we need DMA SPI addressed not only for cj125 static uint8_t rx_buff[1] NO_CACHE;
*/
static unsigned char tx_buff[2] CCM_OPTIONAL;
static unsigned char rx_buff[1] CCM_OPTIONAL;
static CJ125 globalInstance; static CJ125 globalInstance;
@ -83,15 +80,11 @@ static constexpr float lambdaLsu49[] = {
}; };
static int cjReadRegister(unsigned char regAddr) { static uint8_t cjReadRegister(uint8_t regAddr) {
#if ! EFI_UNIT_TEST #if ! EFI_UNIT_TEST
spiSelect(driver); spiSelect(driver);
tx_buff[0] = regAddr; tx_buff[0] = regAddr;
spiSend(driver, 1, tx_buff); spiSend(driver, 1, tx_buff);
// safety?
chThdSleepMilliseconds(10);
rx_buff[0] = 0;
spiReceive(driver, 1, rx_buff); spiReceive(driver, 1, rx_buff);
spiUnselect(driver); spiUnselect(driver);
@ -104,7 +97,7 @@ static int cjReadRegister(unsigned char regAddr) {
#endif /* EFI_UNIT_TEST */ #endif /* EFI_UNIT_TEST */
} }
static void cjWriteRegister(unsigned char regAddr, unsigned char regValue) { static void cjWriteRegister(uint8_t regAddr, uint8_t regValue) {
tx_buff[0] = regAddr; tx_buff[0] = regAddr;
tx_buff[1] = regValue; tx_buff[1] = regValue;
#ifdef CJ125_DEBUG_SPI #ifdef CJ125_DEBUG_SPI