EESchema-LIBRARY Version 2.3  Date: 1/23/2015 5:56:05 AM
#encoding utf-8
#
# STM32F407IGT6
#
DEF STM32F407IGT6 U 0 40 Y Y 1 F N
F0 "U" 0 -100 50 H V C CNN
F1 "STM32F407IGT6" 0 100 50 H V C CNN
F2 "MODULE" 0 0 50 H I C CNN
F3 "DOCUMENTATION" 0 0 50 H I C CNN
DRAW
S -4675 4500 4675 -4500 0 1 0 N
X PE2/TRACECLK/FSMC_A23/ETH_MII_TXD3 1 4975 550 300 L 50 50 1 1 P
X PE3/TRACED0/FSMC_A19 2 4975 450 300 L 50 50 1 1 P
X PE4/TRACED1/FSMC_A20/DCMI_D4 3 4975 350 300 L 50 50 1 1 P
X PE5/TRACED2/FSMC_A21/TIM9_CH1/DCMI_D6 4 4975 250 300 L 50 50 1 1 P
X PE6/TRACED3/FSMC_A22/TIM9_CH2/DCMI_D7 5 4975 150 300 L 50 50 1 1 P
X VBAT 6 2000 4800 300 D 50 50 1 1 E
X PI8/RTC_TAMP1,RTC_TAMP 7 -4975 850 300 R 50 50 1 1 P
X PC13/RTC_OUT,RTC_TAMP1,RTC_TS 8 4975 -4150 300 L 50 50 1 1 O
X PC14/OSC32_IN 9 4975 -4250 300 L 50 50 1 1 P
X PC15/OSC32_OUT 10 4975 -4350 300 L 50 50 1 1 O
X PF4/FSMC_A4/ADC3_IN14 20 4975 2150 300 L 50 50 1 1 P
X PH1/OSC_OUT 30 -4975 3350 300 R 50 50 1 1 O
X PA0/USART2_CTS/UART4_TX/ETH_MII_CRS/TIM2_CH1_ETR/TIM5_CH1/TIM8_ETRADC123_IN0/WKUP 40 -4975 -1050 300 R 50 50 1 1 P
X PA4/SPI1_NSS/SPI3_NSS/USART2_CK/DCMI_HSYNC/OTG_HS_SOF/I2S3_WSADC12_IN4/DAC_OUT1 50 -4975 -1450 300 R 50 50 1 1 O
X PF12/FSMC_A6 60 4975 1350 300 L 50 50 1 1 P
X PE9/FSMC_D6/TIM1_CH1 70 4975 -150 300 L 50 50 1 1 P
X PB11/I2C2_SDA/USART3_RX/OTG_HS_ULPI_D4/ETH_RMII_TX_EN/ETH_MII_TX_EN/TIM2_CH4 80 -4975 -3950 300 R 50 50 1 1 P
X VSS 90 -50 -4800 300 U 50 50 1 1 W
X PI9/CAN1_RX 11 -4975 750 300 R 50 50 1 1 P
X PF5/FSMC_A5/ADC3_IN15 21 4975 2050 300 L 50 50 1 1 P
X NRST/RST 31 -4975 4150 300 R 50 50 1 1 P
X PA1/USART2_RTS/UART4_RX/ETH_RMII_REF_CLK/ETH_MII_RX_CLK/TIM5_CH2/TIM2_CH2ADC123_IN1 41 -4975 -1150 300 R 50 50 1 1 P
X PA5/SPI1_SCK/OTG_HS_ULPI_CK/TIM2_CH1_ETR/TIM8_CH1N/ADC12_IN5/DAC_OUT2 51 -4975 -1550 300 R 50 50 1 1 O
X VSS 61 -450 -4800 300 U 50 50 1 1 W
X VSS 71 -250 -4800 300 U 50 50 1 1 W
X VCAP_1 81 2150 -4800 300 U 50 50 1 1 P
X VDD 91 -600 4800 300 D 50 50 1 1 W
X PI10/ETH_MII_RX_ER 12 -4975 650 300 R 50 50 1 1 P
X VSS 22 -650 -4800 300 U 50 50 1 1 W
X PC0/OTG_HS_ULPI_STP/ADC123_IN10 32 4975 -2850 300 L 50 50 1 1 P
X PA2/USART2_TX/TIM5_CH3/TIM9_CH1/TIM2_CH3/ETH_MDIO/ADC123_IN2 42 -4975 -1250 300 R 50 50 1 1 P
X PA6/SPI1_MISO/TIM8_BKIN/TIM13_CH1/DCMI_PIXCLK/TIM3_CH1/TIM1_BKINADC12_IN6 52 -4975 -1650 300 R 50 50 1 1 P
X VDD 62 -1500 4800 300 D 50 50 1 1 W
X VDD 72 -1200 4800 300 D 50 50 1 1 W
X VDD 82 -900 4800 300 D 50 50 1 1 W
X PB12/SPI2_NSS/I2S2_WS/I2C2_SMBA/USART3_CK/TIM1_BKIN/CAN2_RX/OTG_HS_ULPI_D5/ETH_RMII_TXD0/ETH_MII_TXD0/OTG_HS_ID 92 -4975 -4050 300 R 50 50 1 1 P
X PI11/OTG_HS_ULPI_DIR 13 -4975 550 300 R 50 50 1 1 P
X VDD 23 -2400 4800 300 D 50 50 1 1 W
X PC1/ETH_MDC/ADC123_IN11 33 4975 -2950 300 L 50 50 1 1 P
X PH2/ETH_MII_CRS 43 -4975 3250 300 R 50 50 1 1 P
X PA7/SPI1_MOSI/TIM8_CH1N/TIM14_CH1/TIM3_CH2/ETH_MII_RX_DV/TIM1_CH1N/ETH_RMII_CRS_DVADC12_IN7 53 -4975 -1750 300 R 50 50 1 1 P
X PF13/FSMC_A7 63 4975 1250 300 L 50 50 1 1 P
X PE10/FSMC_D7/TIM1_CH2N 73 4975 -250 300 L 50 50 1 1 P
X PH6/I2C2_SMBA/TIM12_CH1/ETH_MII_RXD2 83 -4975 2850 300 R 50 50 1 1 P
X PB13/SPI2_SCK/I2S2_CK/USART3_CTS/TIM1_CH1N/CAN2_TX/OTG_HS_ULPI_D6/ETH_RMII_TXD1/ETH_MII_TXD1OTG_HS_VBUS 93 -4975 -4150 300 R 50 50 1 1 P
X VSS 14 -850 -4800 300 U 50 50 1 1 W
X PF6/TIM10_CH1/FSMC_NIORDADC3_IN4 24 4975 1950 300 L 50 50 1 1 P
X PC2/SPI2_MISO/OTG_HS_ULPI_DIR/ETH_MII_TXD2/I2S2ext_SD/ADC123_IN12 34 4975 -3050 300 L 50 50 1 1 P
X PH3/ETH_MII_COL 44 -4975 3150 300 R 50 50 1 1 P
X PC4/ETH_RMII_RX_D0/ETH_MII_RX_D0ADC12_IN14 54 4975 -3250 300 L 50 50 1 1 P
X PF14/FSMC_A8 64 4975 1150 300 L 50 50 1 1 P
X PE11/FSMC_D8/TIM1_CH2 74 4975 -350 300 L 50 50 1 1 P
X PH7/I2C3_SCL/ETH_MII_RXD3 84 -4975 2750 300 R 50 50 1 1 P
X PB14/SPI2_MISO/TIM1_CH2N/TIM12_CH1/OTG_HS_DM/USART3_RTS/TIM8_CH2N/I2S2ext_SD 94 -4975 -4250 300 R 50 50 1 1 P
X VDD 15 -2700 4800 300 D 50 50 1 1 W
X PF7/TIM11_CH1/FSMC_NREG/ADC3_IN5 25 4975 1850 300 L 50 50 1 1 P
X PC3/SPI2_MOSI/I2S2_SD/OTG_HS_ULPI_NXT/ETH_MII_TX_CLKADC123_IN13 35 4975 -3150 300 L 50 50 1 1 P
X PH4/I2C2_SCL/OTG_HS_ULPI_NXT 45 -4975 3050 300 R 50 50 1 1 P
X PC5/ETH_RMII_RX_D1/ETH_MII_RX_D1ADC12_IN15 55 4975 -3350 300 L 50 50 1 1 P
X PF15/FSMC_A9 65 4975 1050 300 L 50 50 1 1 P
X PE12/FSMC_D9/TIM1_CH3N 75 4975 -450 300 L 50 50 1 1 P
X PH8/I2C3_SDA/DCMI_HSYNC 85 -4975 2650 300 R 50 50 1 1 P
X PB15/SPI2_MOSI/I2S2_SD/TIM1_CH3N/TIM8_CH3N/TIM12_CH2/OTG_HS_DPRTC_REFIN 95 -4975 -4350 300 R 50 50 1 1 P
X PF0/FSMC_A0/I2C2_SDA 16 4975 2550 300 L 50 50 1 1 P
X PF8/TIM13_CH1/FSMC_NIOWRADC3_IN6 26 4975 1750 300 L 50 50 1 1 P
X VDD 36 -2100 4800 300 D 50 50 1 1 W
X PH5/I2C2_SDA/ 46 -4975 2950 300 R 50 50 1 1 P
X PB0/TIM3_CH3/TIM8_CH2N/OTG_HS_ULPI_D1/ETH_MII_RXD2/TIM1_CH2N/ADC12_IN8 56 -4975 -2850 300 R 50 50 1 1 P
X PG0/FSMC_A10 66 4975 4350 300 L 50 50 1 1 P
X PE13/FSMC_D10/TIM1_CH3 76 4975 -550 300 L 50 50 1 1 P
X PH9/I2C3_SMBA/TIM12_CH2/DCMI_D0 86 -4975 2550 300 R 50 50 1 1 P
X PD8/FSMC_D13/USART3_TX 96 4975 -1850 300 L 50 50 1 1 P
X PF1/FSMC_A1/I2C2_SCL 17 4975 2450 300 L 50 50 1 1 P
X PF9/TIM14_CH1/FSMC_CD,ADC3_IN7 27 4975 1650 300 L 50 50 1 1 P
X VSSA 37 -1050 -4800 300 U 50 50 1 1 W
X PA3/USART2_RX/TIM5_CH4/TIM9_CH2/TIM2_CH4/OTG_HS_ULPI_D0/ETH_MII_COLADC123_IN3 47 -4975 -1350 300 R 50 50 1 1 P
X PB1/TIM3_CH4/TIM8_CH3N/OTG_HS_ULPI_D2/ETH_MII_RXD3/TIM1_CH3N/ADC12_IN9 57 -4975 -2950 300 R 50 50 1 1 P
X PG1/FSMC_A11 67 4975 4250 300 L 50 50 1 1 P
X PE14/FSMC_D11/TIM1_CH4 77 4975 -650 300 L 50 50 1 1 P
X PH10/TIM5_CH1/DCMI_D1 87 -4975 2450 300 R 50 50 1 1 P
X PD9/FSMC_D14/USART3_RX 97 4975 -1950 300 L 50 50 1 1 P
X PF2/FSMC_A2/I2C2_SMBA 18 4975 2350 300 L 50 50 1 1 P
X PF10/FSMC_INTR/ADC3_IN8 28 4975 1550 300 L 50 50 1 1 P
X VREF+ 38 -4100 4800 300 D 50 50 1 1 P
X BYPASS_REG 48 -4950 100 300 R 50 50 1 1 P
X PB2/BOOT1 58 -4975 -3050 300 R 50 50 1 1 P
X PE7/FSMC_D4/TIM1_ETR 68 4975 50 300 L 50 50 1 1 P
X PE15/FSMC_D12/TIM1_BKIN 78 4975 -750 300 L 50 50 1 1 P
X PH11/TIM5_CH2/DCMI_D2 88 -4975 2350 300 R 50 50 1 1 P
X PD10/FSMC_D15/USART3_CK 98 4975 -2050 300 L 50 50 1 1 P
X PF3/FSMC_A3/ADC3_IN9 19 4975 2250 300 L 50 50 1 1 P
X PH0/OSC_IN 29 -4975 3950 300 R 50 50 1 1 P
X VDDA 39 -3600 4800 300 D 50 50 1 1 W
X VDD 49 -1800 4800 300 D 50 50 1 1 W
X PF11/DCMI_D12 59 4975 1450 300 L 50 50 1 1 P
X PE8/FSMC_D5/TIM1_CH1N 69 4975 -50 300 L 50 50 1 1 P
X PB10/SPI2_SCK/I2S2_CK/I2C2_SCL/USART3_TX/OTG_HS_ULPI_D3/ETH_MII_RX_ER/TIM2_CH3 79 -4975 -3850 300 R 50 50 1 1 P
X PH12/TIM5_CH3/DCMI_D3 89 -4975 2250 300 R 50 50 1 1 P
X PD11/FFSMC_CLE/FSMC_A16/USART3_CTS 99 4975 -2150 300 L 50 50 1 1 P
X PD12/FSMC_ALE/FSMC_A17/TIM4_CH1/USART3_RTS 100 4975 -2250 300 L 50 50 1 1 P
X PG6/FSMC_INT2 110 4975 3750 300 L 50 50 1 1 P
X PA9/USART1_TX/TIM1_CH2/I2C3_SMBA/DCMI_D0OTG_FS_VBUS 120 -4975 -1950 300 R 50 50 1 1 P
X PH15/TIM8_CH3N/DCMI_D11 130 -4975 1950 300 R 50 50 1 1 P
X PC11/UART4_RX/SPI3_MISO/SDIO_D3/DCMI_D4/USART3_RX/I2S3ext_SD 140 4975 -3950 300 L 50 50 1 1 P
X PD6/FSMC_NWAIT/USART2_RX 150 4975 -1650 300 L 50 50 1 1 P
X PG15/USART6_CTS/DCMI_D13 160 4975 2850 300 L 50 50 1 1 P
X PE1/FSMC_NBL1/DCMI_D3 170 4975 650 300 L 50 50 1 1 P
X PD13/FSMC_A18/TIM4_CH2 101 4975 -2350 300 L 50 50 1 1 P
X PG7/FSMC_INT3/USART6_CK 111 4975 3650 300 L 50 50 1 1 P
X PA10/USART1_RX/TIM1_CH3/OTG_FS_ID/DCMI_D1 121 -4975 -2050 300 R 50 50 1 1 P
X PI0/TIM5_CH4/SPI2_NSS/I2S2_WS/DCMI_D13 131 -4975 1650 300 R 50 50 1 1 P
X PC12/UART5_TX/SDIO_CK/DCMI_D9/SPI3_MOSI/I2S3_SD/USART3_CK 141 4975 -4050 300 L 50 50 1 1 P
X PD7/USART2_CK/FSMC_NE1/FSMC_NCE2 151 4975 -1750 300 L 50 50 1 1 P
X PB3/JTDO/TRACESWO/SPI3_SCK/I2S3_CK/TIM2_CH2/SPI1_SCK 161 -4975 -3150 300 R 50 50 1 1 P
X PDR_ON 171 -4950 -100 300 R 50 50 1 1 P
X VSS 102 150 -4800 300 U 50 50 1 1 W
X PG8/USART6_RTS/ETH_PPS_OUT 112 4975 3550 300 L 50 50 1 1 O
X PA11/USART1_CTS/CAN1_RX/TIM1_CH4/OTG_FS_DM 122 -4975 -2150 300 R 50 50 1 1 P
X PI1/SPI2_SCK/I2S2_CK/DCMI_D8 132 -4975 1550 300 R 50 50 1 1 P
X PD0/FSMC_D2/CAN1_RX 142 4975 -1050 300 L 50 50 1 1 P
X PG9/USART6_RX/FSMC_NE2/FSMC_NCE3 152 4975 3450 300 L 50 50 1 1 P
X PB4/NJTRST/SPI3_MISO/TIM3_CH1/SPI1_MISO/I2S3ext_SD 162 -4975 -3250 300 R 50 50 1 1 P
X VDD 172 1500 4800 300 D 50 50 1 1 W
X VDD 103 -300 4800 300 D 50 50 1 1 W
X VSS 113 350 -4800 300 U 50 50 1 1 W
X PA12/USART1_RTS/CAN1_TX/TIM1_ETR/OTG_FS_DP 123 -4975 -2250 300 R 50 50 1 1 P
X PI2/TIM8_CH4/SPI2_MISO/DCMI_D9/I2S2ext_SD 133 -4975 1450 300 R 50 50 1 1 P
X PD1/FSMC_D3/CAN1_TX 143 4975 -1150 300 L 50 50 1 1 P
X PG10/FSMC_NCE4_1/FSMC_NE3 153 4975 3350 300 L 50 50 1 1 P
X PB5/I2C1_SMBA/CAN2_RX/OTG_HS_ULPI_D7/ETH_PPS_OUT/TIM3_CH2/SPI1_MOSI/SPI3_MOSI/DCMI_D10/I2S3_SD 163 -4975 -3350 300 R 50 50 1 1 w
X PI4/TIM8_BKIN/DCMI_D5 173 -4975 1250 300 R 50 50 1 1 P
X PD14/FSMC_D0/TIM4_CH3 104 4975 -2450 300 L 50 50 1 1 P
X VDD 114 0 4800 300 D 50 50 1 1 W
X PA13/JTMS-SWDIO 124 -4975 -2350 300 R 50 50 1 1 P
X PI3/TIM8_ETR/SPI2_MOSI/I2S2_SD/DCMI_D10 134 -4975 1350 300 R 50 50 1 1 P
X PD2/TIM3_ETR/UART5_RX/SDIO_CMD/DCMI_D11 144 4975 -1250 300 L 50 50 1 1 P
X PG11/FSMC_NCE4_2/ETH_MII_TX_EN/ETH_RMII_TX_EN 154 4975 3250 300 L 50 50 1 1 P
X PB6/I2C1_SCL/TIM4_CH1/CAN2_TX/DCMI_D5/USART1_TX 164 -4975 -3450 300 R 50 50 1 1 P
X PI5/TIM8_CH1/DCMI_VSYNC 174 -4975 1150 300 R 50 50 1 1 P
X PD15/FSMC_D1/TIM4_CH4 105 4975 -2550 300 L 50 50 1 1 P
X PC6/I2S2_MCK/TIM8_CH1/SDIO_D6/USART6_TX/DCMI_D0/TIM3_CH1 115 4975 -3450 300 L 50 50 1 1 P
X VCAP_2 125 1650 -4800 300 U 50 50 1 1 P
X VSS 135 750 -4800 300 U 50 50 1 1 W
X PD3/FSMC_CLK/USART2_CTS 145 4975 -1350 300 L 50 50 1 1 P
X PG12/FSMC_NE4/USART6_RTS 155 4975 3150 300 L 50 50 1 1 P
X PB7/I2C1_SDA/FSMC_NL/DCMI_VSYNC/USART1_RX/TIM4_CH2 165 -4975 -3550 300 R 50 50 1 1 P
X PI6/TIM8_CH2/DCMI_D6 175 -4975 1050 300 R 50 50 1 1 P
X PG2/FSMC_A12 106 4975 4150 300 L 50 50 1 1 P
X PC7/I2S3_MCK/TIM8_CH2/SDIO_D7/USART6_RX/DCMI_D1/TIM3_CH2 116 4975 -3550 300 L 50 50 1 1 P
X VSS 126 550 -4800 300 U 50 50 1 1 W
X VDD 136 600 4800 300 D 50 50 1 1 W
X PD4/FSMC_NOE/USART2_RTS 146 4975 -1450 300 L 50 50 1 1 P
X PG13/FSMC_A24/USART6_CTS/ETH_MII_TXD0/ETH_RMII_TXD0 156 4975 3050 300 L 50 50 1 1 P
X BOOT0 166 -4975 4350 300 R 50 50 1 1 P
X PI7/TIM8_CH3/DCMI_D7 176 -4975 950 300 R 50 50 1 1 P
X PG3/FSMC_A13 107 4975 4050 300 L 50 50 1 1 P
X PC8/TIM8_CH3/SDIO_D0/TIM3_CH3/USART6_CK/DCMI_D2 117 4975 -3650 300 L 50 50 1 1 P
X VDD 127 300 4800 300 D 50 50 1 1 W
X PA14/JTCK-SWCLK 137 -4975 -2450 300 R 50 50 1 1 P
X PD5/FSMC_NWE/USART2_TX 147 4975 -1550 300 L 50 50 1 1 P
X PG14/FSMC_A25/USART6_TX/ETH_MII_TXD1/ETH_RMII_TXD1 157 4975 2950 300 L 50 50 1 1 P
X PB8/TIM4_CH3/SDIO_D4/TIM10_CH1/DCMI_D6/ETH_MII_TXD3/I2C1_SCL/CAN1_RX 167 -4975 -3650 300 R 50 50 1 1 P
X PG4/FSMC_A14 108 4975 3950 300 L 50 50 1 1 P
X PC9/I2S_CKIN/MCO2/TIM8_CH4/SDIO_D1/I2C3_SDA/DCMI_D3/TIM3_CH4 118 4975 -3750 300 L 50 50 1 1 P
X PH13/TIM8_CH1N/CAN1_TX 128 -4975 2150 300 R 50 50 1 1 P
X PA15/JTDI/SPI3_NSS/I2S3_WS/TIM2_CH1_ETR/SPI1_NSS 138 -4975 -2550 300 R 50 50 1 1 P
X VSS 148 950 -4800 300 U 50 50 1 1 W
X VSS 158 1150 -4800 300 U 50 50 1 1 W
X PB9/SPI2_NSS/I2S2_WS/TIM4_CH4/TIM11_CH1/SDIO_D5/DCMI_D7/I2C1_SDA/CAN1_TX 168 -4975 -3750 300 R 50 50 1 1 P
X PG5/FSMC_A15 109 4975 3850 300 L 50 50 1 1 P
X PA8/MCO1/USART1_CK/TIM1_CH1/I2C3_SCL/OTG_FS_SOF 119 -4975 -1850 300 R 50 50 1 1 P
X PH14/TIM8_CH2N/DCMI_D4 129 -4975 2050 300 R 50 50 1 1 P
X PC10/SPI3_SCK/I2S3_CK/UART4_TX/SDIO_D2/DCMI_D8/USART3_TX 139 4975 -3850 300 L 50 50 1 1 P
X VDD 149 900 4800 300 D 50 50 1 1 W
X VDD 159 1200 4800 300 D 50 50 1 1 W
X PE0/TIM4_ETR/FSMC_NBL0/DCMI_D2 169 4975 750 300 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library