mirror of https://github.com/rusefi/rusefi-1.git
598 lines
14 KiB
C++
598 lines
14 KiB
C++
/*
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* mc33810.c
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*
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* Automotive Engine Control IC
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* MCZ33810
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*
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* @date Dec 29, 2018
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* @author Andrey Belomutskiy, (c) 2012-2020
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*
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* @date Jan 03, 2020
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* @author Andrey Gusakov <dron0gus@gmail.com>, (c) 2020
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*/
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#include "pch.h"
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#include "gpio/gpio_ext.h"
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#include "gpio/mc33810.h"
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#include "os_util.h"
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#if (BOARD_MC33810_COUNT > 0)
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/*
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* TODO list:
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*
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*/
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/*==========================================================================*/
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/* Driver local definitions. */
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/*==========================================================================*/
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#define DRIVER_NAME "mc33810"
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static bool drv_task_ready = false;
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typedef enum {
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MC33810_DISABLED = 0,
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MC33810_WAIT_INIT,
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MC33810_READY,
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MC33810_FAILED
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} mc33810_drv_state;
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#define MC_CMD_READ_REG(reg) (0x0a00 | (((reg) & 0x0f) << 4))
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#define MC_CMD_SPI_CHECK (0x0f00)
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#define MC_CMD_MODE_SELECT(mode) (0x1000 | ((mode) & 0x0fff))
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#define MC_CMD_LSD_FAULT(en) (0x2000 | ((en) & 0x0fff))
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#define MC_CMD_DRIVER_EN(en) (0x3000 | ((en) & 0x00ff))
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#define MC_CMD_SPARK(spark) (0x4000 | ((spark) & 0x0fff))
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#define MC_CMD_END_SPARK_FILTER(filt) (0x5000 | ((filt) & 0x0003))
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#define MC_CMD_DAC(dac) (0x6000 | ((dac) & 0x0fff))
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#define MC_CMD_GPGD_SHORT_THRES(sh) (0x7000 | ((sh) & 0x0fff))
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#define MC_CMD_GPGD_SHORT_DUR(dur) (0x8000 | ((dur) & 0x0fff))
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#define MC_CMD_GPGD_FAULT_OP(op) (0x9000 | ((op) & 0x0f0f))
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#define MC_CMD_PWM(pwm) (0xa000 | ((pwm) & 0x0fff))
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#define MC_CMD_CLK_CALIB (0xe000)
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/* get command code from TX value */
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#define TX_GET_CMD(v) (((v) >> 12) & 0x000f)
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/* enum? */
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#define REG_ALL_STAT (0x0)
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#define REG_OUT10_FAULT (0x1)
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#define REG_OUT32_FAULT (0x2)
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#define REG_GPGD_FAULT (0x3)
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#define REG_IGN_FAULT (0x4)
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#define REG_MODE_CMD (0x5)
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#define REG_LSD_FAULT_CMD (0x6)
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#define REG_DRIVER_EN (0x7)
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#define REG_SPARK_CMD (0x8)
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#define REG_END_SPARK_FILTER (0x9)
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#define REG_DAC_CMD (0xa)
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#define REG_GPGD_SHORT_THRES (0xb)
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#define REG_GPGD_SHORT_TIMER (0xc)
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#define REG_GPGD_FAULT_OP (0xd)
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#define REG_PWM (0xe)
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#define REG_REV (0xf)
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/* 0000.1101.0000.1010b */
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#define SPI_CHECK_ACK (0x0d0a)
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/*==========================================================================*/
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/* Driver exported variables. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver local variables and types. */
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/*==========================================================================*/
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/* OS */
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SEMAPHORE_DECL(mc33810_wake, 10 /* or BOARD_MC33810_COUNT ? */);
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static THD_WORKING_AREA(mc33810_thread_1_wa, 256);
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/* Driver */
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struct Mc33810 : public GpioChip {
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int init() override;
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int writePad(size_t pin, int value) override;
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brain_pin_diag_e getDiag(size_t pin) override;
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// internal functions
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int spi_rw(uint16_t tx, uint16_t* rx);
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int update_output_and_diag();
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int chip_init();
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void wake_driver();
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const mc33810_config *cfg;
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/* cached output state - state last send to chip */
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uint8_t o_state_cached;
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/* state to be sended to chip */
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uint8_t o_state;
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/* direct driven output mask */
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uint8_t o_direct_mask;
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/* ALL STATUS RESPONSE value and flags */
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bool all_status_requested;
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bool all_status_updated;
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uint16_t all_status_value;
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/* OUTx fault registers */
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uint16_t out_fault[2];
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/* GPGD mode fault register */
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uint16_t gpgd_fault;
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/* IGN mode fault register */
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uint16_t ign_fault;
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mc33810_drv_state drv_state;
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};
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static Mc33810 chips[BOARD_MC33810_COUNT];
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static const char* mc33810_pin_names[MC33810_OUTPUTS] = {
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"mc33810.OUT1", "mc33810.OUT2", "mc33810.OUT3", "mc33810.OUT4",
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"mc33810.GD0", "mc33810.GD1", "mc33810.GD2", "mc33810.GD3",
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};
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/*==========================================================================*/
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/* Driver local functions. */
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/*==========================================================================*/
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/**
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* @brief MC33810 send and receive routine.
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* @details Sends and receives 16 bits. CS asserted before and released
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* after transaction.
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*/
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int Mc33810::spi_rw(uint16_t tx, uint16_t *rx)
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{
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uint16_t rxb;
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SPIDriver *spi = cfg->spi_bus;
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/* Acquire ownership of the bus. */
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spiAcquireBus(spi);
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/* Setup transfer parameters. */
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spiStart(spi, &cfg->spi_config);
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/* Slave Select assertion. */
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spiSelect(spi);
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/* Atomic transfer operations. */
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/* TODO: check why spiExchange transfers invalid data on STM32F7xx, DMA issue? */
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//spiExchange(spi, 2, &tx, &rxb);
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rxb = spiPolledExchange(spi, tx);
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/* Slave Select de-assertion. */
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spiUnselect(spi);
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/* Ownership release. */
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spiReleaseBus(spi);
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if (rx)
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*rx = rxb;
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/* if reply on previous command is ALL STATUS RESPONSE */
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if (all_status_requested) {
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all_status_value = rxb;
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all_status_updated = true;
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}
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/* if next reply will be ALL STATUS RESPONSE */
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all_status_requested =
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(((TX_GET_CMD(tx) >= 0x1) && (TX_GET_CMD(tx) <= 0xa)) ||
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(tx == MC_CMD_READ_REG(REG_ALL_STAT)));
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/* no errors for now */
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return 0;
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}
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/**
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* @brief MC33810 send output state data.
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* @details Sends ORed data to register, also receive diagnostic.
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*/
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int Mc33810::update_output_and_diag()
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{
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int ret = 0;
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/* TODO: lock? */
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/* we need to get updates status */
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all_status_updated = false;
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/* if any pin is driven over SPI */
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if (o_direct_mask != 0xff) {
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uint16_t out_data;
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out_data = o_state & (~o_direct_mask);
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ret = spi_rw(MC_CMD_DRIVER_EN(out_data), NULL);
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if (ret)
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return ret;
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o_state_cached = o_state;
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}
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/* this comlicated logic to save few spi transfers in case we will receive status as reply on other command */
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if (!all_status_requested) {
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), NULL);
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if (ret)
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return ret;
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}
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/* get reply */
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if (!all_status_updated) {
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), NULL);
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if (ret)
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return ret;
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}
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/* now we have updated ALL STATUS register in chip data */
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/* check OUT (injectors) first */
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if (all_status_value & 0x000f) {
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/* request diagnostic of OUT0 and OUT1 */
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ret = spi_rw(MC_CMD_READ_REG(REG_OUT10_FAULT), NULL);
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if (ret)
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return ret;
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/* get diagnostic for OUT0 and OUT1 and request diagnostic for OUT2 and OUT3 */
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ret = spi_rw(MC_CMD_READ_REG(REG_OUT32_FAULT), &out_fault[0]);
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if (ret)
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return ret;
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/* get diagnostic for OUT2 and OUT2 and requset ALL STATUS */
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &out_fault[1]);
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if (ret)
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return ret;
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}
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/* check GPGD - mode not supported yet */
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if (all_status_value & 0x00f0) {
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/* request diagnostic of GPGD */
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ret = spi_rw(MC_CMD_READ_REG(REG_GPGD_FAULT), NULL);
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if (ret)
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return ret;
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/* get diagnostic for GPGD and requset ALL STATUS */
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &gpgd_fault);
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if (ret)
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return ret;
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}
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/* check IGN */
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if (all_status_value & 0x0f00) {
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/* request diagnostic of IGN */
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ret = spi_rw(MC_CMD_READ_REG(REG_IGN_FAULT), NULL);
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if (ret)
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return ret;
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/* get diagnostic for IGN and requset ALL STATUS */
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &ign_fault);
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if (ret)
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return ret;
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}
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/* TODO: unlock? */
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return ret;
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}
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/**
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* @brief MC33810 chip init.
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* @details Checks communication. Check chip presense.
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*/
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int Mc33810::chip_init()
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{
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int n;
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int ret;
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uint16_t rx;
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/* mark pins used */
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//ret = gpio_pin_markUsed(cfg->spi_config.ssport, cfg->spi_config.sspad, DRIVER_NAME " CS");
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ret = 0;
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if (cfg->en.port) {
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ret |= gpio_pin_markUsed(cfg->en.port, cfg->en.pad, DRIVER_NAME " EN");
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}
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for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++) {
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if (cfg->direct_io[n].port) {
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ret |= gpio_pin_markUsed(cfg->direct_io[n].port, cfg->direct_io[n].pad, DRIVER_NAME " DIRECT IO");
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}
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}
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if (ret) {
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ret = -1;
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goto err_gpios;
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}
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/* check SPI communication */
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/* 0. set echo mode, chip number - don't care */
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ret = spi_rw(MC_CMD_SPI_CHECK, NULL);
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/* 1. check loopback */
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ret |= spi_rw(MC_CMD_READ_REG(REG_REV), &rx);
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if (ret) {
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ret = -1;
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goto err_gpios;
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}
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if (rx != SPI_CHECK_ACK) {
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//print(DRIVER_NAME " spi loopback test failed\n");
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ret = -2;
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goto err_gpios;
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}
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/* 2. read revision */
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ret = spi_rw(MC_CMD_READ_REG(REG_ALL_STAT), &rx);
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if (ret) {
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ret = -1;
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goto err_gpios;
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}
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if (rx & BIT(14)) {
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//print(DRIVER_NAME " spi COR status\n");
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ret = -3;
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goto err_gpios;
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}
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/* TODO:
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* - setup
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* - enable output drivers
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* - read diagnostic
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*/
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{
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uint16_t spark_settings =
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//(3 << 9) | /* max dwell is 16 mS */
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(2 << 9) | /* max dwell is 8 mS */
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BIT(8) | /* enable max dwell control */
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(3 << 2) | /* Open Secondary OSFLT = 100 uS, default */
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(1 << 0) | /* End Spark THreshold: VPWR +5.5V, defaul */
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0;
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ret = spi_rw(MC_CMD_SPARK(spark_settings), NULL);
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if (ret) {
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goto err_gpios;
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}
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/* set IGN/GP outputs to GP mode - to be fixed!
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* disable retry after recovering from under/overvoltage */
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ret = spi_rw(MC_CMD_MODE_SELECT((0xf << 8) | (1 << 6)) , NULL);
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if (ret) {
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goto err_gpios;
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}
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}
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/* n. set EN pin low - active */
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if (cfg->en.port) {
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palClearPort(cfg->en.port,
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PAL_PORT_BIT(cfg->en.pad));
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}
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return 0;
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err_gpios:
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/* unmark pins */
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//gpio_pin_markUnused(cfg->spi_config.ssport, cfg->spi_config.sspad);
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if (cfg->en.port) {
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/* disable and mark unused */
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palSetPort(cfg->en.port,
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PAL_PORT_BIT(cfg->en.pad));
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gpio_pin_markUnused(cfg->en.port, cfg->en.pad);
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}
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for (n = 0; n < MC33810_DIRECT_OUTPUTS; n++) {
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if (cfg->direct_io[n].port) {
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gpio_pin_markUnused(cfg->direct_io[n].port, cfg->direct_io[n].pad);
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}
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}
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return ret;
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}
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/**
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* @brief MC33810 chip driver wakeup.
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* @details Wake up driver. Will cause output register and
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* diagnostic update.
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*/
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void Mc33810::wake_driver()
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{
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/* Entering a reentrant critical zone.*/
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chibios_rt::CriticalSectionLocker csl;
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chSemSignalI(&mc33810_wake);
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if (!port_is_isr_context()) {
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/**
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* chSemSignalI above requires rescheduling
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* interrupt handlers have implicit rescheduling
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*/
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chSchRescheduleS();
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}
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}
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/*==========================================================================*/
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/* Driver thread. */
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/*==========================================================================*/
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static THD_FUNCTION(mc33810_driver_thread, p)
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{
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int i;
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msg_t msg;
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(void)p;
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chRegSetThreadName(DRIVER_NAME);
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while(1) {
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msg = chSemWaitTimeout(&mc33810_wake, TIME_MS2I(MC33810_POLL_INTERVAL_MS));
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/* should we care about msg == MSG_TIMEOUT? */
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(void)msg;
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for (i = 0; i < BOARD_MC33810_COUNT; i++) {
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auto chip = &chips[i];
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if ((chip->cfg == NULL) ||
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(chip->drv_state == MC33810_DISABLED) ||
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(chip->drv_state == MC33810_FAILED))
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continue;
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/* TODO: implemet indirect driven gpios */
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int ret = chip->update_output_and_diag();
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if (ret) {
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/* set state to MC33810_FAILED? */
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}
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}
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}
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}
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/*==========================================================================*/
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/* Driver interrupt handlers. */
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/*==========================================================================*/
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/* TODO: add IRQ support */
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/*==========================================================================*/
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/* Driver exported functions. */
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/*==========================================================================*/
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int Mc33810::writePad(size_t pin, int value)
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{
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if (pin >= MC33810_OUTPUTS){
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return -1;
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}
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{
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// mutate driver state under lock
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chibios_rt::CriticalSectionLocker csl;
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if (value)
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o_state |= BIT(pin);
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else
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o_state &= ~BIT(pin);
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}
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/* direct driven? */
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if (o_direct_mask & BIT(pin)) {
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/* TODO: ensure that output driver enabled */
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if (value)
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palSetPort(cfg->direct_io[pin].port,
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PAL_PORT_BIT(cfg->direct_io[pin].pad));
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else
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palClearPort(cfg->direct_io[pin].port,
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PAL_PORT_BIT(cfg->direct_io[pin].pad));
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} else {
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wake_driver();
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}
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return 0;
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}
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brain_pin_diag_e Mc33810::getDiag(size_t pin)
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{
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int val;
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int diag = PIN_OK;
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if (pin >= MC33810_DIRECT_OUTPUTS)
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return PIN_INVALID;
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if (pin < 4) {
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/* OUT drivers */
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val = out_fault[pin < 2 ? 0 : 1] >> (4 * (pin & 0x01));
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/* ON open fault */
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if (val & BIT(0))
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diag |= PIN_OPEN;
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/* OFF open fault */
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if (val & BIT(1))
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diag |= PIN_OPEN;
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if (val & BIT(2))
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diag |= PIN_SHORT_TO_BAT;
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if (val & BIT(3))
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diag |= PIN_DRIVER_OVERTEMP;
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} else {
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/* INJ drivers, GPGD mode is not supported */
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val = ign_fault >> (3 * (pin - 4));
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/* open load */
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if (val & BIT(0))
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diag |= PIN_OPEN;
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/* max Dwell fault - too long coil charge time */
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if (val & BIT(1))
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diag |= PIN_OVERLOAD;
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/* MAXI fault - too high coil current */
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if (val & BIT(2))
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diag |= PIN_OVERLOAD;
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}
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/* convert to some common enum? */
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return static_cast<brain_pin_diag_e>(diag);
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}
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int Mc33810::init()
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{
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int ret;
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ret = chip_init();
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if (ret)
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return ret;
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drv_state = MC33810_READY;
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if (!drv_task_ready) {
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chThdCreateStatic(mc33810_thread_1_wa, sizeof(mc33810_thread_1_wa),
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PRIO_GPIOCHIP, mc33810_driver_thread, nullptr);
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drv_task_ready = true;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* @brief MC33810 driver add.
|
|
* @details Checks for valid config
|
|
*/
|
|
|
|
int mc33810_add(brain_pin_e base, unsigned int index, const mc33810_config *cfg)
|
|
{
|
|
int i;
|
|
int ret;
|
|
|
|
/* no config or no such chip */
|
|
if ((!cfg) || (!cfg->spi_bus) || (index >= BOARD_MC33810_COUNT))
|
|
return -1;
|
|
|
|
/* check for valid cs.
|
|
* TODO: remove this check? CS can be driven by SPI */
|
|
//if (cfg->spi_config.ssport == NULL)
|
|
// return -1;
|
|
|
|
Mc33810& chip = chips[index];
|
|
|
|
/* already initted? */
|
|
if (chip.cfg != NULL)
|
|
return -1;
|
|
|
|
chip.cfg = cfg;
|
|
chip.o_state = 0;
|
|
chip.o_state_cached = 0;
|
|
chip.o_direct_mask = 0;
|
|
chip.drv_state = MC33810_WAIT_INIT;
|
|
for (i = 0; i < MC33810_DIRECT_OUTPUTS; i++) {
|
|
if (cfg->direct_io[i].port != 0)
|
|
chip.o_direct_mask |= BIT(i);
|
|
}
|
|
|
|
/* GPGD mode is not supported yet, ignition mode does not support spi on/off commands
|
|
* so ignition signals should be directly driven */
|
|
if ((chip.o_direct_mask & 0xf0) != 0xf0)
|
|
return -1;
|
|
|
|
/* register, return gpio chip base */
|
|
ret = gpiochip_register(base, DRIVER_NAME, chip, MC33810_OUTPUTS);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/* set default pin names, board init code can rewrite */
|
|
gpiochips_setPinNames(static_cast<brain_pin_e>(ret), mc33810_pin_names);
|
|
|
|
chip.drv_state = MC33810_WAIT_INIT;
|
|
|
|
return ret;
|
|
}
|
|
|
|
#else /* BOARD_MC33810_COUNT > 0 */
|
|
|
|
int mc33810_add(brain_pin_e base, unsigned int index, const mc33810_config *cfg)
|
|
{
|
|
(void)base; (void)index; (void)cfg;
|
|
|
|
return -1;
|
|
}
|
|
|
|
#endif /* BOARD_MC33810_COUNT */
|