mirror of https://github.com/rusefi/rusefi-1.git
87 lines
1.9 KiB
C
87 lines
1.9 KiB
C
/*
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* @file tle8888.h
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*
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* Mar 25, 2019
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#pragma once
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#include "global.h"
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#include <hal.h>
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#include "efifeatures.h"
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#define TLE8888_OUTPUTS_REGULAR 28
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#define TLE8888_OUTPUT_MR (TLE8888_OUTPUTS_REGULAR + 0)
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/* regular outputs + MR output */
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#define TLE8888_OUTPUTS (TLE8888_OUTPUTS_REGULAR + 1)
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/* 4 misc channels */
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#define TLE8888_DIRECT_MISC 4
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/* 4 IGN channels - INJ1..4 - IN1..4
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* 4 INJ channels - OUT1..4 - IN5..8 */
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#define TLE8888_DIRECT_OUTPUTS (4 + 4 + TLE8888_DIRECT_MISC)
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/* Inputs */
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#define TLE8888_INPUT_KEY (TLE8888_OUTPUTS + 0)
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#define TLE8888_INPUT_WAKE (TLE8888_OUTPUTS + 1)
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/* KEY and WAKE */
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#define TLE8888_INPUTS 2
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#define TLE8888_SIGNALS (TLE8888_OUTPUTS + TLE8888_INPUTS)
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#define getRegisterFromResponse(x) (((x) >> 1) & 0x7f)
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#define getDataFromResponse(x) (((x) >> 8) & 0xff)
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/* note that spi transfer should be LSB first */
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struct tle8888_config {
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#if HAL_USE_SPI
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SPIDriver *spi_bus;
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SPIConfig spi_config;
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#endif
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/* bidirectional, check DS */
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struct {
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ioportid_t port;
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uint_fast8_t pad;
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} reset;
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struct {
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/* MCU port-pin routed to IN1..12 */
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ioportid_t port;
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uint_fast8_t pad;
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} direct_gpio[TLE8888_DIRECT_OUTPUTS];
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/* IN9..IN12 to output mapping */
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struct {
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/* ...used to drive output (starts from 1, as in DS, coders gonna hate) */
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uint8_t output;
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} direct_maps[TLE8888_DIRECT_MISC];
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struct {
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ioportid_t port;
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uint_fast8_t pad;
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} ign_en;
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struct {
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ioportid_t port;
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uint_fast8_t pad;
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} inj_en;
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tle8888_mode_e mode;
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/* this is workaround to enable PP mode for OUT21..OUT24
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* until users won't call setPinMode */
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bool stepper;
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};
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/**
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* @return return gpio chip base
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*/
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int tle8888_add(brain_pin_e base, unsigned int index, const struct tle8888_config *cfg);
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/* debug */
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void tle8888_req_init();
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void tle8888_dump_regs();
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#if EFI_TUNER_STUDIO
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void tle8888PostState();
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#endif /* EFI_TUNER_STUDIO */
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