mirror of https://github.com/rusefi/rusefi-1.git
868 lines
26 KiB
C
868 lines
26 KiB
C
/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#ifndef BOARD_H
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#define BOARD_H
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/*
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* Board identifier.
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*/
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#define BOARD_NAME "Subaru EJ20G/STM32F765 for RusEFI"
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#undef BOARD_TLE6240_COUNT
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#define BOARD_TLE6240_COUNT 1
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#undef BOARD_MC33972_COUNT
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#define BOARD_MC33972_COUNT 1
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#undef BOARD_TLE8888_COUNT
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#define BOARD_TLE8888_COUNT 0
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#undef BOARD_EXT_GPIOCHIPS
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#define BOARD_EXT_GPIOCHIPS (BOARD_TLE6240_COUNT + BOARD_MC33972_COUNT + BOARD_TLE8888_COUNT)
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 12000000U
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 330U
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/*
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* MCU type as defined in the ST header.
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* this declaration for stm32_registry.h
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*/
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#ifndef STM32F765xx
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#define STM32F765xx
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#endif
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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// See https://github.com/rusefi/rusefi/issues/397
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#define DEFAULT_GPIO_SPEED PIN_OSPEED_HIGH
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/*
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* GPIOA setup:
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*
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* PA0 -
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* PA1 -
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* PA2 -
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* PA3 -
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* PA4 -
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* PA5 -
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* PA6 -
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* PA7 -
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* PA8 -
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* PA9 - USART1_TX - boot/console - TTL level on XP4.2
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* PA10 - USART1_RX - boot/console - TTL level on XP4.3
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* PA11 - USB_FS_D- - boot/console/TS - XS3
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* PA12 - USB_FS_D+ - boot/console/TS - XS3
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* PA13 -
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* PA14 -
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* PA15 -
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*/
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#define VAL_GPIOA_MODER (/*PIN_MODE_ALTERNATE(0) */ PIN_MODE_OUTPUT(0) | \
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/*PIN_MODE_ALTERNATE(1) */ PIN_MODE_OUTPUT(1) | \
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PIN_MODE_ANALOG(2) | \
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PIN_MODE_ANALOG(3) | \
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PIN_MODE_ANALOG(4) | \
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PIN_MODE_ANALOG(5) | \
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PIN_MODE_ANALOG(6) | \
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PIN_MODE_ANALOG(7) | \
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PIN_MODE_ALTERNATE(8) | \
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PIN_MODE_ALTERNATE(9) | \
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PIN_MODE_ALTERNATE(10) | \
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PIN_MODE_ALTERNATE(11) | \
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PIN_MODE_ALTERNATE(12) | \
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PIN_MODE_ALTERNATE(13) | \
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PIN_MODE_ALTERNATE(14) | \
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PIN_MODE_OUTPUT(15))
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#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1) | \
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PIN_OTYPE_PUSHPULL( 2) | \
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PIN_OTYPE_PUSHPULL( 3) | \
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PIN_OTYPE_PUSHPULL( 4) | \
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PIN_OTYPE_PUSHPULL( 5) | \
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PIN_OTYPE_PUSHPULL( 6) | \
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PIN_OTYPE_PUSHPULL( 7) | \
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PIN_OTYPE_PUSHPULL( 8) | \
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PIN_OTYPE_PUSHPULL( 9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14) | \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIOA_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
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DEFAULT_GPIO_SPEED( 1) | \
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DEFAULT_GPIO_SPEED( 2) | \
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DEFAULT_GPIO_SPEED( 3) | \
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DEFAULT_GPIO_SPEED( 4) | \
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DEFAULT_GPIO_SPEED( 5) | \
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DEFAULT_GPIO_SPEED( 6) | \
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DEFAULT_GPIO_SPEED( 7) | \
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DEFAULT_GPIO_SPEED( 8) | \
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DEFAULT_GPIO_SPEED( 9) | \
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DEFAULT_GPIO_SPEED(10) | \
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DEFAULT_GPIO_SPEED(11) | \
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DEFAULT_GPIO_SPEED(12) | \
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DEFAULT_GPIO_SPEED(13) | \
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DEFAULT_GPIO_SPEED(14) | \
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DEFAULT_GPIO_SPEED(15))
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#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING( 0) | \
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PIN_PUPDR_FLOATING( 1) | \
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PIN_PUPDR_FLOATING( 2) | \
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PIN_PUPDR_FLOATING( 3) | \
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PIN_PUPDR_FLOATING( 4) | \
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PIN_PUPDR_FLOATING( 5) | \
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PIN_PUPDR_FLOATING( 6) | \
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PIN_PUPDR_FLOATING( 7) | \
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PIN_PUPDR_FLOATING( 8) | \
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PIN_PUPDR_PULLUP( 9) | \
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PIN_PUPDR_PULLUP(10) | \
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PIN_PUPDR_FLOATING(11) | \
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PIN_PUPDR_FLOATING(12) | \
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PIN_PUPDR_PULLUP(13) | \
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PIN_PUPDR_PULLDOWN(14) | \
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PIN_PUPDR_PULLUP(15))
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#define VAL_GPIOA_ODR (PIN_ODR_LOW(0) | \
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PIN_ODR_LOW(1) | \
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PIN_ODR_HIGH(15))
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#define VAL_GPIOA_AFRL (PIN_AFIO_AF( 0, 1U) | \
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PIN_AFIO_AF( 1, 1U) | \
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PIN_AFIO_AF( 2, 0U) | \
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PIN_AFIO_AF( 3, 0U) | \
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PIN_AFIO_AF( 4, 0U) | \
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PIN_AFIO_AF( 5, 0U) | \
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PIN_AFIO_AF( 6, 0U) | \
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PIN_AFIO_AF( 7, 0U))
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#define VAL_GPIOA_AFRH (PIN_AFIO_AF( 8, 0U) | \
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PIN_AFIO_AF( 9, 7U) | \
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PIN_AFIO_AF(10, 7U) | \
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PIN_AFIO_AF(11, 10U) | \
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PIN_AFIO_AF(12, 10U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 0U) | \
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PIN_AFIO_AF(15, 0U))
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/*
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* GPIOB setup:
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*
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* PB0 -
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* PB1 -
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* PB2 - boot mode - set JP2 to pull high.
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* PB3 -
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* PB4 - SPI4_CS3 - MC33792 chip select
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* PB5 -
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* PB6 -
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* PB7 -
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* PB8 -
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* PB9 -
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* PB10 -
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* PB11 -
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* PB12 -
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* PB13 -
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* PB14 -
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* PB15 -
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*/
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#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(0) | \
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PIN_MODE_ANALOG(1) | \
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PIN_MODE_INPUT(2) | \
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/*PIN_MODE_ALTERNATE(3)*/ PIN_MODE_OUTPUT(3) | \
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PIN_MODE_OUTPUT(4) | \
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/*PIN_MODE_ALTERNATE(5)*/ PIN_MODE_OUTPUT(5) | \
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PIN_MODE_ALTERNATE(6) | \
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PIN_MODE_OUTPUT(7) | \
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/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_OUTPUT(8) | \
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/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_OUTPUT(9) | \
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/*PIN_MODE_ALTERNATE(10)*/ PIN_MODE_OUTPUT(10) | \
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/*PIN_MODE_ALTERNATE(11)*/ PIN_MODE_OUTPUT(11) | \
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PIN_MODE_ALTERNATE(12) | \
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PIN_MODE_INPUT(13) | \
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PIN_MODE_ALTERNATE(14) | \
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PIN_MODE_ALTERNATE(15))
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#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1) | \
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PIN_OTYPE_PUSHPULL( 2) | \
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PIN_OTYPE_PUSHPULL( 3) | \
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PIN_OTYPE_PUSHPULL( 4) | \
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PIN_OTYPE_PUSHPULL( 5) | \
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PIN_OTYPE_PUSHPULL( 6) | \
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PIN_OTYPE_PUSHPULL( 7) | \
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PIN_OTYPE_PUSHPULL( 8) | \
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PIN_OTYPE_PUSHPULL( 9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14) | \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIOB_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
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DEFAULT_GPIO_SPEED( 1) | \
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DEFAULT_GPIO_SPEED( 2) | \
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DEFAULT_GPIO_SPEED( 3) | \
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DEFAULT_GPIO_SPEED( 4) | \
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DEFAULT_GPIO_SPEED( 5) | \
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DEFAULT_GPIO_SPEED( 6) | \
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DEFAULT_GPIO_SPEED( 7) | \
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DEFAULT_GPIO_SPEED( 8) | \
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DEFAULT_GPIO_SPEED( 9) | \
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DEFAULT_GPIO_SPEED(10) | \
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DEFAULT_GPIO_SPEED(11) | \
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DEFAULT_GPIO_SPEED(12) | \
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DEFAULT_GPIO_SPEED(13) | \
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DEFAULT_GPIO_SPEED(14) | \
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DEFAULT_GPIO_SPEED(15))
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#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING( 0) | \
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PIN_PUPDR_FLOATING( 1) | \
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PIN_PUPDR_PULLDOWN( 2) | \
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PIN_PUPDR_FLOATING( 3) | \
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PIN_PUPDR_FLOATING( 4) | \
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PIN_PUPDR_FLOATING( 5) | \
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PIN_PUPDR_FLOATING( 6) | \
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PIN_PUPDR_FLOATING( 7) | \
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PIN_PUPDR_FLOATING( 8) | \
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PIN_PUPDR_FLOATING( 9) | \
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PIN_PUPDR_FLOATING(10) | \
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PIN_PUPDR_FLOATING(11) | \
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PIN_PUPDR_FLOATING(12) | \
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PIN_PUPDR_FLOATING(13) | \
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PIN_PUPDR_PULLDOWN(14) | \
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PIN_PUPDR_FLOATING(15))
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#define VAL_GPIOB_ODR (PIN_ODR_LOW(3) | \
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PIN_ODR_HIGH(4) | \
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PIN_ODR_LOW(5) | \
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PIN_ODR_LOW(8) | \
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PIN_ODR_LOW(9) | \
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PIN_ODR_LOW(10) | \
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PIN_ODR_LOW(11))
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#define VAL_GPIOB_AFRL (PIN_AFIO_AF( 0, 0U) | \
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PIN_AFIO_AF( 1, 0U) | \
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PIN_AFIO_AF( 2, 0U) | \
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PIN_AFIO_AF( 3, 1U) | \
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PIN_AFIO_AF( 4, 0U) | \
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PIN_AFIO_AF( 5, 2U) | \
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PIN_AFIO_AF( 6, 10U) | \
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PIN_AFIO_AF( 7, 0U))
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#define VAL_GPIOB_AFRH (PIN_AFIO_AF( 8, 2U) | \
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PIN_AFIO_AF( 9, 2U) | \
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PIN_AFIO_AF(10, 1U) | \
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PIN_AFIO_AF(11, 1U) | \
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PIN_AFIO_AF(12, 12U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 12U) | \
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PIN_AFIO_AF(15, 12U))
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/*
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* GPIOC setup:
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*
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* PC0 -
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* PC1 -
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* PC2 -
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* PC3 -
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* PC4 -
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* PC5 -
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* PC6 -
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* PC7 -
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* PC8 -
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* PC9 -
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* PC10 -
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* PC11 -
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* PC12 -
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* PC13 -
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* PC14 -
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* PC15 -
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*/
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#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(0) | \
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PIN_MODE_ANALOG(1) | \
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PIN_MODE_ANALOG(2) | \
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PIN_MODE_ANALOG(3) | \
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PIN_MODE_ANALOG(4) | \
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PIN_MODE_ANALOG(5) | \
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/*PIN_MODE_ALTERNATE(6)*/ PIN_MODE_OUTPUT(6) | \
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/*PIN_MODE_ALTERNATE(7)*/ PIN_MODE_OUTPUT(7) | \
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/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_INPUT(8) | \
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/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_INPUT(9) | \
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PIN_MODE_ALTERNATE(10) | \
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PIN_MODE_ALTERNATE(11) | \
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PIN_MODE_ALTERNATE(12) | \
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PIN_MODE_OUTPUT(13) | \
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PIN_MODE_OUTPUT(14) | \
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PIN_MODE_OUTPUT(15))
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#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1) | \
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PIN_OTYPE_PUSHPULL( 2) | \
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PIN_OTYPE_PUSHPULL( 3) | \
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PIN_OTYPE_PUSHPULL( 4) | \
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PIN_OTYPE_PUSHPULL( 5) | \
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PIN_OTYPE_PUSHPULL( 6) | \
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PIN_OTYPE_PUSHPULL( 7) | \
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PIN_OTYPE_PUSHPULL( 8) | \
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PIN_OTYPE_PUSHPULL( 9) | \
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PIN_OTYPE_PUSHPULL(10) | \
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PIN_OTYPE_PUSHPULL(11) | \
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PIN_OTYPE_PUSHPULL(12) | \
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PIN_OTYPE_PUSHPULL(13) | \
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PIN_OTYPE_PUSHPULL(14) | \
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PIN_OTYPE_PUSHPULL(15))
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#define VAL_GPIOC_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
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DEFAULT_GPIO_SPEED( 1) | \
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DEFAULT_GPIO_SPEED( 2) | \
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DEFAULT_GPIO_SPEED( 3) | \
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DEFAULT_GPIO_SPEED( 4) | \
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DEFAULT_GPIO_SPEED( 5) | \
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DEFAULT_GPIO_SPEED( 6) | \
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DEFAULT_GPIO_SPEED( 7) | \
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DEFAULT_GPIO_SPEED( 8) | \
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DEFAULT_GPIO_SPEED( 9) | \
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DEFAULT_GPIO_SPEED(10) | \
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DEFAULT_GPIO_SPEED(11) | \
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DEFAULT_GPIO_SPEED(12) | \
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DEFAULT_GPIO_SPEED(13) | \
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DEFAULT_GPIO_SPEED(14) | \
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DEFAULT_GPIO_SPEED(15))
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#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING( 0) | \
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PIN_PUPDR_FLOATING( 1) | \
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PIN_PUPDR_FLOATING( 2) | \
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PIN_PUPDR_FLOATING( 3) | \
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PIN_PUPDR_FLOATING( 4) | \
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PIN_PUPDR_FLOATING( 5) | \
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PIN_PUPDR_FLOATING( 6) | \
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PIN_PUPDR_FLOATING( 7) | \
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PIN_PUPDR_PULLUP( 8) | \
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PIN_PUPDR_PULLUP( 9) | \
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PIN_PUPDR_FLOATING(10) | \
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PIN_PUPDR_PULLUP(11) | \
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PIN_PUPDR_FLOATING(12) | \
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PIN_PUPDR_FLOATING(13) | \
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PIN_PUPDR_FLOATING(14) | \
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PIN_PUPDR_FLOATING(15))
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#define VAL_GPIOC_ODR (PIN_ODR_LOW(6) | \
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PIN_ODR_LOW(7) | \
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PIN_ODR_HIGH(13) | \
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PIN_ODR_HIGH(14) | \
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PIN_ODR_HIGH(15))
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#define VAL_GPIOC_AFRL (PIN_AFIO_AF( 0, 0U) | \
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PIN_AFIO_AF( 1, 0U) | \
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PIN_AFIO_AF( 2, 0U) | \
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PIN_AFIO_AF( 3, 0U) | \
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PIN_AFIO_AF( 4, 0U) | \
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PIN_AFIO_AF( 5, 0U) | \
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PIN_AFIO_AF( 6, 3U) | \
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PIN_AFIO_AF( 7, 3U))
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#define VAL_GPIOC_AFRH (PIN_AFIO_AF( 8, 4U) | \
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PIN_AFIO_AF( 9, 4U) | \
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PIN_AFIO_AF(10, 6U) | \
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PIN_AFIO_AF(11, 6U) | \
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PIN_AFIO_AF(12, 6U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 0U) | \
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PIN_AFIO_AF(15, 0U))
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/*
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* GPIOD setup:
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*
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* PD0 -
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* PD1 -
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* PD2 - USB_HS 5V en out
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* PD3 - USB HS 5V Over current input
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* PD4 - USB FS 5V Over current input
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* PD5 - USB FS 5V en out
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* PD6 -
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|
* PD7 -
|
|
* PD8 -
|
|
* PD9 -
|
|
* PD10 -
|
|
* PD11 -
|
|
* PD12 -
|
|
* PD13 -
|
|
* PD14 -
|
|
* PD15 -
|
|
*/
|
|
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(0) | \
|
|
PIN_MODE_ALTERNATE(1) | \
|
|
PIN_MODE_OUTPUT(2) | \
|
|
PIN_MODE_INPUT(3) | \
|
|
PIN_MODE_INPUT(4) | \
|
|
PIN_MODE_OUTPUT(5) | \
|
|
PIN_MODE_ALTERNATE(6) | \
|
|
PIN_MODE_ALTERNATE(7) | \
|
|
PIN_MODE_ALTERNATE(8) | \
|
|
PIN_MODE_ALTERNATE(9) | \
|
|
PIN_MODE_OUTPUT(10) | \
|
|
PIN_MODE_ALTERNATE(11) | \
|
|
PIN_MODE_ALTERNATE(12) | \
|
|
PIN_MODE_ALTERNATE(13) | \
|
|
/*PIN_MODE_ALTERNATE(14)*/ PIN_MODE_OUTPUT(14) | \
|
|
/*PIN_MODE_ALTERNATE(15)*/ PIN_MODE_OUTPUT(15))
|
|
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
|
PIN_OTYPE_PUSHPULL( 1) | \
|
|
PIN_OTYPE_PUSHPULL( 2) | \
|
|
PIN_OTYPE_PUSHPULL( 3) | \
|
|
PIN_OTYPE_PUSHPULL( 4) | \
|
|
PIN_OTYPE_PUSHPULL( 5) | \
|
|
PIN_OTYPE_PUSHPULL( 6) | \
|
|
PIN_OTYPE_PUSHPULL( 7) | \
|
|
PIN_OTYPE_PUSHPULL( 8) | \
|
|
PIN_OTYPE_PUSHPULL( 9) | \
|
|
PIN_OTYPE_PUSHPULL(10) | \
|
|
PIN_OTYPE_PUSHPULL(11) | \
|
|
PIN_OTYPE_PUSHPULL(12) | \
|
|
PIN_OTYPE_PUSHPULL(13) | \
|
|
PIN_OTYPE_PUSHPULL(14) | \
|
|
PIN_OTYPE_PUSHPULL(15))
|
|
#define VAL_GPIOD_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
|
DEFAULT_GPIO_SPEED( 1) | \
|
|
DEFAULT_GPIO_SPEED( 2) | \
|
|
DEFAULT_GPIO_SPEED( 3) | \
|
|
DEFAULT_GPIO_SPEED( 4) | \
|
|
DEFAULT_GPIO_SPEED( 5) | \
|
|
DEFAULT_GPIO_SPEED( 6) | \
|
|
DEFAULT_GPIO_SPEED( 7) | \
|
|
DEFAULT_GPIO_SPEED( 8) | \
|
|
DEFAULT_GPIO_SPEED( 9) | \
|
|
DEFAULT_GPIO_SPEED(10) | \
|
|
DEFAULT_GPIO_SPEED(11) | \
|
|
DEFAULT_GPIO_SPEED(12) | \
|
|
DEFAULT_GPIO_SPEED(13) | \
|
|
DEFAULT_GPIO_SPEED(14) | \
|
|
DEFAULT_GPIO_SPEED(15))
|
|
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP( 0) | \
|
|
PIN_PUPDR_FLOATING( 1) | \
|
|
PIN_PUPDR_FLOATING( 2) | \
|
|
PIN_PUPDR_PULLUP( 3) | \
|
|
PIN_PUPDR_PULLUP( 4) | \
|
|
PIN_PUPDR_FLOATING( 5) | \
|
|
PIN_PUPDR_FLOATING( 6) | \
|
|
PIN_PUPDR_FLOATING( 7) | \
|
|
PIN_PUPDR_FLOATING( 8) | \
|
|
PIN_PUPDR_PULLUP( 9) | \
|
|
PIN_PUPDR_FLOATING(10) | \
|
|
PIN_PUPDR_PULLUP(11) | \
|
|
PIN_PUPDR_PULLUP(12) | \
|
|
PIN_PUPDR_PULLUP(13) | \
|
|
PIN_PUPDR_FLOATING(14) | \
|
|
PIN_PUPDR_FLOATING(15))
|
|
#define VAL_GPIOD_ODR (PIN_ODR_LOW(2) | \
|
|
PIN_ODR_LOW(5) | \
|
|
PIN_ODR_HIGH(10) | \
|
|
PIN_ODR_LOW(14) | \
|
|
PIN_ODR_LOW(15))
|
|
#define VAL_GPIOD_AFRL (PIN_AFIO_AF( 0, 9U) | \
|
|
PIN_AFIO_AF( 1, 9U) | \
|
|
PIN_AFIO_AF( 2, 0U) | \
|
|
PIN_AFIO_AF( 3, 0U) | \
|
|
PIN_AFIO_AF( 4, 0U) | \
|
|
PIN_AFIO_AF( 5, 0U) | \
|
|
PIN_AFIO_AF( 6, 11U) | \
|
|
PIN_AFIO_AF( 7, 11U))
|
|
#define VAL_GPIOD_AFRH (PIN_AFIO_AF( 8, 7U) | \
|
|
PIN_AFIO_AF( 9, 7U) | \
|
|
PIN_AFIO_AF(10, 0U) | \
|
|
PIN_AFIO_AF(11, 9U) | \
|
|
PIN_AFIO_AF(12, 9U) | \
|
|
PIN_AFIO_AF(13, 9U) | \
|
|
PIN_AFIO_AF(14, 2U) | \
|
|
PIN_AFIO_AF(15, 2U))
|
|
|
|
/*
|
|
* GPIOE setup:
|
|
*
|
|
* PE0 -
|
|
* PE1 -
|
|
* PE2 -
|
|
* PE3 -
|
|
* PE4 -
|
|
* PE5 -
|
|
* PE6 - SPI4_MOSI
|
|
* PE7 -
|
|
* PE8 -
|
|
* PE9 -
|
|
* PE10 -
|
|
* PE11 -
|
|
* PE12 -
|
|
* PE13 -
|
|
* PE14 -
|
|
* PE15 -
|
|
*/
|
|
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(0) | \
|
|
PIN_MODE_ALTERNATE(1) | \
|
|
PIN_MODE_ALTERNATE(2) | \
|
|
PIN_MODE_OUTPUT(3) | \
|
|
PIN_MODE_OUTPUT(4) | \
|
|
PIN_MODE_ALTERNATE(5) | \
|
|
PIN_MODE_ALTERNATE(6) | \
|
|
PIN_MODE_ALTERNATE(7) | \
|
|
PIN_MODE_ALTERNATE(8) | \
|
|
PIN_MODE_OUTPUT(9) | \
|
|
/*PIN_MODE_ALTERNATE(10)*/ PIN_MODE_OUTPUT(10) | \
|
|
/*PIN_MODE_ALTERNATE(11)*/ PIN_MODE_OUTPUT(11) | \
|
|
PIN_MODE_ALTERNATE(12) | \
|
|
/*PIN_MODE_ALTERNATE(13)*/ PIN_MODE_OUTPUT(13) | \
|
|
/*PIN_MODE_ALTERNATE(14)*/ PIN_MODE_OUTPUT(14) | \
|
|
PIN_MODE_INPUT(15))
|
|
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
|
PIN_OTYPE_PUSHPULL( 1) | \
|
|
PIN_OTYPE_PUSHPULL( 2) | \
|
|
PIN_OTYPE_PUSHPULL( 3) | \
|
|
PIN_OTYPE_PUSHPULL( 4) | \
|
|
PIN_OTYPE_PUSHPULL( 5) | \
|
|
PIN_OTYPE_PUSHPULL( 6) | \
|
|
PIN_OTYPE_PUSHPULL( 7) | \
|
|
PIN_OTYPE_PUSHPULL( 8) | \
|
|
PIN_OTYPE_PUSHPULL( 9) | \
|
|
PIN_OTYPE_PUSHPULL(10) | \
|
|
PIN_OTYPE_PUSHPULL(11) | \
|
|
PIN_OTYPE_PUSHPULL(12) | \
|
|
PIN_OTYPE_PUSHPULL(13) | \
|
|
PIN_OTYPE_PUSHPULL(14) | \
|
|
PIN_OTYPE_PUSHPULL(15))
|
|
#define VAL_GPIOE_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
|
DEFAULT_GPIO_SPEED( 1) | \
|
|
DEFAULT_GPIO_SPEED( 2) | \
|
|
DEFAULT_GPIO_SPEED( 3) | \
|
|
DEFAULT_GPIO_SPEED( 4) | \
|
|
DEFAULT_GPIO_SPEED( 5) | \
|
|
DEFAULT_GPIO_SPEED( 6) | \
|
|
DEFAULT_GPIO_SPEED( 7) | \
|
|
DEFAULT_GPIO_SPEED( 8) | \
|
|
DEFAULT_GPIO_SPEED( 9) | \
|
|
DEFAULT_GPIO_SPEED(10) | \
|
|
DEFAULT_GPIO_SPEED(11) | \
|
|
DEFAULT_GPIO_SPEED(12) | \
|
|
DEFAULT_GPIO_SPEED(13) | \
|
|
DEFAULT_GPIO_SPEED(14) | \
|
|
DEFAULT_GPIO_SPEED(15))
|
|
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP( 0) | \
|
|
PIN_PUPDR_FLOATING( 1) | \
|
|
PIN_PUPDR_PULLUP( 2) | \
|
|
PIN_PUPDR_FLOATING( 3) | \
|
|
PIN_PUPDR_FLOATING( 4) | \
|
|
PIN_PUPDR_PULLUP( 5) | \
|
|
PIN_PUPDR_FLOATING( 6) | \
|
|
PIN_PUPDR_PULLUP( 7) | \
|
|
PIN_PUPDR_FLOATING( 8) | \
|
|
PIN_PUPDR_FLOATING( 9) | \
|
|
PIN_PUPDR_FLOATING(10) | \
|
|
PIN_PUPDR_FLOATING(11) | \
|
|
PIN_PUPDR_FLOATING(12) | \
|
|
PIN_PUPDR_FLOATING(13) | \
|
|
PIN_PUPDR_FLOATING(14) | \
|
|
PIN_PUPDR_PULLUP(15))
|
|
#define VAL_GPIOE_ODR (PIN_ODR_LOW(3) | \
|
|
PIN_ODR_HIGH(4) | \
|
|
PIN_ODR_LOW(9))
|
|
#define VAL_GPIOE_AFRL (PIN_AFIO_AF( 0, 8U) | \
|
|
PIN_AFIO_AF( 1, 8U) | \
|
|
PIN_AFIO_AF( 2, 9U) | \
|
|
PIN_AFIO_AF( 3, 0U) | \
|
|
PIN_AFIO_AF( 4, 5U) | \
|
|
PIN_AFIO_AF( 5, 5U) | \
|
|
PIN_AFIO_AF( 6, 5U) | \
|
|
PIN_AFIO_AF( 7, 8U))
|
|
#define VAL_GPIOE_AFRH (PIN_AFIO_AF( 8, 8U) | \
|
|
PIN_AFIO_AF( 9, 0U) | \
|
|
PIN_AFIO_AF(10, 1U) | \
|
|
PIN_AFIO_AF(11, 1U) | \
|
|
PIN_AFIO_AF(12, 5U) | \
|
|
PIN_AFIO_AF(13, 1U) | \
|
|
PIN_AFIO_AF(14, 1U) | \
|
|
PIN_AFIO_AF(15, 0U))
|
|
|
|
/*
|
|
* GPIOF setup:
|
|
*
|
|
* PF0 -
|
|
* PF1 -
|
|
* PF2 -
|
|
* PF3 -
|
|
* PF4 -
|
|
* PF5 -
|
|
* PF6 -
|
|
* PF7 -
|
|
* PF8 -
|
|
* PF9 -
|
|
* PF10 -
|
|
* PF11 -
|
|
* PF12 -
|
|
* PF13 -
|
|
* PF14 - self simulation pin 0 (actually i2c)
|
|
* PF15 - self simulation pin 1 (actually i2c)
|
|
*/
|
|
#define VAL_GPIOF_MODER (PIN_MODE_OUTPUT(0) | \
|
|
PIN_MODE_OUTPUT(1) | \
|
|
PIN_MODE_OUTPUT(2) | \
|
|
PIN_MODE_ANALOG(3) | \
|
|
PIN_MODE_ANALOG(4) | \
|
|
PIN_MODE_ANALOG(5) | \
|
|
PIN_MODE_ANALOG(6) | \
|
|
PIN_MODE_ANALOG(7) | \
|
|
/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_OUTPUT(8) | \
|
|
/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_OUTPUT(9) | \
|
|
PIN_MODE_ALTERNATE(10) | \
|
|
PIN_MODE_OUTPUT(11) | \
|
|
PIN_MODE_OUTPUT(12) | \
|
|
PIN_MODE_INPUT(13) | \
|
|
/* PIN_MODE_ALTERNATE(14) | \ */ PIN_MODE_OUTPUT(14) | \
|
|
/* PIN_MODE_ALTERNATE(15)) */ PIN_MODE_OUTPUT(15))
|
|
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
|
PIN_OTYPE_PUSHPULL( 1) | \
|
|
PIN_OTYPE_PUSHPULL( 2) | \
|
|
PIN_OTYPE_PUSHPULL( 3) | \
|
|
PIN_OTYPE_PUSHPULL( 4) | \
|
|
PIN_OTYPE_PUSHPULL( 5) | \
|
|
PIN_OTYPE_PUSHPULL( 6) | \
|
|
PIN_OTYPE_PUSHPULL( 7) | \
|
|
PIN_OTYPE_PUSHPULL( 8) | \
|
|
PIN_OTYPE_PUSHPULL( 9) | \
|
|
PIN_OTYPE_PUSHPULL(10) | \
|
|
PIN_OTYPE_PUSHPULL(11) | \
|
|
PIN_OTYPE_PUSHPULL(12) | \
|
|
PIN_OTYPE_PUSHPULL(13) | \
|
|
/* PIN_OTYPE_OPENDRAIN(14)| \ */ PIN_OTYPE_PUSHPULL(14) | \
|
|
/* PIN_OTYPE_OPENDRAIN(15)) */ PIN_OTYPE_PUSHPULL(15))
|
|
#define VAL_GPIOF_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
|
DEFAULT_GPIO_SPEED( 1) | \
|
|
DEFAULT_GPIO_SPEED( 2) | \
|
|
DEFAULT_GPIO_SPEED( 3) | \
|
|
DEFAULT_GPIO_SPEED( 4) | \
|
|
DEFAULT_GPIO_SPEED( 5) | \
|
|
DEFAULT_GPIO_SPEED( 6) | \
|
|
DEFAULT_GPIO_SPEED( 7) | \
|
|
DEFAULT_GPIO_SPEED( 8) | \
|
|
DEFAULT_GPIO_SPEED( 9) | \
|
|
DEFAULT_GPIO_SPEED(10) | \
|
|
DEFAULT_GPIO_SPEED(11) | \
|
|
DEFAULT_GPIO_SPEED(12) | \
|
|
DEFAULT_GPIO_SPEED(13) | \
|
|
DEFAULT_GPIO_SPEED(14) | \
|
|
DEFAULT_GPIO_SPEED(15))
|
|
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
|
PIN_PUPDR_FLOATING( 1) | \
|
|
PIN_PUPDR_FLOATING( 2) | \
|
|
PIN_PUPDR_FLOATING( 3) | \
|
|
PIN_PUPDR_FLOATING( 4) | \
|
|
PIN_PUPDR_FLOATING( 5) | \
|
|
PIN_PUPDR_FLOATING( 6) | \
|
|
PIN_PUPDR_FLOATING( 7) | \
|
|
PIN_PUPDR_FLOATING( 8) | \
|
|
PIN_PUPDR_FLOATING( 9) | \
|
|
PIN_PUPDR_FLOATING(10) | \
|
|
PIN_PUPDR_FLOATING(11) | \
|
|
PIN_PUPDR_FLOATING(12) | \
|
|
PIN_PUPDR_PULLUP(13) | \
|
|
PIN_PUPDR_PULLUP(14) | \
|
|
PIN_PUPDR_PULLUP(15))
|
|
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(0) | \
|
|
PIN_ODR_HIGH(1) | \
|
|
PIN_ODR_HIGH(2) | \
|
|
PIN_ODR_LOW(8) | \
|
|
PIN_ODR_LOW(9) | \
|
|
PIN_ODR_HIGH(11) | \
|
|
PIN_ODR_HIGH(12) | \
|
|
PIN_ODR_HIGH(14) | \
|
|
PIN_ODR_HIGH(15))
|
|
#define VAL_GPIOF_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
|
PIN_AFIO_AF( 1, 0U) | \
|
|
PIN_AFIO_AF( 2, 0U) | \
|
|
PIN_AFIO_AF( 3, 0U) | \
|
|
PIN_AFIO_AF( 4, 0U) | \
|
|
PIN_AFIO_AF( 5, 0U) | \
|
|
PIN_AFIO_AF( 6, 0U) | \
|
|
PIN_AFIO_AF( 7, 0U))
|
|
#define VAL_GPIOF_AFRH (PIN_AFIO_AF( 8, 9U) | \
|
|
PIN_AFIO_AF( 9, 9U) | \
|
|
PIN_AFIO_AF(10, 9U) | \
|
|
PIN_AFIO_AF(11, 0U) | \
|
|
PIN_AFIO_AF(12, 0U) | \
|
|
PIN_AFIO_AF(13, 0U) | \
|
|
/*PIN_AFIO_AF(14, 4U) | \ */ PIN_AFIO_AF(14, 0U) | \
|
|
/*PIN_AFIO_AF(15, 4U)) */ PIN_AFIO_AF(15, 0U))
|
|
|
|
/*
|
|
* GPIOG setup:
|
|
*
|
|
* PG0 -
|
|
* PG1 -
|
|
* PG2 -
|
|
* PG3 -
|
|
* PG4 -
|
|
* PG5 -
|
|
* PG6 - LD1 - active low
|
|
* PG7 - LD3 - active low
|
|
* PG8 - LD2 - active PIN_ODR_LOW
|
|
* PG9 -
|
|
* PG10 -
|
|
* PG11 -
|
|
* PG12 -
|
|
* PG13 -
|
|
* PG14 -
|
|
* PG15 -
|
|
*/
|
|
#define VAL_GPIOG_MODER (PIN_MODE_OUTPUT(0) | \
|
|
PIN_MODE_INPUT(1) | \
|
|
PIN_MODE_OUTPUT(2) | \
|
|
PIN_MODE_OUTPUT(3) | \
|
|
PIN_MODE_OUTPUT(4) | \
|
|
PIN_MODE_OUTPUT(5) | \
|
|
PIN_MODE_OUTPUT(6) | \
|
|
PIN_MODE_OUTPUT(7) | \
|
|
PIN_MODE_OUTPUT(8) | \
|
|
PIN_MODE_ALTERNATE(9) | \
|
|
PIN_MODE_ALTERNATE(10) | \
|
|
PIN_MODE_ALTERNATE(11) | \
|
|
PIN_MODE_ALTERNATE(12) | \
|
|
PIN_MODE_OUTPUT(13) | \
|
|
PIN_MODE_ALTERNATE(14) | \
|
|
PIN_MODE_OUTPUT(15))
|
|
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
|
PIN_OTYPE_PUSHPULL( 1) | \
|
|
PIN_OTYPE_PUSHPULL( 2) | \
|
|
PIN_OTYPE_PUSHPULL( 3) | \
|
|
PIN_OTYPE_PUSHPULL( 4) | \
|
|
PIN_OTYPE_PUSHPULL( 5) | \
|
|
PIN_OTYPE_OPENDRAIN( 6)| \
|
|
PIN_OTYPE_OPENDRAIN( 7)| \
|
|
PIN_OTYPE_OPENDRAIN( 8)| \
|
|
PIN_OTYPE_PUSHPULL( 9) | \
|
|
PIN_OTYPE_PUSHPULL(10) | \
|
|
PIN_OTYPE_PUSHPULL(11) | \
|
|
PIN_OTYPE_PUSHPULL(12) | \
|
|
PIN_OTYPE_PUSHPULL(13) | \
|
|
PIN_OTYPE_OPENDRAIN(14)| \
|
|
PIN_OTYPE_PUSHPULL(15))
|
|
#define VAL_GPIOG_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
|
DEFAULT_GPIO_SPEED( 1) | \
|
|
DEFAULT_GPIO_SPEED( 2) | \
|
|
DEFAULT_GPIO_SPEED( 3) | \
|
|
DEFAULT_GPIO_SPEED( 4) | \
|
|
DEFAULT_GPIO_SPEED( 5) | \
|
|
DEFAULT_GPIO_SPEED( 6) | \
|
|
DEFAULT_GPIO_SPEED( 7) | \
|
|
DEFAULT_GPIO_SPEED( 8) | \
|
|
DEFAULT_GPIO_SPEED( 9) | \
|
|
DEFAULT_GPIO_SPEED(10) | \
|
|
DEFAULT_GPIO_SPEED(11) | \
|
|
DEFAULT_GPIO_SPEED(12) | \
|
|
DEFAULT_GPIO_SPEED(13) | \
|
|
DEFAULT_GPIO_SPEED(14) | \
|
|
DEFAULT_GPIO_SPEED(15))
|
|
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
|
PIN_PUPDR_PULLUP( 1) | \
|
|
PIN_PUPDR_FLOATING( 2) | \
|
|
PIN_PUPDR_FLOATING( 3) | \
|
|
PIN_PUPDR_FLOATING( 4) | \
|
|
PIN_PUPDR_FLOATING( 5) | \
|
|
PIN_PUPDR_FLOATING( 6) | \
|
|
PIN_PUPDR_FLOATING( 7) | \
|
|
PIN_PUPDR_FLOATING( 8) | \
|
|
PIN_PUPDR_PULLUP( 9) | \
|
|
PIN_PUPDR_PULLUP(10) | \
|
|
PIN_PUPDR_PULLUP(11) | \
|
|
PIN_PUPDR_PULLUP(12) | \
|
|
PIN_PUPDR_FLOATING(13) | \
|
|
PIN_PUPDR_PULLUP(14) | \
|
|
PIN_PUPDR_FLOATING(15))
|
|
#define VAL_GPIOG_ODR (PIN_ODR_LOW(0) | \
|
|
PIN_ODR_LOW(2) | \
|
|
PIN_ODR_LOW(3) | \
|
|
PIN_ODR_LOW(4) | \
|
|
PIN_ODR_LOW(5) | \
|
|
PIN_ODR_HIGH(6) | \
|
|
PIN_ODR_HIGH(7) | \
|
|
PIN_ODR_HIGH(8) | \
|
|
PIN_ODR_HIGH(13) | \
|
|
PIN_ODR_LOW(15))
|
|
#define VAL_GPIOG_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
|
PIN_AFIO_AF( 1, 0U) | \
|
|
PIN_AFIO_AF( 2, 0U) | \
|
|
PIN_AFIO_AF( 3, 0U) | \
|
|
PIN_AFIO_AF( 4, 0U) | \
|
|
PIN_AFIO_AF( 5, 0U) | \
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PIN_AFIO_AF( 6, 0U) | \
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PIN_AFIO_AF( 7, 0U))
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#define VAL_GPIOG_AFRH (PIN_AFIO_AF( 8, 0U) | \
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PIN_AFIO_AF( 9, 11U) | \
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PIN_AFIO_AF(10, 11U) | \
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PIN_AFIO_AF(11, 10U) | \
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PIN_AFIO_AF(12, 11U) | \
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PIN_AFIO_AF(13, 0U) | \
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PIN_AFIO_AF(14, 8U) | \
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PIN_AFIO_AF(15, 0U))
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/*
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* GPIOH setup:
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*
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* PH0 - OSC_IN (input floating).
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* PH1 - OSC_OUT (input floating).
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*/
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#define VAL_GPIOH_MODER (PIN_MODE_INPUT(0) | \
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PIN_MODE_INPUT(1))
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#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
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PIN_OTYPE_PUSHPULL( 1))
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#define VAL_GPIOH_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
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DEFAULT_GPIO_SPEED( 1))
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#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING( 0) | \
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PIN_PUPDR_FLOATING( 1))
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#define VAL_GPIOH_ODR (PIN_ODR_HIGH( 0) | \
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PIN_ODR_HIGH( 1))
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#define VAL_GPIOH_AFRL (PIN_AFIO_AF( 0, 0U) | \
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PIN_AFIO_AF( 1, 0U))
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#define VAL_GPIOH_AFRH (0)
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#endif /* BOARD_H */
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