mirror of https://github.com/rusefi/rusefi-1.git
95 lines
2.6 KiB
C
95 lines
2.6 KiB
C
/*
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* @file global.h
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*
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* Global utility header file for firmware
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*
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* Simulator and unit tests have their own version of this header
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*
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* @date May 27, 2013
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* @author Andrey Belomutskiy, (c) 2012-2020
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*/
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#pragma once
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// todo: remove this from here and rely on os_access.h. unfortunately hal.h includes ch.h :(
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#include <hal.h>
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// *** IMPORTANT *** from painful experience we know that common_headers.h has to be included AFTER hal.h
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// *** https://github.com/rusefi/rusefi/issues/1007 ***
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#include "common_headers.h"
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// for US_TO_NT_MULTIPLIER
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#include "mpu_util.h"
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// this is about MISRA not liking 'time.h'. todo: figure out something
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#if defined __GNUC__
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// GCC
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#include <sys/types.h>
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#else
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// IAR
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typedef unsigned int time_t;
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#endif
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#ifdef __cplusplus
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#include "eficonsole.h"
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#include <ch.hpp>
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#endif /* __cplusplus */
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/* definition to expand macro then apply to pragma message */
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#define VALUE_TO_STRING(x) #x
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#define VALUE(x) VALUE_TO_STRING(x)
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#define VAR_NAME_VALUE(var) #var "=" VALUE(var)
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#define CORE_CLOCK STM32_SYSCLK
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//#pragma message(VAR_NAME_VALUE(CORE_CLOCK))
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/**
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* project-wide default thread stack size
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* See also PORT_INT_REQUIRED_STACK
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* See getRemainingStack()
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* See CountFreeStackSpace()
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* See "threadsinfo" command cmd_threads
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*/
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#ifndef UTILITY_THREAD_STACK_SIZE
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#define UTILITY_THREAD_STACK_SIZE 400
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#endif /* UTILITY_THREAD_STACK_SIZE */
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#define getCurrentRemainingStack() getRemainingStack(chThdGetSelfX())
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#define EFI_ERROR_CODE 0xffffffff
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/**
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* rusEfi is placing some of data structures into CCM memory simply
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* in order to use that memory - no magic about which RAM is faster etc.
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* That said, CCM/TCM could be faster as there will be less bus contention
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* with DMA.
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*
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* Please note that DMA does not work with CCM memory
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*/
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#if defined(STM32F4XX)
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// CCM memory is 64k
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#define CCM_OPTIONAL __attribute__((section(".ram4")))
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#define SDRAM_OPTIONAL __attribute__((section(".ram7")))
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#define NO_CACHE // F4 has no cache, do nothing
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#elif defined(STM32F7XX)
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// DTCM memory is 128k
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#define CCM_OPTIONAL __attribute__((section(".ram3")))
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//TODO: update LD file!
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#define SDRAM_OPTIONAL __attribute__((section(".ram7")))
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// SRAM2 is 16k and set to disable dcache
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#define NO_CACHE __attribute__((section(".ram2")))
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#elif defined(STM32H7XX)
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// DTCM memory is 128k
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#define CCM_OPTIONAL __attribute__((section(".ram5")))
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//TODO: update LD file!
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#define SDRAM_OPTIONAL __attribute__((section(".ram8")))
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// SRAM3 is 32k and set to disable dcache
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#define NO_CACHE __attribute__((section(".ram3")))
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#else /* this MCU doesn't need these */
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#define CCM_OPTIONAL
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#define NO_CACHE
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#endif
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#define UNIT_TEST_BUSY_WAIT_CALLBACK() {}
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