rusefi-full/hardware/gerbmerge/brain2layer.cfg

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[DEFAULT]
projdir = .
[Options]
ExcellonLeadingZeros = 1
PanelWidth = 400
PanelHeight = 300
XSpacing = 2
YSpacing = 2
MeasurementUnits = mm
AllowMissingLayers = 0
searchtimeout = 10
[MergeOutputFiles]
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Prefix = %(projdir)s/merged2layer
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*TopLayer=%(prefix)s/Top.gbr
*BottomLayer=%(prefix)s/Bottom.gbr
*TopSilkscreen=%(prefix)s/TopSilk.gbr
*BottomSilkscreen=%(prefix)s/BottomSilk.gbr
*TopSoldermask=%(prefix)s/TopMask.gbr
*BottomSoldermask=%(prefix)s/BottomMask.gbr
Drills=%(prefix)s/Drills.txt
BoardOutline=%(prefix)s/BoardOutline.gbr
ToolList = %(prefix)s/Tools.drl
Placement = %(prefix)s/Placement.txt
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[brain100]
Prefix=%(projdir)s/../brain_board/gerber/brain_board_STM32F407_R0.3/brain_board_STM32F407
*TopLayer=%(prefix)s-F.Cu.gtl
*BottomLayer=%(prefix)s-B.Cu.gbl
*TopSilkscreen=%(prefix)s-F.SilkS.gto
*TopSoldermask=%(prefix)s-F.Mask.gts
*BottomSilkscreen=%(prefix)s-B.SilkS.gbo
*BottomSoldermask=%(prefix)s-B.Mask.gbs
Drills=%(prefix)s_gm.drl
BoardOutline=%(prefix)s-Edge.Cuts.gm1
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Repeat = 10
[bb]
Prefix=%(projdir)s/bb
*TopLayer=%(prefix)s/Top.gbr
*BottomLayer=%(prefix)s/Bottom.gbr
*TopSilkscreen=%(prefix)s/TopSilk.gbr
*TopSoldermask=%(prefix)s/TopMask.gbr
*BottomSilkscreen=%(prefix)s/BottomSilk.gbr
*BottomSoldermask=%(prefix)s/BottomMask.gbr
Drills=%(prefix)s/Through.drl
BoardOutline=%(prefix)s/BoardOutline.gbr
Repeat = 6