auto-sync

2016-01-18 11:01:45 -05:00 · 2016-01-18 11:01:45 -05:00 · 611900d721
parent a671121327
commit 611900d721
31 changed files with 2573 additions and 3050 deletions
--- a/hardware/DDPAK_breakout/DDPAK_breakout.kicad_pcb
+++ b/hardware/DDPAK_breakout/DDPAK_breakout.kicad_pcb
@ -1,4 +1,4 @@
-(kicad_pcb (version 3) (host pcbnew "(2013-07-07 BZR 4022)-stable")
+(kicad_pcb (version 4) (host pcbnew 4.0.1-stable)

  (general
    (links 11)
@ -13,28 +13,28 @@
  )

  (page A)
-  (title_block 
+  (title_block
    (title "DDPAK breakout")
    (rev R0.2)
    (company rusEFI)
  )

  (layers
-    (15 F.Cu signal)
-    (0 B.Cu signal)
-    (16 B.Adhes user)
-    (17 F.Adhes user)
-    (18 B.Paste user)
-    (19 F.Paste user)
-    (20 B.SilkS user)
-    (21 F.SilkS user)
-    (22 B.Mask user)
-    (23 F.Mask user)
-    (24 Dwgs.User user)
-    (25 Cmts.User user)
-    (26 Eco1.User user)
-    (27 Eco2.User user)
-    (28 Edge.Cuts user)
+    (0 F.Cu signal)
+    (31 B.Cu signal)
+    (32 B.Adhes user)
+    (33 F.Adhes user)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (41 Cmts.User user)
+    (42 Eco1.User user)
+    (43 Eco2.User user)
+    (44 Edge.Cuts user)
  )

  (setup
@ -67,7 +67,7 @@
    (aux_axis_origin 0 0)
    (visible_elements 7FFFFF3F)
    (pcbplotparams
-      (layerselection 334528513)
+      (layerselection 0x00030_80000001)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.150000)
@ -83,7 +83,6 @@
      (psa4output false)
      (plotreference true)
      (plotvalue true)
-      (plotothertext true)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
@ -91,7 +90,7 @@
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
-      (outputdirectory DDPAK_breakout_gerbers))
+      (outputdirectory ""))
  )

  (net 0 "")
@ -107,7 +106,6 @@
    (via_drill 0.635)
    (uvia_dia 0.508)
    (uvia_drill 0.127)
-    (add_net "")
    (add_net /GND)
    (add_net /HV)
    (add_net /SIG)
@ -149,30 +147,18 @@
    (fp_line (start 0.508 -0.762) (end 1.524 -0.762) (layer F.SilkS) (width 0.09906))
    (fp_line (start 1.524 -0.762) (end 1.524 0.762) (layer F.SilkS) (width 0.09906))
    (fp_line (start 1.524 0.762) (end 0.508 0.762) (layer F.SilkS) (width 0.09906))
-    (pad 2 smd rect (at 1.27 0 90) (size 1.524 0.2032)
-      (layers F.Cu F.Paste F.Mask)
-      (net 4 /SIG2)
-    )
-    (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397)
-      (layers F.Cu F.Paste F.Mask)
-      (net 3 /SIG)
-    )
-    (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397)
-      (layers F.Cu F.Paste F.Mask)
-      (net 4 /SIG2)
-    )
-    (pad 2 thru_hole circle (at 1.905 0 90) (size 1.524 1.524) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 4 /SIG2)
-    )
-    (pad 1 thru_hole circle (at -1.905 0 90) (size 1.524 1.524) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 /SIG)
-    )
-    (pad 1 smd rect (at -1.27 0 90) (size 1.524 0.2032)
-      (layers F.Cu F.Paste F.Mask)
-      (net 3 /SIG)
-    )
+    (pad 2 smd rect (at 1.27 0 90) (size 1.524 0.2032) (layers F.Cu F.Paste F.Mask)
+      (net 4 /SIG2))
+    (pad 1 smd rect (at -0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 3 /SIG))
+    (pad 2 smd rect (at 0.9525 0 90) (size 0.889 1.397) (layers F.Cu F.Paste F.Mask)
+      (net 4 /SIG2))
+    (pad 2 thru_hole circle (at 1.905 0 90) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+      (net 4 /SIG2))
+    (pad 1 thru_hole circle (at -1.905 0 90) (size 1.524 1.524) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /SIG))
+    (pad 1 smd rect (at -1.27 0 90) (size 1.524 0.2032) (layers F.Cu F.Paste F.Mask)
+      (net 3 /SIG))
    (model smd/chip_cms.wrl
      (at (xyz 0 0 0))
      (scale (xyz 0.1 0.1 0.1))
@ -273,14 +259,10 @@
    (fp_arc (start -2.46126 -6.0706) (end -0.99822 -4.11734) (angle 75.5) (layer F.SilkS) (width 0.1524))
    (fp_arc (start -2.53746 -3.7084) (end -4.1402 -5.0038) (angle 100) (layer F.SilkS) (width 0.1524))
    (fp_arc (start -3.6576 -4.64566) (end -3.94462 -4.1275) (angle 104.2) (layer F.SilkS) (width 0.1524))
-    (pad 1 thru_hole oval (at -2.5146 0 270) (size 1.9812 3.9624) (drill 1.3208)
-      (layers *.Cu F.Paste F.SilkS F.Mask)
-      (net 2 /HV)
-    )
-    (pad 2 thru_hole oval (at 2.4892 0 270) (size 1.9812 3.9624) (drill 1.3208)
-      (layers *.Cu F.Paste F.SilkS F.Mask)
-      (net 1 /GND)
-    )
+    (pad 1 thru_hole oval (at -2.5146 0 270) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu F.Paste F.SilkS F.Mask)
+      (net 2 /HV))
+    (pad 2 thru_hole oval (at 2.4892 0 270) (size 1.9812 3.9624) (drill 1.3208) (layers *.Cu F.Paste F.SilkS F.Mask)
+      (net 1 /GND))
  )

  (module SM2010 (layer F.Cu) (tedit 544A1B10) (tstamp 5449C04A)
@ -301,19 +283,10 @@
    (fp_line (start 3.48234 -1.60528) (end 1.19634 -1.60528) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.2 -1.6) (end -3.5 -1.6) (layer F.SilkS) (width 0.15))
    (fp_line (start -3.5 1.6) (end -1.2 1.6) (layer F.SilkS) (width 0.15))
-    (pad 1 smd rect (at -2.4003 0) (size 1.80086 2.70002)
-      (layers F.Cu F.Paste F.Mask)
-      (net 4 /SIG2)
-    )
-    (pad 2 smd rect (at 2.4003 0) (size 1.80086 2.70002)
-      (layers F.Cu F.Paste F.Mask)
-      (net 1 /GND)
-    )
-    (model smd\chip_smd_pol_wide.wrl
-      (at (xyz 0 0 0))
-      (scale (xyz 0.35 0.35 0.35))
-      (rotate (xyz 0 0 0))
-    )
+    (pad 1 smd rect (at -2.4003 0) (size 1.80086 2.70002) (layers F.Cu F.Paste F.Mask)
+      (net 4 /SIG2))
+    (pad 2 smd rect (at 2.4003 0) (size 1.80086 2.70002) (layers F.Cu F.Paste F.Mask)
+      (net 1 /GND))
  )

  (module SIL-1 (layer F.Cu) (tedit 549F505C) (tstamp 544A798F)
@ -331,10 +304,8 @@
    (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.3175))
    (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at 0 0) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 1 /GND)
-    )
+    (pad 1 thru_hole rect (at 0 0) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+      (net 1 /GND))
  )

  (module SIL-1 (layer F.Cu) (tedit 549D4054) (tstamp 544A7985)
@ -352,10 +323,8 @@
    (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.3175))
    (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.3048))
    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.3048))
-    (pad 1 thru_hole rect (at 0 0 180) (size 1.397 1.397) (drill 0.8128)
-      (layers *.Cu *.Mask F.SilkS)
-      (net 3 /SIG)
-    )
+    (pad 1 thru_hole rect (at 0 0 180) (size 1.397 1.397) (drill 0.8128) (layers *.Cu *.Mask F.SilkS)
+      (net 3 /SIG))
  )

  (module m-pad-2.1-TO-263AB (layer F.Cu) (tedit 549D3FB2) (tstamp 5449C06D)
@ -402,17 +371,16 @@
    (fp_line (start 3.0988 10.79754) (end 3.0988 7.69874) (layer F.SilkS) (width 0.127))
    (fp_line (start 3.0988 7.69874) (end 3.29946 7.0993) (layer F.SilkS) (width 0.127))
    (fp_line (start 3.29946 7.0993) (end 3.29946 4.49834) (layer F.SilkS) (width 0.127))
-    (pad 2 smd rect (at 0 0) (size 9.99998 8.99922)
-      (layers F.Cu F.Paste F.Mask)
-      (net 2 /HV)
-    )
-    (pad 1 smd rect (at -2.49936 9.99998) (size 1.4986 3.99796)
-      (layers F.Cu F.Paste F.Mask)
-      (net 4 /SIG2)
-    )
-    (pad 3 smd rect (at 2.49936 9.99998) (size 1.4986 3.99796)
-      (layers F.Cu F.Paste F.Mask)
-      (net 1 /GND)
+    (pad 2 smd rect (at 0 0) (size 9.99998 8.99922) (layers F.Cu F.Paste F.Mask)
+      (net 2 /HV))
+    (pad 1 smd rect (at -2.49936 9.99998) (size 1.4986 3.99796) (layers F.Cu F.Paste F.Mask)
+      (net 4 /SIG2))
+    (pad 3 smd rect (at 2.49936 9.99998) (size 1.4986 3.99796) (layers F.Cu F.Paste F.Mask)
+      (net 1 /GND))
+    (model smd/dpack_2.wrl
+      (at (xyz 0 -0.3 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
    )
  )

--- a/hardware/DDPAK_breakout/DDPAK_breakout.pro
+++ b/hardware/DDPAK_breakout/DDPAK_breakout.pro
@ -1,70 +1,26 @@
-update=12/26/2014 6:49:06 AM
-last_client=eeschema
+update=1/18/2016 5:04:46 AM
+last_client=kicad
 [cvpcb]
 version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=SM0805-Jumper
-LibName18=d2pak_TO263AB
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=PcbnewAdvanced
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -83,3 +39,32 @@ LibName27=opto
 LibName28=atmel
 LibName29=contrib
 LibName30=valves
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
+[pcbnew]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+LastNetListRead=
+PadDrill=0.6
+PadDrillOvalY=0.6
+PadSizeH=1.5
+PadSizeV=1.5
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/DDPAK_breakout/DDPAK_breakout.sch
+++ b/hardware/DDPAK_breakout/DDPAK_breakout.sch
@ -1,4 +1,5 @@
 EESchema Schematic File Version 2
+LIBS:KICAD_Older_Version
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -10,7 +11,6 @@ LIBS:cmos4000
 LIBS:adc-dac
 LIBS:memory
 LIBS:xilinx
-LIBS:special
 LIBS:microcontrollers
 LIBS:dsp
 LIBS:microchip
@ -29,8 +29,7 @@ LIBS:opto
 LIBS:atmel
 LIBS:contrib
 LIBS:valves
-LIBS:DDPAK_breakout-cache
-EELAYER 27 0
+EELAYER 25 0
 EELAYER END
 $Descr A 11000 8500
 encoding utf-8
--- a/hardware/DPAK2_breakout/DPAK2_breakout.pro
+++ b/hardware/DPAK2_breakout/DPAK2_breakout.pro
@ -1,69 +1,26 @@
-update=12/22/2014 7:07:18 PM
-last_client=eeschema
+update=1/18/2016 5:59:10 AM
+last_client=kicad
 [cvpcb]
 version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=SM0805-Jumper
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -82,3 +39,32 @@ LibName27=opto
 LibName28=atmel
 LibName29=contrib
 LibName30=valves
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
+[pcbnew]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+LastNetListRead=
+PadDrill=0.6
+PadDrillOvalY=0.6
+PadSizeH=1.5
+PadSizeV=1.5
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/NGC_38_connector/NGC_38_connector.kicad_pcb
+++ b/hardware/NGC_38_connector/NGC_38_connector.kicad_pcb
--- a/hardware/NGC_38_connector/NGC_38_connector.net
+++ b/hardware/NGC_38_connector/NGC_38_connector.net
@ -1,7 +1,7 @@
 (export (version D)
  (design
-    (source F:/stuff/rusefi_sourceforge/hardware/NGC_38_connector/NGC_38_connector.sch)
-    (date "30/05/2015 11:04:24")
+    (source C:\Users\LJ\Desktop\Jared\daecu\Hardware\trunk\rusefi.com\NGC_38_connector\NGC_38_connector.sch)
+    (date "10/21/2014 6:34:32 AM")
    (tool "eeschema (2013-07-07 BZR 4022)-stable"))
  (components
    (comp (ref P1)
@ -33,7 +33,31 @@
      (footprint SIL-9)
      (libsource (lib conn) (part CONN_9))
      (sheetpath (names /) (tstamps /))
-      (tstamp 543ECFEB)))
+      (tstamp 543ECFEB))
+    (comp (ref P8)
+      (value CONN_9)
+      (footprint SIL-9)
+      (libsource (lib conn) (part CONN_9))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 54463158))
+    (comp (ref P9)
+      (value CONN_10)
+      (footprint SIL-10)
+      (libsource (lib conn) (part CONN_10))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5446315E))
+    (comp (ref P7)
+      (value CONN_9)
+      (footprint SIL-9)
+      (libsource (lib conn) (part CONN_9))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 54463164))
+    (comp (ref P6)
+      (value CONN_10)
+      (footprint SIL-10)
+      (libsource (lib conn) (part CONN_10))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 5446316A)))
  (libparts
    (libpart (lib conn) (part CONN_10)
      (description "Symbole general de connecteur")
@ -111,119 +135,157 @@
        (pin (num 38) (name P38) (type passive)))))
  (libraries
    (library (logical conn)
-      (uri "C:\\Program Files (x86)\\KiCad\\share\\library\\conn.lib")))
+      (uri "C:\\Program Files\\KiCad\\share\\library\\conn.lib")))
  (nets
    (net (code 1) (name "")
-      (node (ref P1) (pin 15))
-      (node (ref P3) (pin 5)))
+      (node (ref P1) (pin 1))
+      (node (ref P2) (pin 1))
+      (node (ref P6) (pin 1)))
    (net (code 2) (name "")
-      (node (ref P2) (pin 10))
-      (node (ref P1) (pin 10)))
+      (node (ref P2) (pin 2))
+      (node (ref P1) (pin 2))
+      (node (ref P6) (pin 2)))
    (net (code 3) (name "")
+      (node (ref P2) (pin 3))
+      (node (ref P6) (pin 3))
+      (node (ref P1) (pin 3)))
+    (net (code 4) (name "")
+      (node (ref P6) (pin 4))
+      (node (ref P2) (pin 4))
+      (node (ref P1) (pin 4)))
+    (net (code 5) (name "")
+      (node (ref P2) (pin 5))
+      (node (ref P1) (pin 5))
+      (node (ref P6) (pin 5)))
+    (net (code 6) (name "")
+      (node (ref P1) (pin 6))
+      (node (ref P6) (pin 6))
+      (node (ref P2) (pin 6)))
+    (net (code 7) (name "")
+      (node (ref P1) (pin 7))
+      (node (ref P2) (pin 7))
+      (node (ref P6) (pin 7)))
+    (net (code 8) (name "")
+      (node (ref P1) (pin 8))
+      (node (ref P6) (pin 8))
+      (node (ref P2) (pin 8)))
+    (net (code 9) (name "")
+      (node (ref P6) (pin 9))
      (node (ref P2) (pin 9))
      (node (ref P1) (pin 9)))
-    (net (code 4) (name "")
-      (node (ref P2) (pin 8))
-      (node (ref P1) (pin 8)))
-    (net (code 5) (name "")
-      (node (ref P1) (pin 7))
-      (node (ref P2) (pin 7)))
-    (net (code 6) (name "")
-      (node (ref P2) (pin 6))
-      (node (ref P1) (pin 6)))
-    (net (code 7) (name "")
-      (node (ref P2) (pin 5))
-      (node (ref P1) (pin 5)))
-    (net (code 8) (name "")
-      (node (ref P1) (pin 4))
-      (node (ref P2) (pin 4)))
-    (net (code 9) (name "")
-      (node (ref P1) (pin 3))
-      (node (ref P2) (pin 3)))
    (net (code 10) (name "")
-      (node (ref P1) (pin 2))
-      (node (ref P2) (pin 2)))
+      (node (ref P6) (pin 10))
+      (node (ref P1) (pin 10))
+      (node (ref P2) (pin 10)))
    (net (code 11) (name "")
-      (node (ref P1) (pin 1))
-      (node (ref P2) (pin 1)))
-    (net (code 12) (name "")
-      (node (ref P1) (pin 19))
-      (node (ref P3) (pin 9)))
-    (net (code 13) (name "")
-      (node (ref P1) (pin 18))
-      (node (ref P3) (pin 8)))
-    (net (code 14) (name "")
+      (node (ref P7) (pin 7))
      (node (ref P1) (pin 17))
      (node (ref P3) (pin 7)))
-    (net (code 15) (name "")
-      (node (ref P3) (pin 6))
-      (node (ref P1) (pin 16)))
-    (net (code 16) (name "")
-      (node (ref P5) (pin 1))
-      (node (ref P1) (pin 20)))
-    (net (code 17) (name "")
-      (node (ref P3) (pin 4))
-      (node (ref P1) (pin 14)))
-    (net (code 18) (name "")
-      (node (ref P3) (pin 3))
-      (node (ref P1) (pin 13)))
-    (net (code 19) (name "")
-      (node (ref P1) (pin 12))
-      (node (ref P3) (pin 2)))
-    (net (code 20) (name "")
-      (node (ref P3) (pin 1))
-      (node (ref P1) (pin 11)))
-    (net (code 21) (name "")
-      (node (ref P5) (pin 9))
-      (node (ref P1) (pin 28)))
-    (net (code 22) (name "")
-      (node (ref P5) (pin 8))
-      (node (ref P1) (pin 27)))
-    (net (code 23) (name "")
+    (net (code 12) (name "")
+      (node (ref P1) (pin 24))
+      (node (ref P8) (pin 5))
+      (node (ref P5) (pin 5)))
+    (net (code 13) (name "")
+      (node (ref P5) (pin 6))
+      (node (ref P1) (pin 25))
+      (node (ref P8) (pin 6)))
+    (net (code 14) (name "")
+      (node (ref P8) (pin 7))
      (node (ref P1) (pin 26))
      (node (ref P5) (pin 7)))
+    (net (code 15) (name "")
+      (node (ref P1) (pin 27))
+      (node (ref P8) (pin 8))
+      (node (ref P5) (pin 8)))
+    (net (code 16) (name "")
+      (node (ref P1) (pin 28))
+      (node (ref P5) (pin 9))
+      (node (ref P8) (pin 9)))
+    (net (code 17) (name "")
+      (node (ref P3) (pin 1))
+      (node (ref P7) (pin 1))
+      (node (ref P1) (pin 11)))
+    (net (code 18) (name "")
+      (node (ref P1) (pin 12))
+      (node (ref P3) (pin 2))
+      (node (ref P7) (pin 2)))
+    (net (code 19) (name "")
+      (node (ref P1) (pin 13))
+      (node (ref P3) (pin 3))
+      (node (ref P7) (pin 3)))
+    (net (code 20) (name "")
+      (node (ref P7) (pin 4))
+      (node (ref P1) (pin 14))
+      (node (ref P3) (pin 4)))
+    (net (code 21) (name "")
+      (node (ref P7) (pin 5))
+      (node (ref P3) (pin 5))
+      (node (ref P1) (pin 15)))
+    (net (code 22) (name "")
+      (node (ref P1) (pin 16))
+      (node (ref P3) (pin 6))
+      (node (ref P7) (pin 6)))
+    (net (code 23) (name "")
+      (node (ref P5) (pin 4))
+      (node (ref P8) (pin 4))
+      (node (ref P1) (pin 23)))
    (net (code 24) (name "")
-      (node (ref P1) (pin 25))
-      (node (ref P5) (pin 6)))
+      (node (ref P7) (pin 8))
+      (node (ref P1) (pin 18))
+      (node (ref P3) (pin 8)))
    (net (code 25) (name "")
-      (node (ref P5) (pin 5))
-      (node (ref P1) (pin 24)))
+      (node (ref P3) (pin 9))
+      (node (ref P1) (pin 19))
+      (node (ref P7) (pin 9)))
    (net (code 26) (name "")
-      (node (ref P1) (pin 23))
-      (node (ref P5) (pin 4)))
-    (net (code 27) (name "")
-      (node (ref P5) (pin 3))
-      (node (ref P1) (pin 22)))
-    (net (code 28) (name "")
-      (node (ref P1) (pin 21))
-      (node (ref P5) (pin 2)))
-    (net (code 29) (name "")
      (node (ref P4) (pin 3))
-      (node (ref P1) (pin 31)))
+      (node (ref P1) (pin 31))
+      (node (ref P9) (pin 3)))
+    (net (code 27) (name "")
+      (node (ref P9) (pin 1))
+      (node (ref P4) (pin 1))
+      (node (ref P1) (pin 29)))
+    (net (code 28) (name "")
+      (node (ref P9) (pin 2))
+      (node (ref P1) (pin 30))
+      (node (ref P4) (pin 2)))
+    (net (code 29) (name "")
+      (node (ref P1) (pin 32))
+      (node (ref P9) (pin 4))
+      (node (ref P4) (pin 4)))
    (net (code 30) (name "")
-      (node (ref P1) (pin 34))
-      (node (ref P4) (pin 6)))
-    (net (code 31) (name "")
      (node (ref P1) (pin 33))
+      (node (ref P9) (pin 5))
      (node (ref P4) (pin 5)))
+    (net (code 31) (name "")
+      (node (ref P4) (pin 6))
+      (node (ref P9) (pin 6))
+      (node (ref P1) (pin 34)))
    (net (code 32) (name "")
-      (node (ref P4) (pin 4))
-      (node (ref P1) (pin 32)))
+      (node (ref P9) (pin 7))
+      (node (ref P4) (pin 7))
+      (node (ref P1) (pin 35)))
    (net (code 33) (name "")
-      (node (ref P4) (pin 10))
-      (node (ref P1) (pin 38)))
+      (node (ref P4) (pin 8))
+      (node (ref P9) (pin 8))
+      (node (ref P1) (pin 36)))
    (net (code 34) (name "")
-      (node (ref P4) (pin 2))
-      (node (ref P1) (pin 30)))
-    (net (code 35) (name "")
-      (node (ref P1) (pin 29))
-      (node (ref P4) (pin 1)))
-    (net (code 36) (name "")
      (node (ref P4) (pin 9))
+      (node (ref P9) (pin 9))
      (node (ref P1) (pin 37)))
+    (net (code 35) (name "")
+      (node (ref P4) (pin 10))
+      (node (ref P9) (pin 10))
+      (node (ref P1) (pin 38)))
+    (net (code 36) (name "")
+      (node (ref P5) (pin 1))
+      (node (ref P1) (pin 20))
+      (node (ref P8) (pin 1)))
    (net (code 37) (name "")
-      (node (ref P1) (pin 36))
-      (node (ref P4) (pin 8)))
+      (node (ref P5) (pin 2))
+      (node (ref P8) (pin 2))
+      (node (ref P1) (pin 21)))
    (net (code 38) (name "")
-      (node (ref P1) (pin 35))
-      (node (ref P4) (pin 7)))))
+      (node (ref P8) (pin 3))
+      (node (ref P1) (pin 22))
+      (node (ref P5) (pin 3)))))
--- a/hardware/NGC_38_connector/NGC_38_connector.pro
+++ b/hardware/NGC_38_connector/NGC_38_connector.pro
@ -1,29 +1,29 @@
-update=10/21/2014 6:21:30 AM
+update=1/18/2016 5:11:47 AM
 version=1
-last_client=pcbnew
+last_client=kicad
 [general]
 version=1
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -42,46 +42,32 @@ LibName27=opto
 LibName28=atmel
 LibName29=contrib
 LibName30=valves
-[cvpcb]
+[schematic_editor]
 version=1
-NetIExt=net
-[cvpcb/libraries]
-EquName1=devcms
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
 [pcbnew]
 version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
 LastNetListRead=NGC_38_connector.net
-UseCmpFile=0
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=NGC_38pin
+PadDrill=1.5
+PadDrillOvalY=1.5
+PadSizeH=1.7
+PadSizeV=2.7
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/NGC_38_connector/NGC_38_connector.sch
+++ b/hardware/NGC_38_connector/NGC_38_connector.sch
@ -29,14 +29,13 @@ LIBS:opto
 LIBS:atmel
 LIBS:contrib
 LIBS:valves
-LIBS:NGC_38_connector-cache
 EELAYER 27 0
 EELAYER END
 $Descr A 11000 8500
 encoding utf-8
 Sheet 1 1
 Title "NGC 38 pin connector. "
-Date "30 may 2015"
+Date "21 oct 2014"
 Rev "R0.1"
 Comp "RusEFI"
 Comment1 ""
@ -66,6 +65,26 @@ F 3 "" H 7550 5700 60  0000 C CNN
 	1    7550 5700
 	-1   0    0    -1  
 $EndComp
+Wire Wire Line
+	7350 5250 8050 5250
+Wire Wire Line
+	7350 5350 8050 5350
+Wire Wire Line
+	7350 5450 8050 5450
+Wire Wire Line
+	7350 5550 8050 5550
+Wire Wire Line
+	7350 5650 8050 5650
+Wire Wire Line
+	7350 5750 8050 5750
+Wire Wire Line
+	7350 5850 8050 5850
+Wire Wire Line
+	7350 5950 8050 5950
+Wire Wire Line
+	7350 6050 8050 6050
+Wire Wire Line
+	7350 6150 8050 6150
 $Comp
 L CONN_10 P4
 U 1 1 543ECFCF
@ -100,79 +119,141 @@ F 3 "" H 7550 6650 60  0000 C CNN
 	-1   0    0    -1  
 $EndComp
 Wire Wire Line
-	7900 5250 8050 5250
+	8750 5250 9750 5250
 Wire Wire Line
-	7900 5350 8050 5350
+	8750 5350 9750 5350
 Wire Wire Line
-	7900 5450 8050 5450
+	8750 5450 9750 5450
 Wire Wire Line
-	7900 5550 8050 5550
+	8750 5850 9750 5850
 Wire Wire Line
-	7900 5650 8050 5650
+	8750 6750 9750 6750
 Wire Wire Line
-	7900 5750 8050 5750
+	8750 6850 9750 6850
 Wire Wire Line
-	7900 5850 8050 5850
+	8750 6950 9750 6950
 Wire Wire Line
-	7900 5950 8050 5950
+	8750 7050 9750 7050
 Wire Wire Line
-	7900 6050 8050 6050
+	7350 7050 8050 7050
 Wire Wire Line
-	7900 6150 8050 6150
+	7350 6950 8050 6950
 Wire Wire Line
-	8750 5250 9050 5250
+	7350 6850 8050 6850
 Wire Wire Line
-	8750 5350 9050 5350
+	8750 5950 9750 5950
 Wire Wire Line
-	8750 5450 9050 5450
+	8750 5750 9750 5750
 Wire Wire Line
-	8750 6750 9050 6750
+	8750 5650 9750 5650
 Wire Wire Line
-	8750 6850 9050 6850
+	8750 5550 9750 5550
 Wire Wire Line
-	8750 6950 9050 6950
+	8750 6050 9750 6050
 Wire Wire Line
-	8750 7050 9050 7050
+	8750 6150 9750 6150
 Wire Wire Line
-	7900 7050 8050 7050
+	8750 6250 9750 6250
 Wire Wire Line
-	7900 6950 8050 6950
+	8750 6350 9750 6350
 Wire Wire Line
-	7900 6850 8050 6850
+	8750 6450 9750 6450
 Wire Wire Line
-	8750 5750 9050 5750
+	8750 6550 9750 6550
 Wire Wire Line
-	8750 5550 9050 5550
+	8750 6650 9750 6650
 Wire Wire Line
-	8750 6150 9050 6150
+	7350 6250 8050 6250
 Wire Wire Line
-	8750 6250 9050 6250
+	7350 6350 8050 6350
 Wire Wire Line
-	8750 6350 9050 6350
+	7350 6450 8050 6450
 Wire Wire Line
-	8750 6450 9050 6450
+	7350 6550 8050 6550
 Wire Wire Line
-	8750 6550 9050 6550
+	7350 6650 8050 6650
 Wire Wire Line
-	8750 6650 9050 6650
-Wire Wire Line
-	7900 6250 8050 6250
-Wire Wire Line
-	7900 6350 8050 6350
-Wire Wire Line
-	7900 6450 8050 6450
-Wire Wire Line
-	7900 6550 8050 6550
-Wire Wire Line
-	7900 6650 8050 6650
-Wire Wire Line
-	7900 6750 8050 6750
-Wire Wire Line
-	8750 5650 9050 5650
-Wire Wire Line
-	9050 5850 8750 5850
-Wire Wire Line
-	8750 5950 9050 5950
-Wire Wire Line
-	9050 6050 8750 6050
+	7350 6750 8050 6750
+$Comp
+L CONN_9 P8
+U 1 1 54463158
+P 10100 5650
+F 0 "P8" V 10050 5650 60  0000 C CNN
+F 1 "CONN_9" V 10150 5650 60  0000 C CNN
+F 2 "SIL-9" H 10100 5650 60  0001 C CNN
+F 3 "" H 10100 5650 60  0000 C CNN
+	1    10100 5650
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_10 P9
+U 1 1 5446315E
+P 10100 6600
+F 0 "P9" V 10050 6600 60  0000 C CNN
+F 1 "CONN_10" V 10150 6600 60  0000 C CNN
+F 2 "SIL-10" H 10100 6600 60  0001 C CNN
+F 3 "" H 10100 6600 60  0000 C CNN
+	1    10100 6600
+	1    0    0    -1  
+$EndComp
+$Comp
+L CONN_9 P7
+U 1 1 54463164
+P 7000 6650
+F 0 "P7" V 6950 6650 60  0000 C CNN
+F 1 "CONN_9" V 7050 6650 60  0000 C CNN
+F 2 "SIL-9" H 7000 6650 60  0001 C CNN
+F 3 "" H 7000 6650 60  0000 C CNN
+	1    7000 6650
+	-1   0    0    -1  
+$EndComp
+$Comp
+L CONN_10 P6
+U 1 1 5446316A
+P 7000 5700
+F 0 "P6" V 6950 5700 60  0000 C CNN
+F 1 "CONN_10" V 7050 5700 60  0000 C CNN
+F 2 "SIL-10" H 7000 5700 60  0001 C CNN
+F 3 "" H 7000 5700 60  0000 C CNN
+	1    7000 5700
+	-1   0    0    -1  
+$EndComp
+Connection ~ 7900 5250
+Connection ~ 7900 5350
+Connection ~ 7900 5450
+Connection ~ 9050 5250
+Connection ~ 9050 5350
+Connection ~ 9050 5450
+Connection ~ 9050 5550
+Connection ~ 9050 5650
+Connection ~ 9050 5750
+Connection ~ 9050 5850
+Connection ~ 9050 5950
+Connection ~ 9050 6050
+Connection ~ 9050 6150
+Connection ~ 9050 6250
+Connection ~ 9050 6350
+Connection ~ 9050 6450
+Connection ~ 9050 6550
+Connection ~ 9050 6650
+Connection ~ 9050 6750
+Connection ~ 9050 6850
+Connection ~ 9050 6950
+Connection ~ 9050 7050
+Connection ~ 7900 7050
+Connection ~ 7900 6950
+Connection ~ 7900 6850
+Connection ~ 7900 6750
+Connection ~ 7900 6650
+Connection ~ 7900 6550
+Connection ~ 7900 6450
+Connection ~ 7900 6350
+Connection ~ 7900 6250
+Connection ~ 7900 6150
+Connection ~ 7900 6050
+Connection ~ 7900 5950
+Connection ~ 7900 5850
+Connection ~ 7900 5750
+Connection ~ 7900 5650
+Connection ~ 7900 5550
 $EndSCHEMATC
--- a/hardware/PowerSSO-24_breakout/PowerSSO-24_breakout.pro
+++ b/hardware/PowerSSO-24_breakout/PowerSSO-24_breakout.pro
@ -1,71 +1,36 @@
-update=1/3/2015 8:02:45 PM
-last_client=eeschema
+update=1/18/2016 6:03:43 AM
+last_client=kicad
 [cvpcb]
 version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[pcbnew]
+[schematic_editor]
 version=1
-LastNetListRead=PowerSSO-24_breakout.net
-UseCmpFile=0
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=SM0805-Jumper
-LibName18=d2pak_TO263AB
-LibName19=PowerSSO-24
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=PcbnewAdvanced
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -85,3 +50,22 @@ LibName28=atmel
 LibName29=contrib
 LibName30=valves
 LibName31=vnd5e025aktr
+[pcbnew]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+LastNetListRead=PowerSSO-24_breakout.net
+PadDrill=1.016
+PadDrillOvalY=1.016
+PadSizeH=1.524
+PadSizeV=1.524
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/PowerSSO-24_breakout/known_issues.txt
+++ b/hardware/PowerSSO-24_breakout/known_issues.txt
@ -1,3 +1 @@
-1) add pin1 marker to footprint
-2) Larger diameter holes for GND, VCC and out wire holes. Larger diameter holes for input wires also, just in case
-3) larger diameter heatsink vias to simplify soldering
+1) add pin1 marker to footprint
--- a/hardware/brain_board_176-pin/176-pin_board.kicad_pcb
+++ b/hardware/brain_board_176-pin/176-pin_board.kicad_pcb
--- a/hardware/brain_board_176-pin/176-pin_board.pro
+++ b/hardware/brain_board_176-pin/176-pin_board.pro
@ -1,6 +1,6 @@
-update=6/14/2015 7:45:10 AM
+update=1/18/2016 5:02:36 AM
 version=1
-last_client=eeschema
+last_client=kicad
 [general]
 version=1
 [cvpcb]
@ -8,56 +8,15 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[pcbnew]
-version=1
-LastNetListRead=176-pin_STM32F407IGT6_board.net
-UseCmpFile=0
-PadDrill=0.000000000000
-PadDrillOvalY=0.000000000000
-PadSizeH=1.300000000000
-PadSizeV=1.900000000000
-PcbTextSizeV=1.000000000000
-PcbTextSizeH=1.000000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.150000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_transistors
-LibName10=libcms
-LibName11=logo_flipped
-LibName12=art-electro-conn
-LibName13=art-electro-conn_2
-LibName14=art-electro-power
-LibName15=LQFP-176
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=PcbnewAdvanced
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=conn
-LibName4=linear
-LibName5=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=conn
+LibName5=linear
 LibName6=stm32
 LibName7=logo_flipped
 LibName8=art-electro-conn
@ -67,3 +26,32 @@ LibName11=STM32F407IGT6
 LibName12=art-electro-power
 LibName13=art-electro-max
 LibName14=crystal(mc306)
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
+[pcbnew]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+LastNetListRead=176-pin_STM32F407IGT6_board.net
+PadDrill=0
+PadDrillOvalY=0
+PadSizeH=1.3
+PadSizeV=1.9
+PcbTextSizeV=1
+PcbTextSizeH=1
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.15
+ModuleOutlineThickness=0.15
--- a/hardware/brain_board_176-pin/176-pin_board.sch
+++ b/hardware/brain_board_176-pin/176-pin_board.sch
@ -1,9 +1,9 @@
 EESchema Schematic File Version 2
+LIBS:KICAD_Older_Version
 LIBS:power
 LIBS:device
 LIBS:conn
 LIBS:linear
-LIBS:special
 LIBS:stm32
 LIBS:logo_flipped
 LIBS:art-electro-conn
@ -14,7 +14,7 @@ LIBS:art-electro-power
 LIBS:art-electro-max
 LIBS:crystal(mc306)
 LIBS:176-pin_board-cache
-EELAYER 27 0
+EELAYER 25 0
 EELAYER END
 $Descr A3 16535 11693
 encoding utf-8
--- a/hardware/hi-lo_driver/hi-lo.pro
+++ b/hardware/hi-lo_driver/hi-lo.pro
@ -1,6 +1,6 @@
-update=3/9/2014 4:28:40 PM
+update=1/18/2016 5:07:55 AM
 version=1
-last_client=eeschema
+last_client=kicad
 [general]
 version=1
 [cvpcb]
@ -8,68 +8,22 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
-[pcbnew]
-version=1
-LastNetListRead=hi-lo.net
-UseCmpFile=0
-PadDrill=0.000000000000
-PadDrillOvalY=0.000000000000
-PadSizeH=0.635000000000
-PadSizeV=2.540000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.100000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=logo
-LibName18=logo_flipped
-LibName19=art-electro-conn
-LibName20=SOIC8-DFN
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=PcbnewAdvanced
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -91,3 +45,32 @@ LibName30=valves
 LibName31=logo
 LibName32=logo_flipped
 LibName33=tc4427
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
+[pcbnew]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+LastNetListRead=hi-lo.net
+PadDrill=0
+PadDrillOvalY=0
+PadSizeH=4.444999999999999
+PadSizeV=2.54
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.09999999999999999
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/low_side_tle6240/gerber_tle6240/gerber_tle6240.zip
+++ b/hardware/low_side_tle6240/gerber_tle6240/gerber_tle6240.zip
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Cu.gbl
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Cu.gbl
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:15 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Mask.gbs
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Mask.gbs
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:16 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Paste.gbp
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_Paste.gbp
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:15 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_SilkS.gbo
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-B_SilkS.gbo
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:16 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-Edge_Cuts.gbr
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-Edge_Cuts.gbr
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:17 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Cu.gtl
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Cu.gtl
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:15 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Mask.gts
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Mask.gts
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:16 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Paste.gtp
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_Paste.gtp
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:16 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_SilkS.gto
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver-F_SilkS.gto
@ -1,4 +1,4 @@
-G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 20/09/2014 07:20:55*
+G04 (created by PCBNEW (2013-07-07 BZR 4022)-stable) date 9/20/2014 6:20:16 AM*
 %MOIN*%
 G04 Gerber Fmt 3.4, Leading zero omitted, Abs format*
 %FSLAX34Y34*%
--- a/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver.drl
+++ b/hardware/low_side_tle6240/gerber_tle6240/tle6240_driver.drl
@ -1,5 +1,5 @@
 M48
-;DRILL file {Pcbnew (2013-07-07 BZR 4022)-stable} date 20/09/2014 07:20:58
+;DRILL file {Pcbnew (2013-07-07 BZR 4022)-stable} date 9/20/2014 6:08:02 AM
 ;FORMAT={-:-/ absolute / inch / decimal}
 FMAT,2
 INCH,TZ
--- a/hardware/low_side_tle6240/tle6240_driver.pro
+++ b/hardware/low_side_tle6240/tle6240_driver.pro
@ -1,6 +1,6 @@
-update=9/20/2014 5:58:19 AM
+update=1/18/2016 5:10:07 AM
 version=1
-last_client=pcbnew
+last_client=kicad
 [general]
 version=1
 [cvpcb]
@ -8,27 +8,32 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=PcbnewAdvanced
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -51,40 +56,20 @@ LibName31=tle6240
 LibName32=conn_16
 [pcbnew]
 version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
 LastNetListRead=tle6240_driver.net
-UseCmpFile=1
-PadDrill=1.016000000000
-PadDrillOvalY=1.016000000000
-PadSizeH=1.524000000000
-PadSizeV=1.524000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.100000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=smd_capacitors
-LibName7=smd_resistors
-LibName8=smd_crystal&oscillator
-LibName9=smd_dil
-LibName10=smd_transistors
-LibName11=libcms
-LibName12=display
-LibName13=led
-LibName14=dip_sockets
-LibName15=pga_sockets
-LibName16=valves
-LibName17=PIN_ARRAY_10X2
-LibName18=tle6240gp
+PadDrill=1.016
+PadDrillOvalY=1.016
+PadSizeH=1.524
+PadSizeV=1.524
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.09999999999999999
+BoardOutlineThickness=0.09999999999999999
+ModuleOutlineThickness=0.15
--- a/hardware/rusefi_lib/KICAD_Older_Version.lib
+++ b/hardware/rusefi_lib/KICAD_Older_Version.lib
@ -1467,4 +1467,78 @@ X K 2 100 0 60 L 40 40 1 1 P
 ENDDRAW
 ENDDEF
 #
+# MCP42010
+#
+DEF MCP42010 U 0 40 Y Y 1 F N
+F0 "U" -300 400 60 H V C CNN
+F1 "MCP42010" 0 0 60 V V C CNN
+F2 "~" 0 0 60 H V C CNN
+F3 "~" 0 0 60 H V C CNN
+DRAW
+S -350 -350 350 350 0 1 0 N
+X /CS 1 -650 300 300 R 50 50 1 1 I I
+X SCK 2 -650 200 300 R 50 50 1 1 I
+X SI 3 -650 100 300 R 50 50 1 1 I
+X Vss 4 -650 0 300 R 50 50 1 1 P
+X PB1 5 -650 -100 300 R 50 50 1 1 P
+X PW1 6 -650 -200 300 R 50 50 1 1 P
+X PA1 7 -650 -300 300 R 50 50 1 1 P
+X PA0 8 650 -300 300 L 50 50 1 1 P
+X PW0 9 650 -200 300 L 50 50 1 1 P
+X PB0 10 650 -100 300 L 50 50 1 1 P
+X /RS 11 650 0 300 L 50 50 1 1 I
+X /SHDN 12 650 100 300 L 50 50 1 1 I I
+X SO 13 650 200 300 L 50 50 1 1 O I
+X Vdd 14 650 300 300 L 50 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# MAX232
+#
+DEF MAX232 U 0 40 Y Y 1 F N
+F0 "U" 0 850 70 H V C CNN
+F1 "MAX232" 0 -850 70 H V C CNN
+F2 "~" 0 0 60 H V C CNN
+F3 "~" 0 0 60 H V C CNN
+ALIAS MAX202
+DRAW
+T 900 80 -530 40 0 0 0 RS232  Normal 0 C C
+T 900 -100 -530 40 0 0 0 TTL  Normal 0 C C
+S -500 -800 500 800 0 1 0 N
+P 3 0 1 0  -500 -300  500 -300  500 -300 N
+P 3 0 1 0  0 -300  0 -800  0 -800 N
+X C1+ 1 -800 700 300 R 60 50 1 1 I
+X V+ 2 800 300 300 L 60 50 1 1 w
+X C1- 3 -800 300 300 R 60 50 1 1 I
+X C2+ 4 -800 200 300 R 60 50 1 1 I
+X C2- 5 -800 -200 300 R 60 50 1 1 I
+X V- 6 800 -200 300 L 60 50 1 1 w
+X T2OUT 7 800 -500 300 L 60 50 1 1 O
+X R2IN 8 800 -700 300 L 60 50 1 1 I
+X R2OUT 9 -800 -700 300 R 60 50 1 1 O
+X T2IN 10 -800 -500 300 R 60 50 1 1 I
+X T1IN 11 -800 -400 300 R 60 50 1 1 I
+X R1OUT 12 -800 -600 300 R 60 50 1 1 O
+X R1IN 13 800 -600 300 L 60 50 1 1 I
+X T1OUT 14 800 -400 300 L 60 50 1 1 O
+X GND 15 800 100 300 L 60 50 1 1 W
+X VCC 16 800 700 300 L 60 50 1 1 W
+ENDDRAW
+ENDDEF
+#
+# Vref
+#
+DEF Vref D 0 0 Y N 1 F N
+F0 "D" 0 100 40 H V C CNN
+F1 "Vref" 0 -100 30 H V C CNN
+F2 "~" 0 0 60 H V C CNN
+F3 "~" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0  -40 40  40 0  -40 -40  -40 40 F
+P 4 0 1 8  60 40  40 20  40 -20  20 -40 N
+X K 1 100 0 60 L 40 40 1 1 P
+X A 2 -100 0 60 R 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
 #End Library
--- a/hardware/thermocouiple_module/known_issues.txt
+++ b/hardware/thermocouiple_module/known_issues.txt
@ -1,3 +1 @@
-1) resolved in R0.2 -- SPI silk screen is not correct.
-2) resolved in R0.2 5.04 screw-in terminal option
-3)                  multichannel?
+1) resolved in R0.2 -- SPI silk screen is not correct.
--- a/hardware/thermocouiple_module/thermocouple_module.kicad_pcb
+++ b/hardware/thermocouiple_module/thermocouple_module.kicad_pcb
@ -92,9 +92,9 @@
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
-      (drillshape 0)
+      (drillshape 1)
      (scaleselection 1)
-      (outputdirectory thermocouple_gerbers))
+      (outputdirectory gerbers/gerbers_Spin2/))
  )

  (net 0 "")
--- a/hardware/thermocouiple_module/thermocouple_module.pro
+++ b/hardware/thermocouiple_module/thermocouple_module.pro
@ -1,6 +1,6 @@
-update=1/24/2015 6:17:02 PM
+update=1/18/2016 5:35:06 AM
 version=1
-last_client=pcbnew
+last_client=kicad
 [general]
 version=1
 RootSch=
@ -10,27 +10,32 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
+[schematic_editor]
+version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=
+SpiceForceRefPrefix=0
+SpiceUseNetNumbers=0
+LabSize=60
 [eeschema]
 version=1
 LibDir=../rusefi_lib
-NetFmtName=
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
 [eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
+LibName1=KICAD_Older_Version
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
 LibName13=microcontrollers
 LibName14=dsp
 LibName15=microchip
@ -50,37 +55,28 @@ LibName28=atmel
 LibName29=contrib
 LibName30=valves
 LibName31=max31855
+LibName32=art-electro-conn_2
+LibName33=art-electro-conn
+LibName34=art-electro-ic
+LibName35=art-electro-max
+LibName36=art-electro-power
+LibName37=art-electro-stm32
 [pcbnew]
 version=1
+PageLayoutDescrFile=../rusefi_lib/Border.kicad_wks
 LastNetListRead=thermocouple_module.net
-UseCmpFile=0
-PadDrill=0.000000000000
-PadDrillOvalY=0.000000000000
-PadSizeH=0.635000000000
-PadSizeV=1.143000000000
-PcbTextSizeV=2.032000000000
-PcbTextSizeH=1.524000000000
-PcbTextThickness=0.304800000000
-ModuleTextSizeV=1.524000000000
-ModuleTextSizeH=1.524000000000
-ModuleTextSizeThickness=0.304800000000
-SolderMaskClearance=0.254000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.381000000000
-BoardOutlineThickness=0.381000000000
-ModuleOutlineThickness=0.254000000000
-[pcbnew/libraries]
-LibDir=../rusefi_lib
-LibName1=sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=libcms
-LibName7=display
-LibName8=valves
-LibName9=led
-LibName10=dip_sockets
-LibName11=TCPL_PCC-SMP
-LibName12=SM0805-SM0603
-LibName13=keystone_7693
+PadDrill=0
+PadDrillOvalY=0
+PadSizeH=0.635
+PadSizeV=1.143
+PcbTextSizeV=2.032
+PcbTextSizeH=1.524
+PcbTextThickness=0.3048
+ModuleTextSizeV=1.524
+ModuleTextSizeH=1.524
+ModuleTextSizeThickness=0.3048
+SolderMaskClearance=0.254
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.381
+BoardOutlineThickness=0.381
+ModuleOutlineThickness=0.254
--- a/hardware/thermocouiple_module/thermocouple_module.sch
+++ b/hardware/thermocouiple_module/thermocouple_module.sch
@ -1,4 +1,5 @@
 EESchema Schematic File Version 2
+LIBS:KICAD_Older_Version
 LIBS:power
 LIBS:device
 LIBS:transistors
@ -10,7 +11,6 @@ LIBS:cmos4000
 LIBS:adc-dac
 LIBS:memory
 LIBS:xilinx
-LIBS:special
 LIBS:microcontrollers
 LIBS:dsp
 LIBS:microchip
@ -30,8 +30,14 @@ LIBS:atmel
 LIBS:contrib
 LIBS:valves
 LIBS:max31855
+LIBS:art-electro-conn_2
+LIBS:art-electro-conn
+LIBS:art-electro-ic
+LIBS:art-electro-max
+LIBS:art-electro-power
+LIBS:art-electro-stm32
 LIBS:thermocouple_module-cache
-EELAYER 27 0
+EELAYER 25 0
 EELAYER END
 $Descr A 11000 8500
 encoding utf-8
@ -48,30 +54,30 @@ $EndDescr
 NoConn ~ 4075 4350
 NoConn ~ 3875 4350
 $Comp
-L VIA V802
+L CONN_1 V802
 U 1 1 4F629521
-P 3875 4350
-F 0 "V802" V 3900 4450 20  0000 C CNN
-F 1 "VIA" H 3875 4550 60  0001 C CNN
-F 2 "1pin" H 3875 4650 60  0001 C CNN
-F 3 "" H 3875 4350 60  0001 C CNN
-	1    3875 4350
-	0    1    1    0   
+P 3875 4200
+F 0 "V802" V 3900 4300 20  0000 C CNN
+F 1 "VIA" H 3875 4400 60  0001 C CNN
+F 2 "1pin" H 3875 4500 60  0001 C CNN
+F 3 "" H 3875 4200 60  0001 C CNN
+	1    3875 4200
+	0    -1   -1   0   
 $EndComp
 Text Notes 3900 4950 0    40   ~ 0
 We want a big mass of copper in the\nTCPL joints, to dampen the cold junction\ntemperature and to make it more measurable\nwith this IC
 Text Notes 3725 4450 0    40   ~ 0
 Via for cable tie
 $Comp
-L VIA V801
+L CONN_1 V801
 U 1 1 4F627FCA
-P 4075 4350
-F 0 "V801" V 4100 4450 20  0000 C CNN
-F 1 "VIA" H 4075 4550 60  0001 C CNN
-F 2 "1pin" H 4075 4350 60  0001 C CNN
-F 3 "" H 4075 4350 60  0001 C CNN
-	1    4075 4350
-	0    1    1    0   
+P 4075 4200
+F 0 "V801" V 4100 4300 20  0000 C CNN
+F 1 "VIA" H 4075 4400 60  0001 C CNN
+F 2 "1pin" H 4075 4200 60  0001 C CNN
+F 3 "" H 4075 4200 60  0001 C CNN
+	1    4075 4200
+	0    -1   -1   0   
 $EndComp
 Connection ~ 4800 4650
 Wire Wire Line