154 progress

This commit is contained in:
rusefillc 2020-12-16 21:55:42 -05:00
parent 9ab4c2af5b
commit 84b75f12bd
4 changed files with 3183 additions and 3035 deletions

File diff suppressed because it is too large Load Diff

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@ -1,4 +1,4 @@
update=12/12/2018 6:48:20 AM update=17/12/2020 02:53:36
version=1 version=1
last_client=kicad last_client=kicad
[cvpcb] [cvpcb]
@ -6,79 +6,267 @@ version=1
NetIExt=net NetIExt=net
[cvpcb/libraries] [cvpcb/libraries]
EquName1=devcms EquName1=devcms
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=1.000000000000
PadDrillOvalY=1.000000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[pcbnew/libraries]
LibDir=
LibName1=sockets
LibName2=connect
LibName3=discret
LibName4=pin_array
LibName5=divers
LibName6=smd_capacitors
LibName7=smd_resistors
LibName8=smd_crystal&oscillator
LibName9=smd_dil
LibName10=smd_transistors
LibName11=libcms
LibName12=display
LibName13=led
LibName14=dip_sockets
LibName15=pga_sockets
LibName16=valves
LibName17=modules/284617-1
LibName18=modules/kt819a_mod
[general] [general]
version=1 version=1
[eeschema] [eeschema]
version=1 version=1
LibDir= LibDir=
[eeschema/libraries] [pcbnew]
LibName1=power version=1
LibName2=device PageLayoutDescrFile=
LibName3=transistors LastNetListRead=
LibName4=conn CopperLayerCount=2
LibName5=linear BoardThickness=1.6
LibName6=regul AllowMicroVias=0
LibName7=74xx AllowBlindVias=0
LibName8=cmos4000 RequireCourtyardDefinitions=0
LibName9=adc-dac ProhibitOverlappingCourtyards=1
LibName10=memory MinTrackWidth=0.2
LibName11=xilinx MinViaDiameter=0.889
LibName12=special MinViaDrill=0.508
LibName13=microcontrollers MinMicroViaDiameter=0.508
LibName14=dsp MinMicroViaDrill=0.127
LibName15=microchip MinHoleToHole=0.25
LibName16=analog_switches TrackWidth1=0.3
LibName17=motorola TrackWidth2=0.8
LibName18=texas TrackWidth3=1
LibName19=intel ViaDiameter1=0.889
LibName20=audio ViaDrill1=0.635
LibName21=interface dPairWidth1=0.3
LibName22=digital-audio dPairGap1=0.4
LibName23=philips dPairViaGap1=0.25
LibName24=display SilkLineWidth=0.15
LibName25=cypress SilkTextSizeV=1
LibName26=siliconi SilkTextSizeH=1
LibName27=opto SilkTextSizeThickness=0.15
LibName28=atmel SilkTextItalic=0
LibName29=contrib SilkTextUpright=1
LibName30=valves CopperLineWidth=0.2
LibName31=symbols/284617-1 CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.09999999999999999
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=0
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=-0
[pcbnew/Layer.F.Cu]
Name=F.Cu
Type=0
Enabled=1
[pcbnew/Layer.In1.Cu]
Name=In1.Cu
Type=0
Enabled=0
[pcbnew/Layer.In2.Cu]
Name=In2.Cu
Type=0
Enabled=0
[pcbnew/Layer.In3.Cu]
Name=In3.Cu
Type=0
Enabled=0
[pcbnew/Layer.In4.Cu]
Name=In4.Cu
Type=0
Enabled=0
[pcbnew/Layer.In5.Cu]
Name=In5.Cu
Type=0
Enabled=0
[pcbnew/Layer.In6.Cu]
Name=In6.Cu
Type=0
Enabled=0
[pcbnew/Layer.In7.Cu]
Name=In7.Cu
Type=0
Enabled=0
[pcbnew/Layer.In8.Cu]
Name=In8.Cu
Type=0
Enabled=0
[pcbnew/Layer.In9.Cu]
Name=In9.Cu
Type=0
Enabled=0
[pcbnew/Layer.In10.Cu]
Name=In10.Cu
Type=0
Enabled=0
[pcbnew/Layer.In11.Cu]
Name=In11.Cu
Type=0
Enabled=0
[pcbnew/Layer.In12.Cu]
Name=In12.Cu
Type=0
Enabled=0
[pcbnew/Layer.In13.Cu]
Name=In13.Cu
Type=0
Enabled=0
[pcbnew/Layer.In14.Cu]
Name=In14.Cu
Type=0
Enabled=0
[pcbnew/Layer.In15.Cu]
Name=In15.Cu
Type=0
Enabled=0
[pcbnew/Layer.In16.Cu]
Name=In16.Cu
Type=0
Enabled=0
[pcbnew/Layer.In17.Cu]
Name=In17.Cu
Type=0
Enabled=0
[pcbnew/Layer.In18.Cu]
Name=In18.Cu
Type=0
Enabled=0
[pcbnew/Layer.In19.Cu]
Name=In19.Cu
Type=0
Enabled=0
[pcbnew/Layer.In20.Cu]
Name=In20.Cu
Type=0
Enabled=0
[pcbnew/Layer.In21.Cu]
Name=In21.Cu
Type=0
Enabled=0
[pcbnew/Layer.In22.Cu]
Name=In22.Cu
Type=0
Enabled=0
[pcbnew/Layer.In23.Cu]
Name=In23.Cu
Type=0
Enabled=0
[pcbnew/Layer.In24.Cu]
Name=In24.Cu
Type=0
Enabled=0
[pcbnew/Layer.In25.Cu]
Name=In25.Cu
Type=0
Enabled=0
[pcbnew/Layer.In26.Cu]
Name=In26.Cu
Type=0
Enabled=0
[pcbnew/Layer.In27.Cu]
Name=In27.Cu
Type=0
Enabled=0
[pcbnew/Layer.In28.Cu]
Name=In28.Cu
Type=0
Enabled=0
[pcbnew/Layer.In29.Cu]
Name=In29.Cu
Type=0
Enabled=0
[pcbnew/Layer.In30.Cu]
Name=In30.Cu
Type=0
Enabled=0
[pcbnew/Layer.B.Cu]
Name=B.Cu
Type=0
Enabled=1
[pcbnew/Layer.B.Adhes]
Enabled=1
[pcbnew/Layer.F.Adhes]
Enabled=1
[pcbnew/Layer.B.Paste]
Enabled=1
[pcbnew/Layer.F.Paste]
Enabled=1
[pcbnew/Layer.B.SilkS]
Enabled=1
[pcbnew/Layer.F.SilkS]
Enabled=1
[pcbnew/Layer.B.Mask]
Enabled=1
[pcbnew/Layer.F.Mask]
Enabled=1
[pcbnew/Layer.Dwgs.User]
Enabled=1
[pcbnew/Layer.Cmts.User]
Enabled=1
[pcbnew/Layer.Eco1.User]
Enabled=1
[pcbnew/Layer.Eco2.User]
Enabled=1
[pcbnew/Layer.Edge.Cuts]
Enabled=1
[pcbnew/Layer.Margin]
Enabled=1
[pcbnew/Layer.B.CrtYd]
Enabled=1
[pcbnew/Layer.F.CrtYd]
Enabled=1
[pcbnew/Layer.B.Fab]
Enabled=0
[pcbnew/Layer.F.Fab]
Enabled=0
[pcbnew/Layer.Rescue]
Enabled=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.254
TrackWidth=0.3
ViaDiameter=0.889
ViaDrill=0.635
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.3
dPairGap=0.4
dPairViaGap=0.25
[pcbnew/Netclasses/1]
Name=1.5A
Clearance=0.254
TrackWidth=0.49
ViaDiameter=0.889
ViaDrill=0.635
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=1A
Clearance=0.254
TrackWidth=0.3
ViaDiameter=0.889
ViaDrill=0.635
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=4A
Clearance=0.254
TrackWidth=2
ViaDiameter=0.889
ViaDrill=0.635
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25

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@ -1,4 +1,2 @@
1) Corners are hitting the plastic 1) Corners are hitting the plastic
2) P18 P19 etc silkscreen is hitting useful silkscreen 2) P18 P19 etc silkscreen is hitting useful silkscreen
3) need much more trace width for pins 1,2,3 16,17,18 31,32,33 46,47,48 maybe both sides of PCB?
4) change silkscreen of larger connector 1-94 like on to https://raw.githubusercontent.com/wiki/rusefi/rusefi/oem_docs/Bosch/connector_154.png