From ca4caf1df8131dcb41581e8e48d96be714accb47 Mon Sep 17 00:00:00 2001 From: Andrey G Date: Mon, 5 Jul 2021 16:53:45 +0300 Subject: [PATCH] Chibios-Contrib for stm32 (#2903) * Add Chibios-Contrib for STM32F/H too * ports: stm32: add community hal and cmu configs for STM32 * ports: stm32: community: disable CRC driver --- firmware/Makefile | 2 +- .../ports/stm32/cfg/halconf_community.h | 157 ++++++++++++++++++ .../ports/stm32/cfg/mcuconf_community.h | 157 ++++++++++++++++++ .../ports/stm32/stm32f4/cfg/halconf.h | 3 + .../ports/stm32/stm32f4/cfg/mcuconf.h | 3 + .../ports/stm32/stm32f7/cfg/halconf.h | 3 + .../ports/stm32/stm32f7/cfg/mcuconf.h | 3 + .../ports/stm32/stm32h7/cfg/halconf.h | 3 + .../ports/stm32/stm32h7/cfg/mcuconf.h | 3 + firmware/rusefi.mk | 21 +-- 10 files changed, 344 insertions(+), 11 deletions(-) create mode 100644 firmware/hw_layer/ports/stm32/cfg/halconf_community.h create mode 100644 firmware/hw_layer/ports/stm32/cfg/mcuconf_community.h diff --git a/firmware/Makefile b/firmware/Makefile index bc2c8844fc..926ce59abf 100644 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -151,7 +151,7 @@ include $(CHIBIOS)/os/license/license.mk include $(CPU_STARTUP_DIR) # HAL-OSAL files (optional). include $(CHIBIOS_CONTRIB)/os/hal/hal.mk -include $(CPU_PLATFORM_DIR) +include $(CPU_PLATFORM) include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk # RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk diff --git a/firmware/hw_layer/ports/stm32/cfg/halconf_community.h b/firmware/hw_layer/ports/stm32/cfg/halconf_community.h new file mode 100644 index 0000000000..3180c6dcbf --- /dev/null +++ b/firmware/hw_layer/ports/stm32/cfg/halconf_community.h @@ -0,0 +1,157 @@ +/* + ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef _HALCONF_COMMUNITY_H_ +#define _HALCONF_COMMUNITY_H_ + +/** + * @brief Enables the community overlay. + */ +#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__) +#define HAL_USE_COMMUNITY TRUE +#endif + +/** + * @brief Enables the FSMC subsystem. + */ +#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) +#define HAL_USE_FSMC FALSE +#endif + +/** + * @brief Enables the NAND subsystem. + */ +#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) +#define HAL_USE_NAND FALSE +#endif + +/** + * @brief Enables the 1-wire subsystem. + */ +#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__) +#define HAL_USE_ONEWIRE FALSE +#endif + +/** + * @brief Enables the EICU subsystem. + */ +#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__) +#define HAL_USE_EICU FALSE +#endif + +/** + * @brief Enables the CRC subsystem. + */ +#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__) +#define HAL_USE_CRC FALSE +#endif + +/** + * @brief Enables the USBH subsystem. + */ +#if !defined(HAL_USE_USBH) || defined(__DOXYGEN__) +#define HAL_USE_USBH FALSE +#endif + +/** + * @brief Enables the EEPROM subsystem. + */ +#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__) +#define HAL_USE_EEPROM FALSE +#endif + +/** + * @brief Enables the TIMCAP subsystem. + */ +#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__) +#define HAL_USE_TIMCAP FALSE +#endif + +/** + * @brief Enables the RNG subsystem. + */ +#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__) +#define HAL_USE_RNG FALSE +#endif + +/** + * @brief Enables the USB_MSD subsystem. + */ +#if !defined(HAL_USE_USB_MSD) || defined(__DOXYGEN__) +#define HAL_USE_USB_MSD TRUE +#endif + +/*===========================================================================*/ +/* FSMCNAND driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define NAND_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* 1-wire driver related settings. */ +/*===========================================================================*/ +/** + * @brief Enables strong pull up feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_STRONG_PULLUP FALSE + +/** + * @brief Enables search ROM feature. + * @note Disabling this option saves both code and data space. + */ +#define ONEWIRE_USE_SEARCH_ROM FALSE + + +/*===========================================================================*/ +/* EEProm driver related settings. */ +/*===========================================================================*/ + +#define EEPROM_USE_EE24XX FALSE +#define EEPROM_USE_EE25XX TRUE + + + +/*===========================================================================*/ +/* CRC driver settings. */ +/*===========================================================================*/ + +/** + * @brief Enables DMA engine when performing CRC transactions. + * @note Enabling this option also enables asynchronous API. + */ +#if !defined(CRC_USE_DMA) || defined(__DOXYGEN__) +#define CRC_USE_DMA FALSE +#endif + +/** + * @brief Enables the @p crcAcquireUnit() and @p crcReleaseUnit() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(CRC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define CRC_USE_MUTUAL_EXCLUSION TRUE +#endif + + +#endif /* _HALCONF_COMMUNITY_H_ */ + +/** @} */ diff --git a/firmware/hw_layer/ports/stm32/cfg/mcuconf_community.h b/firmware/hw_layer/ports/stm32/cfg/mcuconf_community.h new file mode 100644 index 0000000000..da06c8f9f0 --- /dev/null +++ b/firmware/hw_layer/ports/stm32/cfg/mcuconf_community.h @@ -0,0 +1,157 @@ +/* + ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * FSMC driver system settings. + */ +#define STM32_FSMC_USE_FSMC1 FALSE +#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 + +/* + * FSMC NAND driver system settings. + */ +#define STM32_NAND_USE_NAND1 FALSE +#define STM32_NAND_USE_NAND2 FALSE +#define STM32_NAND_USE_EXT_INT FALSE +#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_NAND_DMA_PRIORITY 0 +#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") + +/* + * FSMC SRAM driver system settings. + */ +#define STM32_USE_FSMC_SRAM FALSE +#define STM32_SRAM_USE_FSMC_SRAM1 FALSE +#define STM32_SRAM_USE_FSMC_SRAM2 FALSE +#define STM32_SRAM_USE_FSMC_SRAM3 FALSE +#define STM32_SRAM_USE_FSMC_SRAM4 FALSE + +/* + * FSMC SDRAM driver system settings. + */ +#define STM32_USE_FSMC_SDRAM FALSE +#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE +#define STM32_SDRAM_USE_FSMC_SDRAM2 FASLE + +/* + * TIMCAP driver system settings. + */ +#define STM32_TIMCAP_USE_TIM1 FASLE +#define STM32_TIMCAP_USE_TIM2 FALSE +#define STM32_TIMCAP_USE_TIM3 FASLE +#define STM32_TIMCAP_USE_TIM4 FASLE +#define STM32_TIMCAP_USE_TIM5 FASLE +#define STM32_TIMCAP_USE_TIM8 FASLE +#define STM32_TIMCAP_USE_TIM9 FASLE +#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3 +#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3 + +/* + * COMP driver system settings. + */ +#define STM32_COMP_USE_COMP1 FASLE +#define STM32_COMP_USE_COMP2 FASLE +#define STM32_COMP_USE_COMP3 FASLE +#define STM32_COMP_USE_COMP4 FASLE +#define STM32_COMP_USE_COMP5 FASLE +#define STM32_COMP_USE_COMP6 FASLE +#define STM32_COMP_USE_COMP7 FASLE + +#define STM32_COMP_USE_INTERRUPTS TRUE +#define STM32_COMP_1_2_3_IRQ_PRIORITY 5 +#define STM32_COMP_4_5_6_IRQ_PRIORITY 5 +#define STM32_COMP_7_IRQ_PRIORITY 5 + +#if STM32_COMP_USE_INTERRUPTS +#define STM32_DISABLE_EXTI21_22_29_HANDLER +#define STM32_DISABLE_EXTI30_32_HANDLER +#define STM32_DISABLE_EXTI33_HANDLER +#endif + +/* + * USBH driver system settings. + */ +#define STM32_OTG_FS_CHANNELS_NUMBER 8 +#define STM32_OTG_HS_CHANNELS_NUMBER 12 + +#define STM32_USBH_USE_OTG1 1 +#define STM32_OTG_FS_RXFIFO_SIZE 1024 +#define STM32_OTG_FS_PTXFIFO_SIZE 128 +#define STM32_OTG_FS_NPTXFIFO_SIZE 128 + +#define STM32_USBH_USE_OTG2 0 +#define STM32_OTG_HS_RXFIFO_SIZE 2048 +#define STM32_OTG_HS_PTXFIFO_SIZE 1024 +#define STM32_OTG_HS_NPTXFIFO_SIZE 1024 + +#define STM32_USBH_MIN_QSPACE 4 +#define STM32_USBH_CHANNELS_NP 4 + +/* + * CRC driver system settings. + */ +#define STM32_CRC_USE_CRC1 FALSE +#define STM32_CRC_CRC1_DMA_IRQ_PRIORITY 1 +#define STM32_CRC_CRC1_DMA_PRIORITY 2 +#define STM32_CRC_CRC1_DMA_STREAM STM32_DMA1_STREAM2 + +#define CRCSW_USE_CRC1 FALSE +#define CRCSW_CRC32_TABLE TRUE +#define CRCSW_CRC16_TABLE TRUE +#define CRCSW_PROGRAMMABLE TRUE + +/* + * EICU driver system settings. + */ +#define STM32_EICU_USE_TIM1 FALSE +#define STM32_EICU_USE_TIM2 FALSE +#define STM32_EICU_USE_TIM3 FASLE +#define STM32_EICU_USE_TIM4 FALSE +#define STM32_EICU_USE_TIM5 FALSE +#define STM32_EICU_USE_TIM8 FALSE +#define STM32_EICU_USE_TIM9 FALSE +#define STM32_EICU_USE_TIM10 FALSE +#define STM32_EICU_USE_TIM11 FALSE +#define STM32_EICU_USE_TIM12 FALSE +#define STM32_EICU_USE_TIM13 FALSE +#define STM32_EICU_USE_TIM14 FALSE +#define STM32_EICU_TIM1_IRQ_PRIORITY 7 +#define STM32_EICU_TIM2_IRQ_PRIORITY 7 +#define STM32_EICU_TIM3_IRQ_PRIORITY 7 +#define STM32_EICU_TIM4_IRQ_PRIORITY 7 +#define STM32_EICU_TIM5_IRQ_PRIORITY 7 +#define STM32_EICU_TIM8_IRQ_PRIORITY 7 +#define STM32_EICU_TIM9_IRQ_PRIORITY 7 +#define STM32_EICU_TIM10_IRQ_PRIORITY 7 +#define STM32_EICU_TIM11_IRQ_PRIORITY 7 +#define STM32_EICU_TIM12_IRQ_PRIORITY 7 +#define STM32_EICU_TIM13_IRQ_PRIORITY 7 +#define STM32_EICU_TIM14_IRQ_PRIORITY 7 + +/* + * QEI driver system settings. + */ +#define STM32_QEI_USE_TIM1 FASLE +#define STM32_QEI_USE_TIM2 FALSE +#define STM32_QEI_USE_TIM3 FASLE +#define STM32_QEI_TIM1_IRQ_PRIORITY 3 +#define STM32_QEI_TIM2_IRQ_PRIORITY 3 +#define STM32_QEI_TIM3_IRQ_PRIORITY 3 diff --git a/firmware/hw_layer/ports/stm32/stm32f4/cfg/halconf.h b/firmware/hw_layer/ports/stm32/stm32f4/cfg/halconf.h index dff6a6e3d1..00ea811bb3 100644 --- a/firmware/hw_layer/ports/stm32/stm32f4/cfg/halconf.h +++ b/firmware/hw_layer/ports/stm32/stm32f4/cfg/halconf.h @@ -204,6 +204,9 @@ #define UART_USE_MUTUAL_EXCLUSION FALSE #endif +/* common for all STM32 */ +#include "../../cfg/halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/firmware/hw_layer/ports/stm32/stm32f4/cfg/mcuconf.h b/firmware/hw_layer/ports/stm32/stm32f4/cfg/mcuconf.h index 601191a4fc..dce2fc3644 100644 --- a/firmware/hw_layer/ports/stm32/stm32f4/cfg/mcuconf.h +++ b/firmware/hw_layer/ports/stm32/stm32f4/cfg/mcuconf.h @@ -110,4 +110,7 @@ #include "mcuconf_common_f4_f7.h" +/* common for all STM32 */ +#include "../../cfg/mcuconf_community.h" + #endif /* _MCUCONF_H_ */ diff --git a/firmware/hw_layer/ports/stm32/stm32f7/cfg/halconf.h b/firmware/hw_layer/ports/stm32/stm32f7/cfg/halconf.h index 3ad14bbb3a..2057316cf1 100644 --- a/firmware/hw_layer/ports/stm32/stm32f7/cfg/halconf.h +++ b/firmware/hw_layer/ports/stm32/stm32f7/cfg/halconf.h @@ -215,6 +215,9 @@ #define UART_USE_MUTUAL_EXCLUSION FALSE #endif +/* common for all STM32 */ +#include "../../cfg/halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/firmware/hw_layer/ports/stm32/stm32f7/cfg/mcuconf.h b/firmware/hw_layer/ports/stm32/stm32f7/cfg/mcuconf.h index 36ac024ddd..7299c1d509 100644 --- a/firmware/hw_layer/ports/stm32/stm32f7/cfg/mcuconf.h +++ b/firmware/hw_layer/ports/stm32/stm32f7/cfg/mcuconf.h @@ -159,4 +159,7 @@ #include "mcuconf_common_f4_f7.h" +/* common for all STM32 */ +#include "../../cfg/mcuconf_community.h" + #endif /* MCUCONF_H */ diff --git a/firmware/hw_layer/ports/stm32/stm32h7/cfg/halconf.h b/firmware/hw_layer/ports/stm32/stm32h7/cfg/halconf.h index c5f67a9e1b..2fdd5bc873 100644 --- a/firmware/hw_layer/ports/stm32/stm32h7/cfg/halconf.h +++ b/firmware/hw_layer/ports/stm32/stm32h7/cfg/halconf.h @@ -294,6 +294,9 @@ #define UART_USE_MUTUAL_EXCLUSION FALSE #endif +/* common for all STM32 */ +#include "../../cfg/halconf_community.h" + #endif /* HALCONF_H */ /** @} */ diff --git a/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h b/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h index 85a46ade34..1fc12c9f81 100644 --- a/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h +++ b/firmware/hw_layer/ports/stm32/stm32h7/cfg/mcuconf.h @@ -485,4 +485,7 @@ #define STM32_SYSCLK STM32_SYS_CK +/* common for all STM32 */ +#include "../../cfg/mcuconf_community.h" + #endif /* MCUCONF_H */ diff --git a/firmware/rusefi.mk b/firmware/rusefi.mk index e17400aae9..a809f8aa5b 100644 --- a/firmware/rusefi.mk +++ b/firmware/rusefi.mk @@ -20,38 +20,39 @@ endif # CPU-dependent defs ifeq ($(PROJECT_CPU),ARCH_STM32F7) CPU_STARTUP = startup_stm32f7xx.mk - CPU_PLATFORM = STM32F7xx/platform.mk + # next file is included through Contrib's platform.ml + #CPU_PLATFORM = $(CHIBIOS)/os/hal/ports/STM32/STM32F7xx/platform.mk + CPU_PLATFORM = ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/STM32F7xx/platform.mk CPU_HWLAYER = ports/stm32/stm32f7 else ifeq ($(PROJECT_CPU),ARCH_STM32F4) CPU_STARTUP = startup_stm32f4xx.mk - CPU_PLATFORM = STM32F4xx/platform.mk + # next file is included through Contrib's platform.ml + #CPU_PLATFORM = $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk + CPU_PLATFORM = ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/STM32F4xx/platform.mk CPU_HWLAYER = ports/stm32/stm32f4 else ifeq ($(PROJECT_CPU),ARCH_STM32H7) CPU_STARTUP = startup_stm32h7xx.mk - CPU_PLATFORM = STM32H7xx/platform.mk + # next file is included through Contrib's platform.ml + #CPU_PLATFORM = $(CHIBIOS)/os/hal/ports/STM32/STM32H7xx/platform.mk + CPU_PLATFORM = ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/STM32H7xx/platform.mk CPU_HWLAYER = ports/stm32/stm32h7 else ifeq ($(PROJECT_CPU),kinetis) CPU_STARTUP_DIR = $(KINETIS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_ke1xf.mk - CPU_PLATFORM_DIR = $(KINETIS_CONTRIB)/os/hal/ports/KINETIS/KE1xF/platform.mk + CPU_PLATFORM = $(KINETIS_CONTRIB)/os/hal/ports/KINETIS/KE1xF/platform.mk CPU_HWLAYER = ports/kinetis else ifeq ($(PROJECT_CPU),cypress) CPU_STARTUP_DIR = $(CYPRESS_CONTRIB)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_S6E2CxAH.mk - CPU_PLATFORM_DIR = $(CYPRESS_CONTRIB)/os/hal/ports/Cypress/S6E2CxAH/platform.mk + CPU_PLATFORM = $(CYPRESS_CONTRIB)/os/hal/ports/Cypress/S6E2CxAH/platform.mk CPU_HWLAYER = ports/cypress else ifeq ($(PROJECT_CPU),simulator) else $(error Unexpected PROJECT_CPU) endif - ifeq ($(CPU_STARTUP_DIR),) CPU_STARTUP_DIR = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/$(CPU_STARTUP) endif -ifeq ($(CPU_PLATFORM_DIR),) -CPU_PLATFORM_DIR = $(CHIBIOS)/os/hal/ports/STM32/$(CPU_PLATFORM) -endif - ifeq ($(GENERATED_ENUMS_DIR),) GENERATED_ENUMS_DIR = $(PROJECT_DIR)/controllers/algo endif