parent
4ebbe6fd61
commit
f9c82b860d
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@ -1,132 +0,0 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* STM32F76xxI generic setup.
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*
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* RAM0 - Data, Heap.
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* RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH.
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*
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* Notes:
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* BSS is placed in DTCM RAM in order to simplify DMA buffers management.
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*/
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MEMORY
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{
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flash0 : org = 0x08000000, len = 2M /* Flash as AXIM (writable) */
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flash1 : org = 0x00200000, len = 2M /* Flash as ITCM */
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flash2 : org = 0x00000000, len = 0
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flash3 : org = 0x00000000, len = 0
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flash4 : org = 0x00000000, len = 0
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flash5 : org = 0x00000000, len = 0
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flash6 : org = 0x00000000, len = 0
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flash7 : org = 0x00000000, len = 0
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ram0 : org = 0x20020000, len = 384k /* SRAM1 + SRAM2 */
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ram1 : org = 0x20020000, len = 368k /* SRAM1 */
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ram2 : org = 0x2007C000, len = 16k /* SRAM2 */
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ram3 : org = 0x20000000, len = 128k /* DTCM-RAM */
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ram4 : org = 0x00000000, len = 16k /* ITCM-RAM */
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ram5 : org = 0x40024000, len = 4k /* BCKP SRAM */
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ram6 : org = 0x00000000, len = 0
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ram7 : org = 0x00000000, len = 0
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}
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/* For each data/text section two region are defined, a virtual region
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and a load region (_LMA suffix).*/
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/* Flash region to be used for exception vectors.*/
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REGION_ALIAS("VECTORS_FLASH", flash0);
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REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
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/* Flash region to be used for constructors and destructors.*/
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REGION_ALIAS("XTORS_FLASH", flash0);
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REGION_ALIAS("XTORS_FLASH_LMA", flash0);
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/* Flash region to be used for code text.*/
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REGION_ALIAS("TEXT_FLASH", flash0);
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REGION_ALIAS("TEXT_FLASH_LMA", flash0);
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/* Flash region to be used for read only data.*/
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REGION_ALIAS("RODATA_FLASH", flash0);
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REGION_ALIAS("RODATA_FLASH_LMA", flash0);
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/* Flash region to be used for various.*/
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REGION_ALIAS("VARIOUS_FLASH", flash0);
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
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/* Flash region to be used for RAM(n) initialization data.*/
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REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
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/* RAM region to be used for Main stack. This stack accommodates the processing
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of all exceptions and interrupts.*/
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REGION_ALIAS("MAIN_STACK_RAM", ram0);
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/* RAM region to be used for the process stack. This is the stack used by
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the main() function.*/
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REGION_ALIAS("PROCESS_STACK_RAM", ram0);
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/* RAM region to be used for data segment.*/
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REGION_ALIAS("DATA_RAM", ram0);
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REGION_ALIAS("DATA_RAM_LMA", flash0);
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/* RAM region to be used for BSS segment.*/
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REGION_ALIAS("BSS_RAM", ram0);
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/* RAM region to be used for the default heap.*/
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REGION_ALIAS("HEAP_RAM", ram0);
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/* Stack rules inclusion.*/
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INCLUDE rules_stacks.ld
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/*===========================================================================*/
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/* Custom sections for STM32F7xx. */
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/*===========================================================================*/
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/* RAM region to be used for nocache segment.*/
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REGION_ALIAS("NOCACHE_RAM", ram3);
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/* RAM region to be used for eth segment.*/
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REGION_ALIAS("ETH_RAM", ram3);
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SECTIONS
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{
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/* Special section for non cache-able areas.*/
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.nocache (NOLOAD) : ALIGN(4)
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{
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__nocache_base__ = .;
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*(.nocache)
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*(.nocache.*)
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*(.bss.__nocache_*)
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. = ALIGN(4);
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__nocache_end__ = .;
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} > NOCACHE_RAM
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/* Special section for Ethernet DMA non cache-able areas.*/
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.eth (NOLOAD) : ALIGN(4)
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{
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__eth_base__ = .;
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*(.eth)
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*(.eth.*)
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*(.bss.__eth_*)
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. = ALIGN(4);
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__eth_end__ = .;
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} > ETH_RAM
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}
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/* Code rules inclusion.*/
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INCLUDE rules_code.ld
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/* Data rules inclusion.*/
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INCLUDE rules_data.ld
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@ -1,221 +0,0 @@
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/*
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* ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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* This file has been automatically generated using ChibiStudio board
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* generator plugin. Do not edit manually.
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*/
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#include "hal.h"
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#include "stm32_gpio.h"
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#include "efilib.h"
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/* drivers */
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#include "drivers/gpio/tle6240.h"
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#include "drivers/gpio/mc33972.h"
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/*==========================================================================*/
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/* Driver local definitions. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver exported variables. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver local variables and types. */
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/*==========================================================================*/
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/**
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* @brief Type of STM32 GPIO port setup.
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*/
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typedef struct {
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uint32_t moder;
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uint32_t otyper;
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uint32_t ospeedr;
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uint32_t pupdr;
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uint32_t odr;
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uint32_t afrl;
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uint32_t afrh;
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} gpio_setup_t;
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/**
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* @brief Type of STM32 GPIO initialization data.
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*/
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typedef struct {
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gpio_setup_t PAData;
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gpio_setup_t PBData;
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gpio_setup_t PCData;
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gpio_setup_t PDData;
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gpio_setup_t PEData;
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gpio_setup_t PFData;
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gpio_setup_t PGData;
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gpio_setup_t PHData;
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} gpio_config_t;
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/**
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* @brief STM32 GPIO static initialization data.
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*/
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static const gpio_config_t gpio_default_config = {
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{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
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VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
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{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
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VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
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{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
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VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
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{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
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VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
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{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
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VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
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{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
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VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
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{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
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VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
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{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
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VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
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};
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/*==========================================================================*/
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/* Driver local functions. */
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/*==========================================================================*/
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static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
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gpiop->OTYPER = config->otyper;
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gpiop->OSPEEDR = config->ospeedr;
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gpiop->PUPDR = config->pupdr;
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gpiop->ODR = config->odr;
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gpiop->AFRL = config->afrl;
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gpiop->AFRH = config->afrh;
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gpiop->MODER = config->moder;
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}
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static void stm32_gpio_init(void) {
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/* Enabling GPIO-related clocks, the mask comes from the
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* registry header file.*/
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rccResetAHB1(STM32_GPIO_EN_MASK);
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rccEnableAHB1(STM32_GPIO_EN_MASK, true);
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/* Initializing all the defined GPIO ports.*/
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gpio_init(GPIOA, &gpio_default_config.PAData);
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gpio_init(GPIOB, &gpio_default_config.PBData);
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gpio_init(GPIOC, &gpio_default_config.PCData);
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gpio_init(GPIOD, &gpio_default_config.PDData);
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gpio_init(GPIOE, &gpio_default_config.PEData);
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gpio_init(GPIOF, &gpio_default_config.PFData);
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gpio_init(GPIOG, &gpio_default_config.PGData);
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gpio_init(GPIOH, &gpio_default_config.PHData);
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}
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/*==========================================================================*/
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/* Driver interrupt handlers. */
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/*==========================================================================*/
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/*==========================================================================*/
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/* Driver exported functions. */
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/*==========================================================================*/
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/**
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* @brief Early initialization code.
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* @details GPIO ports and system clocks are initialized before everything
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* else.
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*/
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void __early_init(void)
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{
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/* allow debug in all low-power modes */
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DBGMCU->CR |= DBGMCU_CR_DBG_SLEEP | DBGMCU_CR_DBG_STOP | DBGMCU_CR_DBG_STANDBY;
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stm32_gpio_init();
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stm32_clock_init();
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}
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#if HAL_USE_SDC || defined(__DOXYGEN__)
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/**
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* @brief SDC card detection.
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*/
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bool sdc_lld_is_card_inserted(SDCDriver *sdcp)
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{
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UNUSED(sdcp);
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/* TODO: Fill the implementation.*/
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return true;
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}
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/**
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* @brief SDC card write protection detection.
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*/
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bool sdc_lld_is_write_protected(SDCDriver *sdcp)
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{
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UNUSED(sdcp);
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/* TODO: Fill the implementation.*/
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return false;
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}
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#endif /* HAL_USE_SDC */
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#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
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/**
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* @brief MMC_SPI card detection.
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*/
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bool mmc_lld_is_card_inserted(MMCDriver *mmcp)
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{
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UNUSED(mmcp);
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/* TODO: Fill the implementation.*/
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return true;
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}
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/**
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* @brief MMC_SPI card write protection detection.
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*/
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bool mmc_lld_is_write_protected(MMCDriver *mmcp)
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{
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UNUSED(mmcp);
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/* TODO: Fill the implementation.*/
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return false;
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}
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#endif
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/**
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* @brief Board-specific initialization code.
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* @todo Add your board-specific code, if any.
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*/
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void boardInit(void)
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{
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}
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/**
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* @brief Board-specific ADC channel configuration code overrides.
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* @todo Add your board-specific code, if any.
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*/
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void setAdcChannelOverrides(void) {
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}
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#define STATUS_LED_PIN 8
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#define STATUS_LED_PORT GPIOG
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void BLIIINK(int t) {
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int i, j;
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palSetPadMode(STATUS_LED_PORT, STATUS_LED_PIN, PAL_MODE_OUTPUT_PUSHPULL);
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//while (true) {
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for (j = 0; j < 2; j++) {
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palClearPad(STATUS_LED_PORT, STATUS_LED_PIN);
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for (i = 0; i < 2 * t; i++) {
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palTogglePad(STATUS_LED_PORT, STATUS_LED_PIN);
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chThdSleepMilliseconds(250);
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}
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chThdSleepMilliseconds(1000);
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}
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}
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@ -1,864 +0,0 @@
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/*
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ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
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||||
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Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
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||||
|
||||
/*
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* This file has been automatically generated using ChibiStudio board
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||||
* generator plugin. Do not edit manually.
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||||
*/
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#ifndef BOARD_H
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#define BOARD_H
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/*
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* Board identifier.
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*/
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#define BOARD_NAME "Subaru EJ20G/STM32F765 for RusEFI"
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#undef BOARD_TLE6240_COUNT
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#define BOARD_TLE6240_COUNT 1
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#undef BOARD_MC33972_COUNT
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#define BOARD_MC33972_COUNT 1
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#undef BOARD_TLE8888_COUNT
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#define BOARD_TLE8888_COUNT 0
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/*
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* Board oscillators-related settings.
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* NOTE: LSE not fitted.
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*/
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#if !defined(STM32_LSECLK)
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#define STM32_LSECLK 32768U
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#endif
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#define STM32_LSEDRV (3U << 3U)
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#if !defined(STM32_HSECLK)
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#define STM32_HSECLK 12000000U
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#endif
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/*
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* Board voltages.
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* Required for performance limits calculation.
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*/
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#define STM32_VDD 330U
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/*
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* MCU type as defined in the ST header.
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* this declaration for stm32_registry.h
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*/
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#ifndef STM32F765xx
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#define STM32F765xx
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#endif
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/*
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* I/O ports initial setup, this configuration is established soon after reset
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* in the initialization code.
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* Please refer to the STM32 Reference Manual for details.
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*/
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#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
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#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
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#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
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#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
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#define PIN_ODR_LOW(n) (0U << (n))
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#define PIN_ODR_HIGH(n) (1U << (n))
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#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
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#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
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#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
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#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
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#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
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#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
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#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
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#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
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#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
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#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
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// See https://github.com/rusefi/rusefi/issues/397
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#define DEFAULT_GPIO_SPEED PIN_OSPEED_HIGH
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/*
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* GPIOA setup:
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*
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* PA0 -
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* PA1 -
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* PA2 -
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* PA3 -
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* PA4 -
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* PA5 -
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* PA6 -
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* PA7 -
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* PA8 -
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* PA9 - USART1_TX - boot/console - TTL level on XP4.2
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* PA10 - USART1_RX - boot/console - TTL level on XP4.3
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* PA11 - USB_FS_D- - boot/console/TS - XS3
|
||||
* PA12 - USB_FS_D+ - boot/console/TS - XS3
|
||||
* PA13 -
|
||||
* PA14 -
|
||||
* PA15 -
|
||||
*/
|
||||
#define VAL_GPIOA_MODER (/*PIN_MODE_ALTERNATE(0) */ PIN_MODE_OUTPUT(0) | \
|
||||
/*PIN_MODE_ALTERNATE(1) */ PIN_MODE_OUTPUT(1) | \
|
||||
PIN_MODE_ANALOG(2) | \
|
||||
PIN_MODE_ANALOG(3) | \
|
||||
PIN_MODE_ANALOG(4) | \
|
||||
PIN_MODE_ANALOG(5) | \
|
||||
PIN_MODE_ANALOG(6) | \
|
||||
PIN_MODE_ANALOG(7) | \
|
||||
PIN_MODE_ALTERNATE(8) | \
|
||||
PIN_MODE_ALTERNATE(9) | \
|
||||
PIN_MODE_ALTERNATE(10) | \
|
||||
PIN_MODE_ALTERNATE(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
PIN_MODE_ALTERNATE(13) | \
|
||||
PIN_MODE_ALTERNATE(14) | \
|
||||
PIN_MODE_OUTPUT(15))
|
||||
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_PUSHPULL(14) | \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOA_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_FLOATING( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_PULLUP( 9) | \
|
||||
PIN_PUPDR_PULLUP(10) | \
|
||||
PIN_PUPDR_FLOATING(11) | \
|
||||
PIN_PUPDR_FLOATING(12) | \
|
||||
PIN_PUPDR_PULLUP(13) | \
|
||||
PIN_PUPDR_PULLDOWN(14) | \
|
||||
PIN_PUPDR_PULLUP(15))
|
||||
#define VAL_GPIOA_ODR (PIN_ODR_LOW(0) | \
|
||||
PIN_ODR_LOW(1) | \
|
||||
PIN_ODR_HIGH(15))
|
||||
#define VAL_GPIOA_AFRL (PIN_AFIO_AF( 0, 1U) | \
|
||||
PIN_AFIO_AF( 1, 1U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 0U) | \
|
||||
PIN_AFIO_AF( 6, 0U) | \
|
||||
PIN_AFIO_AF( 7, 0U))
|
||||
#define VAL_GPIOA_AFRH (PIN_AFIO_AF( 8, 0U) | \
|
||||
PIN_AFIO_AF( 9, 7U) | \
|
||||
PIN_AFIO_AF(10, 7U) | \
|
||||
PIN_AFIO_AF(11, 10U) | \
|
||||
PIN_AFIO_AF(12, 10U) | \
|
||||
PIN_AFIO_AF(13, 0U) | \
|
||||
PIN_AFIO_AF(14, 0U) | \
|
||||
PIN_AFIO_AF(15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOB setup:
|
||||
*
|
||||
* PB0 -
|
||||
* PB1 -
|
||||
* PB2 - boot mode - set JP2 to pull high.
|
||||
* PB3 -
|
||||
* PB4 - SPI4_CS3 - MC33792 chip select
|
||||
* PB5 -
|
||||
* PB6 -
|
||||
* PB7 -
|
||||
* PB8 -
|
||||
* PB9 -
|
||||
* PB10 -
|
||||
* PB11 -
|
||||
* PB12 -
|
||||
* PB13 -
|
||||
* PB14 -
|
||||
* PB15 -
|
||||
*/
|
||||
#define VAL_GPIOB_MODER (PIN_MODE_ANALOG(0) | \
|
||||
PIN_MODE_ANALOG(1) | \
|
||||
PIN_MODE_INPUT(2) | \
|
||||
/*PIN_MODE_ALTERNATE(3)*/ PIN_MODE_OUTPUT(3) | \
|
||||
PIN_MODE_OUTPUT(4) | \
|
||||
/*PIN_MODE_ALTERNATE(5)*/ PIN_MODE_OUTPUT(5) | \
|
||||
PIN_MODE_ALTERNATE(6) | \
|
||||
PIN_MODE_OUTPUT(7) | \
|
||||
/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_OUTPUT(8) | \
|
||||
/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_OUTPUT(9) | \
|
||||
/*PIN_MODE_ALTERNATE(10)*/ PIN_MODE_OUTPUT(10) | \
|
||||
/*PIN_MODE_ALTERNATE(11)*/ PIN_MODE_OUTPUT(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
PIN_MODE_INPUT(13) | \
|
||||
PIN_MODE_ALTERNATE(14) | \
|
||||
PIN_MODE_ALTERNATE(15))
|
||||
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_PUSHPULL(14) | \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOB_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOB_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_PULLDOWN( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_FLOATING( 9) | \
|
||||
PIN_PUPDR_FLOATING(10) | \
|
||||
PIN_PUPDR_FLOATING(11) | \
|
||||
PIN_PUPDR_FLOATING(12) | \
|
||||
PIN_PUPDR_FLOATING(13) | \
|
||||
PIN_PUPDR_PULLDOWN(14) | \
|
||||
PIN_PUPDR_FLOATING(15))
|
||||
#define VAL_GPIOB_ODR (PIN_ODR_LOW(3) | \
|
||||
PIN_ODR_HIGH(4) | \
|
||||
PIN_ODR_LOW(5) | \
|
||||
PIN_ODR_LOW(8) | \
|
||||
PIN_ODR_LOW(9) | \
|
||||
PIN_ODR_LOW(10) | \
|
||||
PIN_ODR_LOW(11))
|
||||
#define VAL_GPIOB_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
||||
PIN_AFIO_AF( 1, 0U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 1U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 2U) | \
|
||||
PIN_AFIO_AF( 6, 10U) | \
|
||||
PIN_AFIO_AF( 7, 0U))
|
||||
#define VAL_GPIOB_AFRH (PIN_AFIO_AF( 8, 2U) | \
|
||||
PIN_AFIO_AF( 9, 2U) | \
|
||||
PIN_AFIO_AF(10, 1U) | \
|
||||
PIN_AFIO_AF(11, 1U) | \
|
||||
PIN_AFIO_AF(12, 12U) | \
|
||||
PIN_AFIO_AF(13, 0U) | \
|
||||
PIN_AFIO_AF(14, 12U) | \
|
||||
PIN_AFIO_AF(15, 12U))
|
||||
|
||||
/*
|
||||
* GPIOC setup:
|
||||
*
|
||||
* PC0 -
|
||||
* PC1 -
|
||||
* PC2 -
|
||||
* PC3 -
|
||||
* PC4 -
|
||||
* PC5 -
|
||||
* PC6 -
|
||||
* PC7 -
|
||||
* PC8 -
|
||||
* PC9 -
|
||||
* PC10 -
|
||||
* PC11 -
|
||||
* PC12 -
|
||||
* PC13 -
|
||||
* PC14 -
|
||||
* PC15 -
|
||||
*/
|
||||
#define VAL_GPIOC_MODER (PIN_MODE_ANALOG(0) | \
|
||||
PIN_MODE_ANALOG(1) | \
|
||||
PIN_MODE_ANALOG(2) | \
|
||||
PIN_MODE_ANALOG(3) | \
|
||||
PIN_MODE_ANALOG(4) | \
|
||||
PIN_MODE_ANALOG(5) | \
|
||||
/*PIN_MODE_ALTERNATE(6)*/ PIN_MODE_OUTPUT(6) | \
|
||||
/*PIN_MODE_ALTERNATE(7)*/ PIN_MODE_OUTPUT(7) | \
|
||||
/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_INPUT(8) | \
|
||||
/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_INPUT(9) | \
|
||||
PIN_MODE_ALTERNATE(10) | \
|
||||
PIN_MODE_ALTERNATE(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
PIN_MODE_OUTPUT(13) | \
|
||||
PIN_MODE_OUTPUT(14) | \
|
||||
PIN_MODE_OUTPUT(15))
|
||||
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_PUSHPULL(14) | \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOC_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_FLOATING( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_PULLUP( 8) | \
|
||||
PIN_PUPDR_PULLUP( 9) | \
|
||||
PIN_PUPDR_FLOATING(10) | \
|
||||
PIN_PUPDR_PULLUP(11) | \
|
||||
PIN_PUPDR_FLOATING(12) | \
|
||||
PIN_PUPDR_FLOATING(13) | \
|
||||
PIN_PUPDR_FLOATING(14) | \
|
||||
PIN_PUPDR_FLOATING(15))
|
||||
#define VAL_GPIOC_ODR (PIN_ODR_LOW(6) | \
|
||||
PIN_ODR_LOW(7) | \
|
||||
PIN_ODR_HIGH(13) | \
|
||||
PIN_ODR_HIGH(14) | \
|
||||
PIN_ODR_HIGH(15))
|
||||
#define VAL_GPIOC_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
||||
PIN_AFIO_AF( 1, 0U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 0U) | \
|
||||
PIN_AFIO_AF( 6, 3U) | \
|
||||
PIN_AFIO_AF( 7, 3U))
|
||||
#define VAL_GPIOC_AFRH (PIN_AFIO_AF( 8, 4U) | \
|
||||
PIN_AFIO_AF( 9, 4U) | \
|
||||
PIN_AFIO_AF(10, 6U) | \
|
||||
PIN_AFIO_AF(11, 6U) | \
|
||||
PIN_AFIO_AF(12, 6U) | \
|
||||
PIN_AFIO_AF(13, 0U) | \
|
||||
PIN_AFIO_AF(14, 0U) | \
|
||||
PIN_AFIO_AF(15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOD setup:
|
||||
*
|
||||
* PD0 -
|
||||
* PD1 -
|
||||
* PD2 - USB_HS 5V en out
|
||||
* PD3 - USB HS 5V Over current input
|
||||
* PD4 - USB FS 5V Over current input
|
||||
* PD5 - USB FS 5V en out
|
||||
* PD6 -
|
||||
* PD7 -
|
||||
* PD8 -
|
||||
* PD9 -
|
||||
* PD10 -
|
||||
* PD11 -
|
||||
* PD12 -
|
||||
* PD13 -
|
||||
* PD14 -
|
||||
* PD15 -
|
||||
*/
|
||||
#define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(0) | \
|
||||
PIN_MODE_ALTERNATE(1) | \
|
||||
PIN_MODE_OUTPUT(2) | \
|
||||
PIN_MODE_INPUT(3) | \
|
||||
PIN_MODE_INPUT(4) | \
|
||||
PIN_MODE_OUTPUT(5) | \
|
||||
PIN_MODE_ALTERNATE(6) | \
|
||||
PIN_MODE_ALTERNATE(7) | \
|
||||
PIN_MODE_ALTERNATE(8) | \
|
||||
PIN_MODE_ALTERNATE(9) | \
|
||||
PIN_MODE_OUTPUT(10) | \
|
||||
PIN_MODE_ALTERNATE(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
PIN_MODE_ALTERNATE(13) | \
|
||||
/*PIN_MODE_ALTERNATE(14)*/ PIN_MODE_OUTPUT(14) | \
|
||||
/*PIN_MODE_ALTERNATE(15)*/ PIN_MODE_OUTPUT(15))
|
||||
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_PUSHPULL(14) | \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOD_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_FLOATING( 2) | \
|
||||
PIN_PUPDR_PULLUP( 3) | \
|
||||
PIN_PUPDR_PULLUP( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_PULLUP( 9) | \
|
||||
PIN_PUPDR_FLOATING(10) | \
|
||||
PIN_PUPDR_PULLUP(11) | \
|
||||
PIN_PUPDR_PULLUP(12) | \
|
||||
PIN_PUPDR_PULLUP(13) | \
|
||||
PIN_PUPDR_FLOATING(14) | \
|
||||
PIN_PUPDR_FLOATING(15))
|
||||
#define VAL_GPIOD_ODR (PIN_ODR_LOW(2) | \
|
||||
PIN_ODR_LOW(5) | \
|
||||
PIN_ODR_HIGH(10) | \
|
||||
PIN_ODR_LOW(14) | \
|
||||
PIN_ODR_LOW(15))
|
||||
#define VAL_GPIOD_AFRL (PIN_AFIO_AF( 0, 9U) | \
|
||||
PIN_AFIO_AF( 1, 9U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 0U) | \
|
||||
PIN_AFIO_AF( 6, 11U) | \
|
||||
PIN_AFIO_AF( 7, 11U))
|
||||
#define VAL_GPIOD_AFRH (PIN_AFIO_AF( 8, 7U) | \
|
||||
PIN_AFIO_AF( 9, 7U) | \
|
||||
PIN_AFIO_AF(10, 0U) | \
|
||||
PIN_AFIO_AF(11, 9U) | \
|
||||
PIN_AFIO_AF(12, 9U) | \
|
||||
PIN_AFIO_AF(13, 9U) | \
|
||||
PIN_AFIO_AF(14, 2U) | \
|
||||
PIN_AFIO_AF(15, 2U))
|
||||
|
||||
/*
|
||||
* GPIOE setup:
|
||||
*
|
||||
* PE0 -
|
||||
* PE1 -
|
||||
* PE2 -
|
||||
* PE3 -
|
||||
* PE4 -
|
||||
* PE5 -
|
||||
* PE6 - SPI4_MOSI
|
||||
* PE7 -
|
||||
* PE8 -
|
||||
* PE9 -
|
||||
* PE10 -
|
||||
* PE11 -
|
||||
* PE12 -
|
||||
* PE13 -
|
||||
* PE14 -
|
||||
* PE15 -
|
||||
*/
|
||||
#define VAL_GPIOE_MODER (PIN_MODE_ALTERNATE(0) | \
|
||||
PIN_MODE_ALTERNATE(1) | \
|
||||
PIN_MODE_ALTERNATE(2) | \
|
||||
PIN_MODE_OUTPUT(3) | \
|
||||
PIN_MODE_OUTPUT(4) | \
|
||||
PIN_MODE_ALTERNATE(5) | \
|
||||
PIN_MODE_ALTERNATE(6) | \
|
||||
PIN_MODE_ALTERNATE(7) | \
|
||||
PIN_MODE_ALTERNATE(8) | \
|
||||
PIN_MODE_OUTPUT(9) | \
|
||||
/*PIN_MODE_ALTERNATE(10)*/ PIN_MODE_OUTPUT(10) | \
|
||||
/*PIN_MODE_ALTERNATE(11)*/ PIN_MODE_OUTPUT(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
/*PIN_MODE_ALTERNATE(13)*/ PIN_MODE_OUTPUT(13) | \
|
||||
/*PIN_MODE_ALTERNATE(14)*/ PIN_MODE_OUTPUT(14) | \
|
||||
PIN_MODE_INPUT(15))
|
||||
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_PUSHPULL(14) | \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOE_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_PULLUP( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_PULLUP( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_PULLUP( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_FLOATING( 9) | \
|
||||
PIN_PUPDR_FLOATING(10) | \
|
||||
PIN_PUPDR_FLOATING(11) | \
|
||||
PIN_PUPDR_FLOATING(12) | \
|
||||
PIN_PUPDR_FLOATING(13) | \
|
||||
PIN_PUPDR_FLOATING(14) | \
|
||||
PIN_PUPDR_PULLUP(15))
|
||||
#define VAL_GPIOE_ODR (PIN_ODR_LOW(3) | \
|
||||
PIN_ODR_HIGH(4) | \
|
||||
PIN_ODR_LOW(9))
|
||||
#define VAL_GPIOE_AFRL (PIN_AFIO_AF( 0, 8U) | \
|
||||
PIN_AFIO_AF( 1, 8U) | \
|
||||
PIN_AFIO_AF( 2, 9U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 5U) | \
|
||||
PIN_AFIO_AF( 5, 5U) | \
|
||||
PIN_AFIO_AF( 6, 5U) | \
|
||||
PIN_AFIO_AF( 7, 8U))
|
||||
#define VAL_GPIOE_AFRH (PIN_AFIO_AF( 8, 8U) | \
|
||||
PIN_AFIO_AF( 9, 0U) | \
|
||||
PIN_AFIO_AF(10, 1U) | \
|
||||
PIN_AFIO_AF(11, 1U) | \
|
||||
PIN_AFIO_AF(12, 5U) | \
|
||||
PIN_AFIO_AF(13, 1U) | \
|
||||
PIN_AFIO_AF(14, 1U) | \
|
||||
PIN_AFIO_AF(15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOF setup:
|
||||
*
|
||||
* PF0 -
|
||||
* PF1 -
|
||||
* PF2 -
|
||||
* PF3 -
|
||||
* PF4 -
|
||||
* PF5 -
|
||||
* PF6 -
|
||||
* PF7 -
|
||||
* PF8 -
|
||||
* PF9 -
|
||||
* PF10 -
|
||||
* PF11 -
|
||||
* PF12 -
|
||||
* PF13 -
|
||||
* PF14 - self simulation pin 0 (actually i2c)
|
||||
* PF15 - self simulation pin 1 (actually i2c)
|
||||
*/
|
||||
#define VAL_GPIOF_MODER (PIN_MODE_OUTPUT(0) | \
|
||||
PIN_MODE_OUTPUT(1) | \
|
||||
PIN_MODE_OUTPUT(2) | \
|
||||
PIN_MODE_ANALOG(3) | \
|
||||
PIN_MODE_ANALOG(4) | \
|
||||
PIN_MODE_ANALOG(5) | \
|
||||
PIN_MODE_ANALOG(6) | \
|
||||
PIN_MODE_ANALOG(7) | \
|
||||
/*PIN_MODE_ALTERNATE(8)*/ PIN_MODE_OUTPUT(8) | \
|
||||
/*PIN_MODE_ALTERNATE(9)*/ PIN_MODE_OUTPUT(9) | \
|
||||
PIN_MODE_ALTERNATE(10) | \
|
||||
PIN_MODE_OUTPUT(11) | \
|
||||
PIN_MODE_OUTPUT(12) | \
|
||||
PIN_MODE_INPUT(13) | \
|
||||
/* PIN_MODE_ALTERNATE(14) | \ */ PIN_MODE_OUTPUT(14) | \
|
||||
/* PIN_MODE_ALTERNATE(15)) */ PIN_MODE_OUTPUT(15))
|
||||
#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_PUSHPULL( 6) | \
|
||||
PIN_OTYPE_PUSHPULL( 7) | \
|
||||
PIN_OTYPE_PUSHPULL( 8) | \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
/* PIN_OTYPE_OPENDRAIN(14)| \ */ PIN_OTYPE_PUSHPULL(14) | \
|
||||
/* PIN_OTYPE_OPENDRAIN(15)) */ PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOF_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1) | \
|
||||
PIN_PUPDR_FLOATING( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_FLOATING( 9) | \
|
||||
PIN_PUPDR_FLOATING(10) | \
|
||||
PIN_PUPDR_FLOATING(11) | \
|
||||
PIN_PUPDR_FLOATING(12) | \
|
||||
PIN_PUPDR_PULLUP(13) | \
|
||||
PIN_PUPDR_PULLUP(14) | \
|
||||
PIN_PUPDR_PULLUP(15))
|
||||
#define VAL_GPIOF_ODR (PIN_ODR_HIGH(0) | \
|
||||
PIN_ODR_HIGH(1) | \
|
||||
PIN_ODR_HIGH(2) | \
|
||||
PIN_ODR_LOW(8) | \
|
||||
PIN_ODR_LOW(9) | \
|
||||
PIN_ODR_HIGH(11) | \
|
||||
PIN_ODR_HIGH(12) | \
|
||||
PIN_ODR_HIGH(14) | \
|
||||
PIN_ODR_HIGH(15))
|
||||
#define VAL_GPIOF_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
||||
PIN_AFIO_AF( 1, 0U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 0U) | \
|
||||
PIN_AFIO_AF( 6, 0U) | \
|
||||
PIN_AFIO_AF( 7, 0U))
|
||||
#define VAL_GPIOF_AFRH (PIN_AFIO_AF( 8, 9U) | \
|
||||
PIN_AFIO_AF( 9, 9U) | \
|
||||
PIN_AFIO_AF(10, 9U) | \
|
||||
PIN_AFIO_AF(11, 0U) | \
|
||||
PIN_AFIO_AF(12, 0U) | \
|
||||
PIN_AFIO_AF(13, 0U) | \
|
||||
/*PIN_AFIO_AF(14, 4U) | \ */ PIN_AFIO_AF(14, 0U) | \
|
||||
/*PIN_AFIO_AF(15, 4U)) */ PIN_AFIO_AF(15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOG setup:
|
||||
*
|
||||
* PG0 -
|
||||
* PG1 -
|
||||
* PG2 -
|
||||
* PG3 -
|
||||
* PG4 -
|
||||
* PG5 -
|
||||
* PG6 - LD1 - active low
|
||||
* PG7 - LD3 - active low
|
||||
* PG8 - LD2 - active PIN_ODR_LOW
|
||||
* PG9 -
|
||||
* PG10 -
|
||||
* PG11 -
|
||||
* PG12 -
|
||||
* PG13 -
|
||||
* PG14 -
|
||||
* PG15 -
|
||||
*/
|
||||
#define VAL_GPIOG_MODER (PIN_MODE_OUTPUT(0) | \
|
||||
PIN_MODE_INPUT(1) | \
|
||||
PIN_MODE_OUTPUT(2) | \
|
||||
PIN_MODE_OUTPUT(3) | \
|
||||
PIN_MODE_OUTPUT(4) | \
|
||||
PIN_MODE_OUTPUT(5) | \
|
||||
PIN_MODE_OUTPUT(6) | \
|
||||
PIN_MODE_OUTPUT(7) | \
|
||||
PIN_MODE_OUTPUT(8) | \
|
||||
PIN_MODE_ALTERNATE(9) | \
|
||||
PIN_MODE_ALTERNATE(10) | \
|
||||
PIN_MODE_ALTERNATE(11) | \
|
||||
PIN_MODE_ALTERNATE(12) | \
|
||||
PIN_MODE_OUTPUT(13) | \
|
||||
PIN_MODE_ALTERNATE(14) | \
|
||||
PIN_MODE_OUTPUT(15))
|
||||
#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1) | \
|
||||
PIN_OTYPE_PUSHPULL( 2) | \
|
||||
PIN_OTYPE_PUSHPULL( 3) | \
|
||||
PIN_OTYPE_PUSHPULL( 4) | \
|
||||
PIN_OTYPE_PUSHPULL( 5) | \
|
||||
PIN_OTYPE_OPENDRAIN( 6)| \
|
||||
PIN_OTYPE_OPENDRAIN( 7)| \
|
||||
PIN_OTYPE_OPENDRAIN( 8)| \
|
||||
PIN_OTYPE_PUSHPULL( 9) | \
|
||||
PIN_OTYPE_PUSHPULL(10) | \
|
||||
PIN_OTYPE_PUSHPULL(11) | \
|
||||
PIN_OTYPE_PUSHPULL(12) | \
|
||||
PIN_OTYPE_PUSHPULL(13) | \
|
||||
PIN_OTYPE_OPENDRAIN(14)| \
|
||||
PIN_OTYPE_PUSHPULL(15))
|
||||
#define VAL_GPIOG_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1) | \
|
||||
DEFAULT_GPIO_SPEED( 2) | \
|
||||
DEFAULT_GPIO_SPEED( 3) | \
|
||||
DEFAULT_GPIO_SPEED( 4) | \
|
||||
DEFAULT_GPIO_SPEED( 5) | \
|
||||
DEFAULT_GPIO_SPEED( 6) | \
|
||||
DEFAULT_GPIO_SPEED( 7) | \
|
||||
DEFAULT_GPIO_SPEED( 8) | \
|
||||
DEFAULT_GPIO_SPEED( 9) | \
|
||||
DEFAULT_GPIO_SPEED(10) | \
|
||||
DEFAULT_GPIO_SPEED(11) | \
|
||||
DEFAULT_GPIO_SPEED(12) | \
|
||||
DEFAULT_GPIO_SPEED(13) | \
|
||||
DEFAULT_GPIO_SPEED(14) | \
|
||||
DEFAULT_GPIO_SPEED(15))
|
||||
#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_PULLUP( 1) | \
|
||||
PIN_PUPDR_FLOATING( 2) | \
|
||||
PIN_PUPDR_FLOATING( 3) | \
|
||||
PIN_PUPDR_FLOATING( 4) | \
|
||||
PIN_PUPDR_FLOATING( 5) | \
|
||||
PIN_PUPDR_FLOATING( 6) | \
|
||||
PIN_PUPDR_FLOATING( 7) | \
|
||||
PIN_PUPDR_FLOATING( 8) | \
|
||||
PIN_PUPDR_PULLUP( 9) | \
|
||||
PIN_PUPDR_PULLUP(10) | \
|
||||
PIN_PUPDR_PULLUP(11) | \
|
||||
PIN_PUPDR_PULLUP(12) | \
|
||||
PIN_PUPDR_FLOATING(13) | \
|
||||
PIN_PUPDR_PULLUP(14) | \
|
||||
PIN_PUPDR_FLOATING(15))
|
||||
#define VAL_GPIOG_ODR (PIN_ODR_LOW(0) | \
|
||||
PIN_ODR_LOW(2) | \
|
||||
PIN_ODR_LOW(3) | \
|
||||
PIN_ODR_LOW(4) | \
|
||||
PIN_ODR_LOW(5) | \
|
||||
PIN_ODR_HIGH(6) | \
|
||||
PIN_ODR_HIGH(7) | \
|
||||
PIN_ODR_HIGH(8) | \
|
||||
PIN_ODR_HIGH(13) | \
|
||||
PIN_ODR_LOW(15))
|
||||
#define VAL_GPIOG_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
||||
PIN_AFIO_AF( 1, 0U) | \
|
||||
PIN_AFIO_AF( 2, 0U) | \
|
||||
PIN_AFIO_AF( 3, 0U) | \
|
||||
PIN_AFIO_AF( 4, 0U) | \
|
||||
PIN_AFIO_AF( 5, 0U) | \
|
||||
PIN_AFIO_AF( 6, 0U) | \
|
||||
PIN_AFIO_AF( 7, 0U))
|
||||
#define VAL_GPIOG_AFRH (PIN_AFIO_AF( 8, 0U) | \
|
||||
PIN_AFIO_AF( 9, 11U) | \
|
||||
PIN_AFIO_AF(10, 11U) | \
|
||||
PIN_AFIO_AF(11, 10U) | \
|
||||
PIN_AFIO_AF(12, 11U) | \
|
||||
PIN_AFIO_AF(13, 0U) | \
|
||||
PIN_AFIO_AF(14, 8U) | \
|
||||
PIN_AFIO_AF(15, 0U))
|
||||
|
||||
/*
|
||||
* GPIOH setup:
|
||||
*
|
||||
* PH0 - OSC_IN (input floating).
|
||||
* PH1 - OSC_OUT (input floating).
|
||||
*/
|
||||
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(0) | \
|
||||
PIN_MODE_INPUT(1))
|
||||
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL( 0) | \
|
||||
PIN_OTYPE_PUSHPULL( 1))
|
||||
#define VAL_GPIOH_OSPEEDR (DEFAULT_GPIO_SPEED( 0) | \
|
||||
DEFAULT_GPIO_SPEED( 1))
|
||||
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING( 0) | \
|
||||
PIN_PUPDR_FLOATING( 1))
|
||||
#define VAL_GPIOH_ODR (PIN_ODR_HIGH( 0) | \
|
||||
PIN_ODR_HIGH( 1))
|
||||
#define VAL_GPIOH_AFRL (PIN_AFIO_AF( 0, 0U) | \
|
||||
PIN_AFIO_AF( 1, 0U))
|
||||
#define VAL_GPIOH_AFRH (0)
|
||||
|
||||
#endif /* BOARD_H */
|
|
@ -1,17 +0,0 @@
|
|||
# List of all the board related files.
|
||||
BOARDSRC = $(PROJECT_DIR)/config/boards/subaru-ej20gn/board.c
|
||||
BOARDSRC_CPP = $(PROJECT_DIR)/config/boards/subaru-ej20gn/board_configuration.cpp
|
||||
|
||||
# Required include directories
|
||||
BOARDINC = $(PROJECT_DIR)/config/boards/subaru-ej20gn
|
||||
|
||||
# Override LD script
|
||||
ifeq ($(USE_BOOTLOADER),yes)
|
||||
# include Prometheus bootloader code
|
||||
BOOTLOADERINC= $(PROJECT_DIR)/bootloader/subaru-ej20gn
|
||||
endif
|
||||
|
||||
LDSCRIPT= $(PROJECT_DIR)/config/boards/subaru-ej20gn/STM32F76xxI.ld
|
||||
|
||||
# Override DEFAULT_ENGINE_TYPE
|
||||
DDEFS += -DDEFAULT_ENGINE_TYPE=SUBARUEJ20G_DEFAULTS -DSTM32F765xx
|
|
@ -1,248 +0,0 @@
|
|||
/**
|
||||
* @file boards/subaru-ej20g/board_configuration.h
|
||||
*
|
||||
* @brief In this file we can override engine_configuration.cpp.
|
||||
*
|
||||
* @date Feb 19, 2019
|
||||
* @author Andrey Gusakov, 2019
|
||||
*/
|
||||
|
||||
#include "global.h"
|
||||
#include "engine.h"
|
||||
#include "engine_math.h"
|
||||
#include "allsensors.h"
|
||||
#include "fsio_impl.h"
|
||||
#include "engine_configuration.h"
|
||||
#include "smart_gpio.h"
|
||||
|
||||
EXTERN_ENGINE;
|
||||
|
||||
static void setSubaruEJ20GDefaults(DECLARE_ENGINE_PARAMETER_SIGNATURE) {
|
||||
setOperationMode(engineConfiguration, FOUR_STROKE_CAM_SENSOR);
|
||||
engineConfiguration->trigger.type = TT_TOOTHED_WHEEL_60_2;
|
||||
//engineConfiguration->useOnlyRisingEdgeForTrigger = true;
|
||||
setAlgorithm(LM_SPEED_DENSITY PASS_CONFIG_PARAMETER_SUFFIX);
|
||||
|
||||
engineConfiguration->specs.cylindersCount = 4;
|
||||
engineConfiguration->specs.firingOrder = FO_1_3_4_2;
|
||||
|
||||
engineConfiguration->ignitionMode = IM_INDIVIDUAL_COILS; // IM_WASTED_SPARK
|
||||
engineConfiguration->crankingInjectionMode = IM_SIMULTANEOUS;
|
||||
engineConfiguration->injectionMode = IM_SIMULTANEOUS;//IM_BATCH;// IM_SEQUENTIAL;
|
||||
|
||||
engineConfiguration->globalTriggerAngleOffset = 114; // the end of 19th tooth?
|
||||
|
||||
engineConfiguration->specs.displacement = 1.645;
|
||||
engineConfiguration->injector.flow = 200;
|
||||
|
||||
engineConfiguration->cranking.baseFuel = 5; // ???
|
||||
engineConfiguration->crankingChargeAngle = 70;
|
||||
engineConfiguration->cranking.rpm = 600;
|
||||
|
||||
engineConfiguration->rpmHardLimit = 8500;
|
||||
|
||||
engineConfiguration->map.sensor.type = MT_MPX4250;
|
||||
|
||||
engineConfiguration->idleStepperReactionTime = 10;
|
||||
engineConfiguration->stepperDirectionPinMode = OM_INVERTED;
|
||||
engineConfiguration->useLinearCltSensor = true;
|
||||
|
||||
//engineConfiguration->canNbcType = CAN_BUS_NBC_BMW;
|
||||
engineConfiguration->canNbcType = CAN_BUS_MAZDA_RX8;
|
||||
engineConfiguration->canReadEnabled = true;
|
||||
engineConfiguration->canWriteEnabled = false;
|
||||
|
||||
engineConfiguration->tpsMin = convertVoltageTo10bitADC(0.250);
|
||||
engineConfiguration->tpsMax = convertVoltageTo10bitADC(4.538);
|
||||
engineConfiguration->tpsErrorDetectionTooLow = -10; // -10% open
|
||||
engineConfiguration->tpsErrorDetectionTooHigh = 110; // 110% open
|
||||
|
||||
engineConfiguration->mapMinBufferLength = 4;
|
||||
}
|
||||
|
||||
void setPinConfigurationOverrides(void) {
|
||||
|
||||
}
|
||||
|
||||
void setSerialConfigurationOverrides(void) {
|
||||
engineConfiguration->useSerialPort = false;
|
||||
engineConfiguration->binarySerialTxPin = GPIOE_1;
|
||||
engineConfiguration->binarySerialRxPin = GPIOE_0;
|
||||
// engineConfiguration->consoleSerialTxPin = GPIOA_9;
|
||||
// engineConfiguration->consoleSerialRxPin = GPIOA_10;
|
||||
engineConfiguration->tunerStudioSerialSpeed = SERIAL_SPEED;
|
||||
engineConfiguration->uartConsoleSerialSpeed = SERIAL_SPEED;
|
||||
}
|
||||
|
||||
void setSdCardConfigurationOverrides(void) {
|
||||
engineConfiguration->is_enabled_spi_1 = false;
|
||||
engineConfiguration->sdCardSpiDevice = SPI_DEVICE_1;
|
||||
engineConfiguration->sdCardCsPin = GPIOA_2;
|
||||
CONFIG(isSdCardEnabled) = false;
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Board-specific configuration code overrides.
|
||||
* @todo Add your board-specific code, if any.
|
||||
*/
|
||||
void setBoardConfigurationOverrides(void) {
|
||||
setSerialConfigurationOverrides();
|
||||
|
||||
engineConfiguration->vbattAdcChannel = EFI_ADC_6;
|
||||
engineConfiguration->tps1_1AdcChannel = EFI_ADC_13;
|
||||
engineConfiguration->map.sensor.hwChannel = EFI_ADC_14;
|
||||
engineConfiguration->clt.adcChannel = EFI_ADC_8;
|
||||
/* not yet */
|
||||
engineConfiguration->iat.adcChannel = EFI_ADC_NONE;
|
||||
/* narrow */
|
||||
engineConfiguration->afr.hwChannel = EFI_ADC_9;
|
||||
|
||||
engineConfiguration->adcVcc = ADC_VCC;
|
||||
|
||||
engineConfiguration->baroSensor.hwChannel = EFI_ADC_NONE;
|
||||
engineConfiguration->throttlePedalPositionAdcChannel = EFI_ADC_NONE;
|
||||
|
||||
/* Injectors */
|
||||
engineConfiguration->injectionPins[0] = GPIOB_11;
|
||||
engineConfiguration->injectionPins[1] = GPIOA_0;
|
||||
engineConfiguration->injectionPins[2] = GPIOA_1;
|
||||
engineConfiguration->injectionPins[3] = GPIOB_10;
|
||||
/* 5th injector */
|
||||
//engineConfiguration->injectionPins[4] = GPIOD_15;
|
||||
|
||||
/* Ignition */
|
||||
engineConfiguration->ignitionPins[0] = GPIOB_8;
|
||||
engineConfiguration->ignitionPins[1] = GPIOB_9;
|
||||
engineConfiguration->ignitionPins[2] = GPIOF_8;
|
||||
engineConfiguration->ignitionPins[3] = GPIOF_9;
|
||||
//engineConfiguration->ignitionPinMode = OM_INVERTED;
|
||||
|
||||
//?
|
||||
//engineConfiguration->vbattDividerCoeff = ((float) (2 + 10)) / 2;
|
||||
//engineConfiguration->clt.config.bias_resistor = 2700;
|
||||
//sengineConfiguration->iat.config.bias_resistor = 2700;
|
||||
|
||||
//?
|
||||
//engineConfiguration->useStepperIdle = true;
|
||||
//engineConfiguration->idle.stepperDirectionPin = GPIOB_12;
|
||||
//engineConfiguration->idle.stepperStepPin = GPIOB_13;
|
||||
//engineConfiguration->stepperEnablePin = GPIO_UNASSIGNED;
|
||||
//engineConfiguration->stepperEnablePinMode = OM_DEFAULT;
|
||||
|
||||
engineConfiguration->communicationLedPin = GPIOG_6; /* LD2 - green */
|
||||
engineConfiguration->runningLedPin = GPIO_UNASSIGNED;
|
||||
engineConfiguration->warninigLedPin = GPIOG_8; /* LD3 - yellow*/
|
||||
//engineConfiguration->fatalErrorPin = LED_ERROR_BRAIN_PIN; /* LD1 - red */
|
||||
|
||||
/* IF you have BOTH camshaft position sensor and crankshaft position sensor
|
||||
* camshaft is always trigger#1 input and then crankshaft is trigger#2. */
|
||||
engineConfiguration->triggerInputPins[0] = GPIOC_8;
|
||||
engineConfiguration->triggerInputPins[1] = GPIOC_9;
|
||||
engineConfiguration->triggerInputPins[2] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->camInputs[0] = GPIO_UNASSIGNED;
|
||||
|
||||
/* spi driven - TLE6240 - OUT8, also direct driven by GPIOG_2 */
|
||||
engineConfiguration->tachOutputPin = TLE6240_PIN(0);
|
||||
engineConfiguration->tachOutputPinMode = OM_DEFAULT;
|
||||
/* spi driven - TLE6240 - OUT5 */
|
||||
engineConfiguration->fuelPumpPin = TLE6240_PIN(5);
|
||||
engineConfiguration->fuelPumpPinMode = OM_DEFAULT;
|
||||
/* self shutdownd? */
|
||||
engineConfiguration->mainRelayPin = GPIOG_4;
|
||||
engineConfiguration->mainRelayPinMode = OM_DEFAULT;
|
||||
/* spi driven - TLE6240 - OUT3, OUT4
|
||||
* TODO: second fan */
|
||||
engineConfiguration->fanPin = TLE6240_PIN(2);
|
||||
engineConfiguration->fanPinMode = OM_DEFAULT;
|
||||
/* spi driven - TLE6240 - OUT8 */
|
||||
engineConfiguration->malfunctionIndicatorPin = TLE6240_PIN(7);
|
||||
engineConfiguration->malfunctionIndicatorPinMode = OM_DEFAULT;
|
||||
|
||||
// starter block
|
||||
/* Starter signal connected through MC33972 - SG11 */
|
||||
//setFsio(0, (GPIOB_1), STARTER_RELAY_LOGIC PASS_CONFIG_PARAMETER_SUFFIX);
|
||||
|
||||
|
||||
// not used
|
||||
engineConfiguration->dizzySparkOutputPin = GPIO_UNASSIGNED;
|
||||
engineConfiguration->externalKnockSenseAdc = EFI_ADC_NONE;
|
||||
engineConfiguration->displayMode = DM_NONE;
|
||||
engineConfiguration->HD44780_rs = GPIO_UNASSIGNED;
|
||||
engineConfiguration->HD44780_e = GPIO_UNASSIGNED;
|
||||
engineConfiguration->HD44780_db4 = GPIO_UNASSIGNED;
|
||||
engineConfiguration->HD44780_db5 = GPIO_UNASSIGNED;
|
||||
engineConfiguration->HD44780_db6 = GPIO_UNASSIGNED;
|
||||
engineConfiguration->HD44780_db7 = GPIO_UNASSIGNED;
|
||||
engineConfiguration->digitalPotentiometerChipSelect[0] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->digitalPotentiometerChipSelect[1] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->digitalPotentiometerChipSelect[2] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->digitalPotentiometerChipSelect[3] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->vehicleSpeedSensorInputPin = GPIO_UNASSIGNED;
|
||||
|
||||
engineConfiguration->digitalPotentiometerSpiDevice = SPI_NONE;
|
||||
engineConfiguration->max31855spiDevice = SPI_NONE;
|
||||
|
||||
/////////////////////////////////////////////////////////
|
||||
|
||||
engineConfiguration->is_enabled_spi_1 = true;
|
||||
engineConfiguration->is_enabled_spi_2 = false;
|
||||
engineConfiguration->is_enabled_spi_3 = true;
|
||||
|
||||
engineConfiguration->spi1mosiPin = GPIO_UNASSIGNED;
|
||||
engineConfiguration->spi1MosiMode = PO_DEFAULT;
|
||||
engineConfiguration->spi1misoPin = GPIO_UNASSIGNED;
|
||||
engineConfiguration->spi1MisoMode = PO_DEFAULT;
|
||||
engineConfiguration->spi1sckPin = GPIO_UNASSIGNED;
|
||||
engineConfiguration->spi1SckMode = PO_DEFAULT;
|
||||
|
||||
engineConfiguration->spi3mosiPin = GPIOC_12;
|
||||
engineConfiguration->spi3MosiMode = PO_DEFAULT;
|
||||
engineConfiguration->spi3misoPin = GPIOC_11;
|
||||
engineConfiguration->spi3MisoMode = PO_DEFAULT;
|
||||
engineConfiguration->spi3sckPin = GPIOC_10;
|
||||
engineConfiguration->spi3SckMode = PO_DEFAULT;
|
||||
|
||||
engineConfiguration->hip9011SpiDevice = SPI_DEVICE_4;
|
||||
engineConfiguration->hip9011CsPin = GPIOF_1;
|
||||
engineConfiguration->hip9011CsPinMode = OM_OPENDRAIN;
|
||||
engineConfiguration->hip9011IntHoldPin = GPIOC_15;
|
||||
engineConfiguration->hip9011IntHoldPinMode = OM_OPENDRAIN;
|
||||
engineConfiguration->hipOutputChannel = EFI_ADC_7; // PA7
|
||||
engineConfiguration->isHip9011Enabled = true;
|
||||
|
||||
#if 0
|
||||
engineConfiguration->cj125SpiDevice = SPI_DEVICE_3;
|
||||
engineConfiguration->cj125ua = EFI_ADC_9;
|
||||
engineConfiguration->cj125ur = EFI_ADC_12;
|
||||
engineConfiguration->cj125CsPin = GPIOA_15;
|
||||
engineConfiguration->cj125CsPinMode = OM_OPENDRAIN;
|
||||
engineConfiguration->wboHeaterPin = GPIOC_13;
|
||||
engineConfiguration->o2heaterPin = GPIOC_13;
|
||||
#endif
|
||||
engineConfiguration->isCJ125Enabled = false;
|
||||
|
||||
engineConfiguration->canTxPin = GPIOD_0;
|
||||
engineConfiguration->canRxPin = GPIOD_1;
|
||||
|
||||
//!!!!!!!!!!!!!!!
|
||||
#if 1
|
||||
setSubaruEJ20GDefaults(PASS_ENGINE_PARAMETER_SIGNATURE);
|
||||
#endif
|
||||
/* actually i2c extension connector */
|
||||
engineConfiguration->triggerSimulatorPins[0] = GPIOF_14;
|
||||
engineConfiguration->triggerSimulatorPins[1] = GPIOF_15;
|
||||
engineConfiguration->triggerSimulatorPins[2] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->triggerSimulatorPinModes[0] = OM_DEFAULT;
|
||||
engineConfiguration->triggerSimulatorPinModes[1] = OM_DEFAULT;
|
||||
engineConfiguration->triggerSimulatorPinModes[2] = OM_DEFAULT;
|
||||
|
||||
engineConfiguration->logicAnalyzerPins[0] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->logicAnalyzerPins[1] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->logicAnalyzerPins[2] = GPIO_UNASSIGNED;
|
||||
engineConfiguration->logicAnalyzerPins[3] = GPIO_UNASSIGNED;
|
||||
//!!!!!!!!!!!!!!!!!!!
|
||||
//engineConfiguration->silentTriggerError = true;
|
||||
|
||||
//!!!!!!!!!!!!!
|
||||
//engineConfiguration->isEngineChartEnabled = false;
|
||||
}
|
|
@ -1,108 +0,0 @@
|
|||
/**
|
||||
* @file boards/subaruej20g/efifeatures.h
|
||||
*
|
||||
* @brief In this header we can override efifeatures.h.
|
||||
*
|
||||
* @date Feb 19, 2019
|
||||
* @author Andrey Gusakov, 2019
|
||||
*/
|
||||
|
||||
#include "../../stm32f7ems/efifeatures.h"
|
||||
|
||||
#pragma once
|
||||
|
||||
/* debug console */
|
||||
#undef EFI_USE_UART_FOR_CONSOLE
|
||||
#define EFI_USE_UART_FOR_CONSOLE TRUE
|
||||
#undef EFI_CONSOLE_SERIAL_DEVICE
|
||||
#define EFI_CONSOLE_SERIAL_DEVICE (&SD1)
|
||||
|
||||
/* TunerStudio binary protocol */
|
||||
/* do not use UART device for console */
|
||||
#undef TS_UART_DEVICE
|
||||
|
||||
/* do not use serial device for console */
|
||||
#undef TS_SERIAL_DEVICE
|
||||
|
||||
#undef EFI_RTC
|
||||
#define EFI_RTC FALSE
|
||||
|
||||
#undef EFI_POTENTIOMETER
|
||||
#define EFI_POTENTIOMETER FALSE
|
||||
|
||||
#undef EFI_MAX_31855
|
||||
#define EFI_MAX_31855 FALSE
|
||||
|
||||
#undef EFI_HD44780_LCD
|
||||
#define EFI_HD44780_LCD FALSE
|
||||
|
||||
#undef EFI_USB_SERIAL
|
||||
#define EFI_USB_SERIAL TRUE
|
||||
|
||||
#undef EFI_FUEL_PUMP
|
||||
#define EFI_FUEL_PUMP TRUE
|
||||
|
||||
#undef MMC_CARD_SPI
|
||||
#define MMC_CARD_SPI SPID1
|
||||
|
||||
#define ADC_CHANNEL_VREF ADC_CHANNEL_IN14
|
||||
|
||||
#undef EFI_UART_GPS
|
||||
#define EFI_UART_GPS FALSE
|
||||
|
||||
#undef EFI_BLUETOOTH_SETUP
|
||||
#define EFI_BLUETOOTH_SETUP FALSE
|
||||
|
||||
#undef SERIAL_SPEED
|
||||
#define SERIAL_SPEED 115200
|
||||
|
||||
#ifdef EFI_CONSOLE_SERIAL_DEVICE
|
||||
#undef EFI_CONSOLE_TX_BRAIN_PIN
|
||||
#define EFI_CONSOLE_TX_BRAIN_PIN GPIOA_9
|
||||
|
||||
#undef EFI_CONSOLE_RX_BRAIN_PIN
|
||||
#define EFI_CONSOLE_RX_BRAIN_PIN GPIOA_10
|
||||
|
||||
#undef EFI_CONSOLE_AF
|
||||
#define EFI_CONSOLE_AF 7
|
||||
#endif
|
||||
|
||||
#undef TS_SERIAL_AF
|
||||
#define TS_SERIAL_AF 8
|
||||
|
||||
/* Red */
|
||||
#undef LED_ERROR_BRAIN_PIN
|
||||
#define LED_ERROR_BRAIN_PIN GPIOG_7
|
||||
|
||||
/* no console switch */
|
||||
#undef CONSOLE_MODE_SWITCH_PORT
|
||||
#undef CONSOLE_MODE_SWITCH_PIN
|
||||
#define GET_CONSOLE_MODE_VALUE() (FALSE)
|
||||
|
||||
/* no reset switch */
|
||||
#undef CONFIG_RESET_SWITCH_PORT
|
||||
#undef CONFIG_RESET_SWITCH_PIN
|
||||
|
||||
//!!!!!!!!!!!!!!!
|
||||
//#undef EFI_INTERNAL_ADC
|
||||
//#define EFI_INTERNAL_ADC FALSE
|
||||
|
||||
#undef ADC_VCC
|
||||
#define ADC_VCC 2.5f
|
||||
|
||||
#undef EFI_MAIN_RELAY_CONTROL
|
||||
#define EFI_MAIN_RELAY_CONTROL TRUE
|
||||
|
||||
#undef EFI_MEMS
|
||||
#define EFI_MEMS FALSE
|
||||
|
||||
#undef EFI_IDLE_PID_CIC
|
||||
#define EFI_IDLE_PID_CIC TRUE
|
||||
|
||||
#define RPM_LOW_THRESHOLD 8 // RPM=8 is an empirical lower sensitivity threshold of MAX9926 for 60-2
|
||||
#define NO_RPM_EVENTS_TIMEOUT_SECS 5 // (RPM < 12)
|
||||
|
||||
#define EFI_PRINT_ERRORS_AS_WARNINGS TRUE
|
||||
|
||||
#define EFI_NARROW_EGO_AVERAGING TRUE
|
||||
|
|
@ -1,39 +0,0 @@
|
|||
/**
|
||||
* @file boards/subaruej20g/halconf.h
|
||||
*
|
||||
* @brief In this header we can override halconf.h.
|
||||
*
|
||||
* @date Feb 19, 2019
|
||||
* @author Andrey Gusakov, 2019
|
||||
*/
|
||||
|
||||
#include "mcuconf.h"
|
||||
#include "../../stm32f7ems/halconf.h"
|
||||
|
||||
#ifndef _HALCONF_SUBARUEJ20G_H_
|
||||
#define _HALCONF_SUBARUEJ20G_H_
|
||||
|
||||
#undef HAL_USE_PAL
|
||||
#define HAL_USE_PAL TRUE
|
||||
#undef PAL_USE_CALLBACKS
|
||||
#define PAL_USE_CALLBACKS TRUE
|
||||
|
||||
#undef HAL_USE_I2C
|
||||
#define HAL_USE_I2C FALSE
|
||||
|
||||
#undef HAL_USE_SERIAL
|
||||
#define HAL_USE_SERIAL TRUE
|
||||
|
||||
//#if TS_UART_DMA_MODE
|
||||
#undef HAL_USE_UART
|
||||
#define HAL_USE_UART TRUE
|
||||
#undef UART_USE_WAIT
|
||||
#define UART_USE_WAIT TRUE
|
||||
//#else
|
||||
//#define HAL_USE_UART FALSE
|
||||
//#endif
|
||||
|
||||
#undef HAL_USE_USB_MSD
|
||||
#define HAL_USE_USB_MSD FALSE
|
||||
|
||||
#endif /* _HALCONF_SUBARUEJ20G_H_ */
|
|
@ -1,11 +0,0 @@
|
|||
#!/bin/sh
|
||||
|
||||
export PROJECT_BOARD=subaru-ej20gn
|
||||
export PROJECT_CPU=ARCH_STM32F7
|
||||
export PROJECT_CORE=cortex-m7
|
||||
export EXTRA_PARAMS="-DDUMMY -DEFI_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_ASSERTS=FALSE -DCH_DBG_ENABLE_STACK_CHECK=FALSE -DCH_DBG_FILL_THREADS=FALSE -DCH_DBG_THREADS_PROFILING=FALSE"
|
||||
#echo $EXTRA_PARAMS
|
||||
#export DEBUG_LEVEL_OPT="-O0"
|
||||
#export USE_BOOTLOADER=yes
|
||||
|
||||
CROSS_COMPILE=../../toolchain/gcc-arm-none-eabi-8-2018-q4-major/bin/arm-none-eabi- make $*
|
|
@ -1,76 +0,0 @@
|
|||
/**
|
||||
* @file boards/subaruej20g/mcuconf.h
|
||||
*
|
||||
* @brief In this header we can override mcuconf.h.
|
||||
*
|
||||
* @date Feb 19, 2019
|
||||
* @author Andrey Gusakov, 2019
|
||||
*/
|
||||
|
||||
#include "../../stm32f7ems/mcuconf.h"
|
||||
|
||||
#ifndef _MCUCONF_SUBARUEJ20G_H_
|
||||
#define _MCUCONF_SUBARUEJ20G_H_
|
||||
|
||||
/* clocks adjust for 12 MHz ocs */
|
||||
#undef STM32_PLLM_VALUE
|
||||
#define STM32_PLLM_VALUE 12
|
||||
|
||||
//#undef CORTEX_ENABLE_WFI_IDLE
|
||||
#define CORTEX_ENABLE_WFI_IDLE FALSE
|
||||
|
||||
//#undef STM32_LSE_ENABLED
|
||||
//#define STM32_LSE_ENABLED FALSE
|
||||
|
||||
#undef STM32_RTCSEL
|
||||
#define STM32_RTCSEL STM32_RTCSEL_HSEDIV // STM32_RTCSEL_LSI
|
||||
|
||||
/* serials and uarts */
|
||||
#undef STM32_SERIAL_USE_USART1
|
||||
#undef STM32_UART_USE_USART1
|
||||
//#if TS_UART_DMA_MODE
|
||||
//#define STM32_SERIAL_USE_UART1 FALSE
|
||||
//#else
|
||||
#define STM32_SERIAL_USE_USART1 TRUE
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
//#endif
|
||||
|
||||
#undef STM32_SERIAL_USE_USART2
|
||||
#undef STM32_UART_USE_USART2
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART2 TRUE
|
||||
|
||||
#undef STM32_SERIAL_USE_USART3
|
||||
#undef STM32_UART_USE_USART3
|
||||
#define STM32_SERIAL_USE_USART3 FALSE
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
|
||||
#undef STM32_UART_USE_USART3
|
||||
#define STM32_UART_USE_USART3 FALSE
|
||||
|
||||
#undef STM32_UART_USE_UART4
|
||||
#define STM32_UART_USE_UART4 FALSE
|
||||
|
||||
#undef STM32_USB_USE_OTG1
|
||||
#define STM32_USB_USE_OTG1 TRUE
|
||||
|
||||
#undef STM32_USB_USE_USB1
|
||||
#define STM32_USB_USE_USB1 TRUE
|
||||
|
||||
#undef STM32_I2C_USE_I2C1
|
||||
#define STM32_I2C_USE_I2C1 FALSE
|
||||
|
||||
#undef STM32_SPI_USE_SPI2
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
|
||||
#undef STM32_SPI_USE_SPI4
|
||||
#define STM32_SPI_USE_SPI4 TRUE
|
||||
|
||||
#undef STM32_ICU_USE_TIM3
|
||||
#define STM32_ICU_USE_TIM3 TRUE
|
||||
|
||||
|
||||
//#undef STM32_CAN_CAN1_IRQ_PRIORITY
|
||||
//#define STM32_CAN_CAN1_IRQ_PRIORITY 4
|
||||
|
||||
#endif /* _MCUCONF_SUBARUEJ20G_H_ */
|
|
@ -1,7 +0,0 @@
|
|||
subaru EJ20G board.
|
||||
|
||||
https://rusefi.com/wiki/index.php?title=Vehicle:Subaru_Impreza_1991-1996
|
||||
https://github.com/dron0gus/rusefi
|
||||
|
||||
Cars:
|
||||
https://rusefi.com/forum/viewtopic.php?f=15&t=1096
|
Loading…
Reference in New Issue