rusefi-full/firmware/hw_layer/ports
Matthew Kennedy 15353ae3b2
auto detect HSE clock speed (#2952)
* detect hse

* implementation

* these boards don't need to set their own HSECLK

* assertions

* name

* tweaks

* how did this compile?

* s

* biiiig comment

* this script doesn't need to set 25mhz any more

* ....or PLLM

Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
2021-07-12 20:51:35 -04:00
..
cypress non blocking flash on f7 dual bank 2MB (#2749) 2021-05-29 08:05:29 +03:00
kinetis non blocking flash on f7 dual bank 2MB (#2749) 2021-05-29 08:05:29 +03:00
stm32 auto detect HSE clock speed (#2952) 2021-07-12 20:51:35 -04:00
chconf_common.h more graceful chibios assertion failure (#2859) 2021-07-05 18:18:58 -04:00
mpu_util.h non blocking flash on f7 dual bank 2MB (#2749) 2021-05-29 08:05:29 +03:00
rusefi_halconf.h multiple mass storage (#2535) 2021-04-10 08:35:41 -04:00