180 lines
2.9 KiB
C
180 lines
2.9 KiB
C
/*
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* @file config/boards/kinetis/rusefi_hw_enums.h
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*
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* @date Jun 2, 2019
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* @author Andrey Belomutskiy, (c) 2012-2020
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* @author andreika <prometheus.pcb@gmail.com>
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*/
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#pragma once
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// todo: migrate/unify with pin_output_mode_e? rename? something is messy here
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// this enum is currently only used for SPI pins
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typedef enum __attribute__ ((__packed__)) {
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// todo: here we have a rare example of stm32-specific enum, todo: make this not stm32 specific?
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PO_DEFAULT = 0,
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PO_OPENDRAIN = 4, // PAL_STM32_OTYPE_OPENDRAIN
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PO_PULLUP = 32, // PAL_STM32_PUDR_PULLUP
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PO_PULLDOWN = 64 // PAL_STM32_PUPDR_PULLDOWN
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} pin_mode_e;
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/**
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* Hardware pin. This enum is platform-specific.
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*/
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enum class Gpio : uint16_t {
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Unassigned = 0,
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Invalid = 1,
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A0 = 2,
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A1 = 3,
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A2 = 4,
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A3 = 5,
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A4 = 6,
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A5 = 7,
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A6 = 8,
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A7 = 9,
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A8 = 10,
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A9 = 11,
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A10 = 12,
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A11 = 13,
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A12 = 14,
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A13 = 15,
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A14 = 16,
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A15 = 17,
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A16 = 18,
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A17 = 19,
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B0 = 20,
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B1 = 21,
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B2 = 22,
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B3 = 23,
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B4 = 24,
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B5 = 25,
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B6 = 26,
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B7 = 27,
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B8 = 28,
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B9 = 29,
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B10 = 30,
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B11 = 31,
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B12 = 32,
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B13 = 33,
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B14 = 34,
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B15 = 35,
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B16 = 36,
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B17 = 37,
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C0 = 38,
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C1 = 39,
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C2 = 40,
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C3 = 41,
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C4 = 42,
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C5 = 43,
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C6 = 44,
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C7 = 45,
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C8 = 46,
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C9 = 47,
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C10 = 48,
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C11 = 49,
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C12 = 50,
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C13 = 51,
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C14 = 52,
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C15 = 53,
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C16 = 54,
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C17 = 55,
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D0 = 56,
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D1 = 57,
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D2 = 58,
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D3 = 59,
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D4 = 60,
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D5 = 61,
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D6 = 62,
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D7 = 63,
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D8 = 64,
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D9 = 65,
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D10 = 66,
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D11 = 67,
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D12 = 68,
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D13 = 69,
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D14 = 70,
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D15 = 71,
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D16 = 72,
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D17 = 73,
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E0 = 74,
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E1 = 75,
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E2 = 76,
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E3 = 77,
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E4 = 78,
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E5 = 79,
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E6 = 80,
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E7 = 81,
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E8 = 82,
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E9 = 83,
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E10 = 84,
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E11 = 85,
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E12 = 86,
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E13 = 87,
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E14 = 88,
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E15 = 89,
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E16 = 90,
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E17 = 91,
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// TLE6240 pins go right after on chips
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TLE6240_PIN_1 = 130,
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TLE6240_PIN_2 = 131,
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TLE6240_PIN_3 = 132,
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TLE6240_PIN_4 = 133,
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TLE6240_PIN_5 = 134,
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TLE6240_PIN_6 = 135,
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TLE6240_PIN_7 = 136,
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TLE6240_PIN_8 = 137,
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TLE6240_PIN_9 = 138,
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TLE6240_PIN_10 = 139,
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TLE6240_PIN_11 = 140,
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TLE6240_PIN_12 = 141,
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TLE6240_PIN_13 = 142,
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TLE6240_PIN_14 = 143,
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TLE6240_PIN_15 = 144,
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TLE6240_PIN_16 = 145,
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CAN_PIN_0 = 250,
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CAN_PIN_1 = 251,
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CAN_PIN_2 = 252,
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CAN_PIN_3 = 253,
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CAN_PIN_4 = 254,
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CAN_PIN_5 = 255,
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CAN_PIN_6 = 256,
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CAN_PIN_7 = 257,
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};
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/* Plase keep updating these defines */
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#define BRAIN_PIN_ONCHIP_LAST Gpio::E17
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#define BRAIN_PIN_ONCHIP_PINS (BRAIN_PIN_ONCHIP_LAST - Gpio::A0 + 1)
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#define BRAIN_PIN_LAST Gpio::TLE6240_PIN_16
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#define BRAIN_PIN_TOTAL_PINS (BRAIN_PIN_LAST - Gpio::A0 + 1)
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typedef enum __attribute__ ((__packed__)) {
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EFI_ADC_NONE = 0,
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EFI_ADC_0 = 1,
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EFI_ADC_1 = 2,
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EFI_ADC_2 = 3,
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EFI_ADC_3 = 4,
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EFI_ADC_4 = 5,
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EFI_ADC_5 = 6,
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EFI_ADC_6 = 7,
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EFI_ADC_7 = 8,
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EFI_ADC_8 = 9,
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EFI_ADC_9 = 10,
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EFI_ADC_10 = 11,
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EFI_ADC_11 = 12,
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EFI_ADC_12 = 13,
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EFI_ADC_13 = 14,
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EFI_ADC_14 = 15,
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EFI_ADC_15 = 16,
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EFI_ADC_LAST_CHANNEL = 17, // Please keep this in sync with the last valid channel index!
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EFI_ADC_ERROR = 50,
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} adc_channel_e;
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