openblt for SENT #116

This commit is contained in:
AlexRMach 2022-07-15 15:10:40 +03:00
parent 14a7f196ef
commit fcc4b48be0
7 changed files with 1068 additions and 0 deletions

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#!/bin/bash
BOARD=blue_pill \
USE_OPT="-O0 -ggdb -fomit-frame-pointer -falign-functions=16 -fsingle-precision-constant" \./common_make.sh

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#****************************************************************************************
#| Description: Makefile for GNU ARM Embedded toolchain.
#| File Name: makefile
#|
#|---------------------------------------------------------------------------------------
#| C O P Y R I G H T
#|---------------------------------------------------------------------------------------
#| Copyright (c) 2017 by Feaser http://www.feaser.com All rights reserved
#|
#|---------------------------------------------------------------------------------------
#| L I C E N S E
#|---------------------------------------------------------------------------------------
#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
#| modify it under the terms of the GNU General Public License as published by the Free
#| Software Foundation, either version 3 of the License, or (at your option) any later
#| version.
#|
#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
#| PURPOSE. See the GNU General Public License for more details.
#|
#| You have received a copy of the GNU General Public License along with OpenBLT. It
#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
#|
#****************************************************************************************
SHELL = sh
#|--------------------------------------------------------------------------------------|
#| Configure project name |
#|--------------------------------------------------------------------------------------|
BOARD?=sent_box
PROJ_NAME=openblt_$(BOARD)
#|--------------------------------------------------------------------------------------|
#| Configure OpenBLT path |
#|--------------------------------------------------------------------------------------|
OPENBLT_PATH=../../../ext/openblt/Target
#|--------------------------------------------------------------------------------------|
#| Configure tool path |
#|--------------------------------------------------------------------------------------|
# Compiler should be in PATH
#|--------------------------------------------------------------------------------------|
#| Collect project files |
#|--------------------------------------------------------------------------------------|
# Recursive wildcard function implementation. Example usages:
# $(call rwildcard, , *.c *.h)
# --> Returns all *.c and *.h files in the current directory and below
# $(call rwildcard, /lib/, *.c)
# --> Returns all *.c files in the /lib directory and below
rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)))
# Collect all application files in the current directory and its subdirectories, but
# exclude flash-layout.c as this one is directly included in a source file, when used.
PROJ_FILES = $(filter-out flash_layout.c, $(call rwildcard, , *.c *.h *.s))
# Collect bootloader core files
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/*.h)
# Collect bootloader port files
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/*.h)
# Collect bootloader port compiler specific files
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/GCC/*.c)
PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/GCC/*.h)
# reuse ST32F1xx HAL and CMSIS from one of OpenBLT exaples to avoid having copy in this git
PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_PATH)/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Boot/lib/CMSIS, *.c *.h *.s))
PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_PATH)/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Boot/lib/STM32F1xx_HAL_Driver/, *.c *.h *.s))
#|--------------------------------------------------------------------------------------|
#| Toolchain binaries |
#|--------------------------------------------------------------------------------------|
RM = rm
CC = $(TOOL_PATH)arm-none-eabi-gcc
LN = $(TOOL_PATH)arm-none-eabi-gcc
OC = $(TOOL_PATH)arm-none-eabi-objcopy
OD = $(TOOL_PATH)arm-none-eabi-objdump
AS = $(TOOL_PATH)arm-none-eabi-gcc
SZ = $(TOOL_PATH)arm-none-eabi-size
#|--------------------------------------------------------------------------------------|
#| Filter project files
#|--------------------------------------------------------------------------------------|
PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
#|--------------------------------------------------------------------------------------|
#| Set important path variables |
#|--------------------------------------------------------------------------------------|
VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
OBJ_PATH = obj
BIN_PATH = bin
INC_PATH += $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file))))))
LIB_PATH =
#|--------------------------------------------------------------------------------------|
#| Options for toolchain binaries |
#|--------------------------------------------------------------------------------------|
STDFLAGS = -mcpu=cortex-m3 -mthumb -std=gnu11 -fstack-usage -Wall -specs=nano.specs
STDFLAGS += -fdata-sections -ffunction-sections -Wall -g -Wno-strict-aliasing
OPTFLAGS = -Os
CFLAGS = $(STDFLAGS) $(OPTFLAGS)
CFLAGS += -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -DSTM32F103xB
CFLAGS += -D__weak="__attribute__((weak))" -D__packed="__attribute__((__packed__))"
CFLAGS += $(INC_PATH)
AFLAGS = $(CFLAGS)
LFLAGS = $(STDFLAGS) $(OPTFLAGS)
LFLAGS += -Wl,-script="STM32F103RB_FLASH.ld" -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map
LFLAGS += -Wl,--gc-sections $(LIB_PATH)
OFLAGS = -O srec
ODFLAGS = -x
SZFLAGS = -B -d
RMFLAGS = -f
#|--------------------------------------------------------------------------------------|
#| Specify library files |
#|--------------------------------------------------------------------------------------|
LIBS =
#|--------------------------------------------------------------------------------------|
#| Define targets |
#|--------------------------------------------------------------------------------------|
AOBJS = $(patsubst %.s,%.o,$(PROJ_ASRCS))
COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS))
#|--------------------------------------------------------------------------------------|
#| Make ALL |
#|--------------------------------------------------------------------------------------|
.PHONY: all
all: $(BIN_PATH)/$(PROJ_NAME).srec $(BIN_PATH)/$(PROJ_NAME).hex $(BIN_PATH)/$(PROJ_NAME).bin
$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf
@$(OC) $< $(OFLAGS) $@
@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
@echo +++ Summary of memory consumption:
@$(SZ) $(SZFLAGS) $<
@echo +++ Build complete [$(notdir $@)]
$(BIN_PATH)/$(PROJ_NAME).hex : $(BIN_PATH)/$(PROJ_NAME).elf
@mkdir -p $(@D)
@$(OC) -O ihex $< $@
$(BIN_PATH)/$(PROJ_NAME).bin : $(BIN_PATH)/$(PROJ_NAME).elf
@mkdir -p $(@D)
@$(OC) -O binary $< $@
$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS)
@echo +++ Linking [$(notdir $@)]
@mkdir -p $(BIN_PATH)
@$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS)
#|--------------------------------------------------------------------------------------|
#| Compile and assemble |
#|--------------------------------------------------------------------------------------|
$(AOBJS): %.o: %.s $(PROJ_CHDRS)
@mkdir -p $(OBJ_PATH)
@echo +++ Assembling [$(notdir $<)]
@$(AS) $(AFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
$(COBJS): %.o: %.c $(PROJ_CHDRS)
@mkdir -p $(OBJ_PATH)
@echo +++ Compiling [$(notdir $<)]
@$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
#|--------------------------------------------------------------------------------------|
#| Make CLEAN |
#|--------------------------------------------------------------------------------------|
.PHONY: clean
clean:
@echo +++ Cleaning build environment
@$(RM) $(RMFLAGS) $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file))
@$(RM) $(RMFLAGS) $(foreach file,$(COBJS),$(OBJ_PATH)/$(file))
@$(RM) $(RMFLAGS) $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file)))
@$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map
@$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).srec
@$(RM) $(RMFLAGS) -r $(OBJ_PATH)
@$(RM) $(RMFLAGS) -r $(BIN_PATH)
@echo +++ Clean complete

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#ifndef BLT_CONF_H
#define BLT_CONF_H
/****************************************************************************************
* C P U D R I V E R C O N F I G U R A T I O N
****************************************************************************************/
/* To properly initialize the baudrate clocks of the communication interface, typically
* the speed of the crystal oscillator and/or the speed at which the system runs is
* needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
* BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
* not dependent on the targets architecture, the byte ordering needs to be known.
* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects big endian mode and 0 selects
* little endian mode.
*
* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
* called the moment the user program is about to be started. This could be used to
* de-initialize application specific parts, for example to stop blinking an LED, etc.
*/
/** \brief Frequency of the external crystal oscillator. */
#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
/** \brief Desired system speed. */
#define BOOT_CPU_SYSTEM_SPEED_KHZ (48000)
/** \brief Motorola or Intel style byte ordering. */
#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
/** \brief Enable/disable hook function call right before user program start. */
#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
/****************************************************************************************
* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
****************************************************************************************/
/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
* in bits/second. Two CAN messages are reserved for communication with the host. The
* message identifier for sending data from the target to the host is configured with
* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
* BOOT_COM_CAN_RXMSG_ID. Note that an extended 29-bit CAN identifier is configured by
* OR-ing with mask 0x80000000. The maximum amount of data bytes in a message for data
* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
* CAN controller channel.
*
*/
/** \brief Enable/disable CAN transport layer. */
#define BOOT_COM_CAN_ENABLE (1)
/** \brief Configure the desired CAN baudrate. */
#define BOOT_COM_CAN_BAUDRATE (500000)
/** \brief Configure CAN message ID target->host. */
#define BOOT_COM_CAN_TX_MSG_ID (0x7E1 /*| 0x80000000*/)
/** \brief Configure number of bytes in the target->host CAN message. */
#define BOOT_COM_CAN_TX_MAX_DATA (8)
/** \brief Configure CAN message ID host->target. */
#define BOOT_COM_CAN_RX_MSG_ID (0x667 /*| 0x80000000*/)
/** \brief Configure number of bytes in the host->target CAN message. */
#define BOOT_COM_CAN_RX_MAX_DATA (8)
/** \brief Select the desired CAN peripheral as a zero based index. */
#define BOOT_COM_CAN_CHANNEL_INDEX (0)
/* The RS232 communication interface is selected by setting the BOOT_COM_RS232_ENABLE
* configurable to 1. Configurable BOOT_COM_RS232_BAUDRATE selects the communication speed
* in bits/second. The maximum amount of data bytes in a message for data transmission
* and reception is set through BOOT_COM_RS232_TX_MAX_DATA and BOOT_COM_RS232_RX_MAX_DATA,
* respectively. It is common for a microcontroller to have more than 1 UART interface
* on board. The zero-based BOOT_COM_RS232_CHANNEL_INDEX selects the UART interface.
*
*/
/** \brief Enable/disable UART transport layer. */
#define BOOT_COM_RS232_ENABLE (1)
/** \brief Configure the desired communication speed. */
#define BOOT_COM_RS232_BAUDRATE (115200)
/** \brief Configure number of bytes in the target->host data packet. */
#define BOOT_COM_RS232_TX_MAX_DATA (64)
/** \brief Configure number of bytes in the host->target data packet. */
#define BOOT_COM_RS232_RX_MAX_DATA (64)
/** \brief Select the desired UART peripheral as a zero based index. */
#define BOOT_COM_RS232_CHANNEL_INDEX (0)
/****************************************************************************************
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
****************************************************************************************/
/* It is possible to implement an application specific method to force the bootloader to
* stay active after a reset. Such a backdoor entry into the bootloader is desired in
* situations where the user program does not run properly and therefore cannot
* reactivate the bootloader. By enabling these hook functions, the application can
* implement the backdoor, which overrides the default backdoor entry that is programmed
* into the bootloader. When desired for security purposes, these hook functions can
* also be implemented in a way that disables the backdoor entry altogether.
*/
/** \brief Enable/disable the backdoor override hook functions. */
#define BOOT_BACKDOOR_HOOKS_ENABLE (0)
/****************************************************************************************
* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
****************************************************************************************/
/* The NVM driver typically supports erase and program operations of the internal memory
* present on the microcontroller. Through these hook functions the NVM driver can be
* extended to support additional memory types such as external flash memory and serial
* eeproms. The size of the internal memory in kilobytes is specified with configurable
* BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can
* be overridden with a application specific method by enabling configuration switch
* BOOT_NVM_CHECKSUM_HOOKS_ENABLE.
*/
/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */
#define BOOT_NVM_HOOKS_ENABLE (0)
/** \brief Configure the size of the default memory device (typically flash EEPROM). */
#define BOOT_NVM_SIZE_KB (128)
/** \brief Enable/disable hooks functions to override the user program checksum handling. */
#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
/****************************************************************************************
* F L A S H M E M O R Y D R I V E R C O N F I G U R A T I O N
****************************************************************************************/
/** \brief This microcontroller has a smaller vector table then the default STM32F1xx
* project as assumed in the bootloader's core. This means the user program has
* a different checksum location, because this one is added at the end of the
* user program's vector table.
*/
#define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1c)
/** \brief Enable support for a custom flash layout table. It is located in
* flash_layout.c. This was done because the default flashLayout[] table
* in the bootloader's core has more flash memory reserved for the bootloader
* than is needed for this demo.
*/
#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1)
/****************************************************************************************
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
****************************************************************************************/
/* The COP driver cannot be configured internally in the bootloader, because its use
* and configuration is application specific. The bootloader does need to service the
* watchdog in case it is used. When the application requires the use of a watchdog,
* set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
* hook functions.
*/
/** \brief Enable/disable the hook functions for controlling the watchdog. */
#define BOOT_COP_HOOKS_ENABLE (1)
/****************************************************************************************
* S E E D / K E Y S E C U R I T Y C O N F I G U R A T I O N
****************************************************************************************/
/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-
* rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming
* operations can be performed, access to this resource need to be unlocked.
* In the Microboot settings on tab "XCP Protection" you need to specify a DLL that
* implements the unlocking algorithm. The demo programs are configured for the (simple)
* algorithm in "libseednkey.dll". The source code for this DLL is available so it can be
* customized to your needs.
* During the unlock sequence, Microboot requests a seed from the bootloader, which is in
* the format of a byte array. Using this seed the unlock algorithm in the DLL computes
* a key, which is also a byte array, and sends this back to the bootloader. The
* bootloader then verifies this key to determine if programming and erase operations are
* permitted.
* After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()
* are called by the bootloader to obtain the seed and to verify the key, respectively.
*/
#define BOOT_XCP_SEED_KEY_ENABLE (0)
#endif /* BLT_CONF_H */
/*********************************** end of blt_conf.h *********************************/

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/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#include "led.h" /* module header */
#include "stm32f1xx.h" /* STM32 registers and drivers */
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
#include "../io/io_pins.h"
/****************************************************************************************
* Local data declarations
****************************************************************************************/
/** \brief Holds the desired LED blink interval time. */
static blt_int16u ledBlinkIntervalMs;
/************************************************************************************//**
** \brief Initializes the LED blink driver.
** \param interval_ms Specifies the desired LED blink interval time in milliseconds.
** \return none.
**
****************************************************************************************/
void LedBlinkInit(blt_int16u interval_ms)
{
LL_GPIO_InitTypeDef GPIO_InitStruct;
/* Configure GPIO pin for the LED. */
GPIO_InitStruct.Pin = LL_LED_BLUE_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(LED_BLUE_PORT, &GPIO_InitStruct);
LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LL_LED_BLUE_PIN);
/* store the interval time between LED toggles */
ledBlinkIntervalMs = interval_ms;
} /*** end of LedBlinkInit ***/
/************************************************************************************//**
** \brief Task function for blinking the LED as a fixed timer interval.
** \return none.
**
****************************************************************************************/
void LedBlinkTask(void)
{
static blt_bool ledOn = BLT_FALSE;
static blt_int32u nextBlinkEvent = 0;
/* check for blink event */
if (TimerGet() >= nextBlinkEvent)
{
/* toggle the LED state */
if (ledOn == BLT_FALSE)
{
ledOn = BLT_TRUE;
LL_GPIO_SetOutputPin(LED_BLUE_PORT,LL_LED_BLUE_PIN);
}
else
{
ledOn = BLT_FALSE;
LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LL_LED_BLUE_PIN);
}
/* schedule the next blink event */
nextBlinkEvent = TimerGet() + ledBlinkIntervalMs;
}
} /*** end of LedBlinkTask ***/
/************************************************************************************//**
** \brief Cleans up the LED blink driver. This is intended to be used upon program
** exit.
** \return none.
**
****************************************************************************************/
void LedBlinkExit(void)
{
/* turn the LED off */
LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LL_LED_BLUE_PIN);
} /*** end of LedBlinkExit ***/
/*********************************** end of led.c **************************************/

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#ifndef LED_H
#define LED_H
/****************************************************************************************
* Function prototypes
****************************************************************************************/
void LedBlinkInit(blt_int16u interval_ms);
void LedBlinkTask(void);
void LedBlinkExit(void);
#endif /* LED_H */
/*********************************** end of led.h **************************************/

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/****************************************************************************************
* Include files
****************************************************************************************/
#include "boot.h" /* bootloader generic header */
#include "stm32f1xx.h" /* STM32 registers and drivers */
#include "stm32f1xx_ll_rcc.h" /* STM32 LL RCC header */
#include "stm32f1xx_ll_bus.h" /* STM32 LL BUS header */
#include "stm32f1xx_ll_system.h" /* STM32 LL SYSTEM header */
#include "stm32f1xx_ll_utils.h" /* STM32 LL UTILS header */
#include "stm32f1xx_ll_usart.h" /* STM32 LL USART header */
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
#include "../io/io_pins.h"
/****************************************************************************************
* Function prototypes
****************************************************************************************/
static void Init(void);
static void SystemClock_Config(void);
/************************************************************************************//**
** \brief This is the entry point for the bootloader application and is called
** by the reset interrupt vector after the C-startup routines executed.
** \return Program return code.
**
****************************************************************************************/
int main(void)
{
/* initialize the microcontroller */
Init();
#if 0
/* Configure GPIO pin for the LED. */
LL_GPIO_InitTypeDef GPIO_InitStruct;
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC);
GPIO_InitStruct.Pin = LL_LED_BLUE_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(LED_BLUE_PORT, &GPIO_InitStruct);
LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LL_LED_BLUE_PIN);
#endif
/* initialize the bootloader */
BootInit();
#if 0
LL_GPIO_InitTypeDef GPIO_InitStruct;
/* Configure GPIO pin for the LED. */
GPIO_InitStruct.Pin = LL_LED_BLUE_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(LED_BLUE_PORT, &GPIO_InitStruct);
LL_GPIO_ResetOutputPin(LED_BLUE_PORT, LL_LED_BLUE_PIN);
#endif
/* start the infinite program loop */
while (1)
{
/* run the bootloader task */
BootTask();
}
/* program should never get here */
return 0;
} /*** end of main ***/
/************************************************************************************//**
** \brief Initializes the microcontroller.
** \return none.
**
****************************************************************************************/
static void Init(void)
{
/* HAL library initialization */
HAL_Init();
/* configure system clock */
SystemClock_Config();
} /*** end of Init ***/
/************************************************************************************//**
** \brief System Clock Configuration. This code was created by CubeMX and configures
** the system clock to match the configuration in the bootloader's
** configuration (blt_conf.h), specifically the macros:
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
** subsystem.
** \return none.
**
****************************************************************************************/
static void SystemClock_Config(void)
{
/* Set flash latency. */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
if (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
{
/* Error setting flash latency. */
ASSERT_RT(BLT_FALSE);
}
/* Enable the HSI clock. */
LL_RCC_HSI_Enable();
/* Wait till HSE is ready. */
while (LL_RCC_HSI_IsReady() != 1)
{
;
}
/* Configure and enable the PLL. */
/* 48MHz max */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, LL_RCC_PLL_MUL_12);
LL_RCC_PLL_Enable();
/* Wait till PLL is ready. */
while (LL_RCC_PLL_IsReady() != 1)
{
;
}
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
/* Wait till System clock is ready. */
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
;
}
/* Update the system clock speed setting. */
LL_SetSystemCoreClock(BOOT_CPU_SYSTEM_SPEED_KHZ * 1000u);
} /*** end of SystemClock_Config ***/
/************************************************************************************//**
** \brief Initializes the Global MSP. This function is called from HAL_Init()
** function to perform system level initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspInit(void)
{
LL_GPIO_InitTypeDef GPIO_InitStruct;
/* AFIO and PWR clock enable. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
/* GPIO ports clock enable. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC);
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART clock enable. */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
/* UART TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = LL_UART_TX_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
LL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_UART_RX_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
LL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
#endif
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN clock enable. */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CAN1);
/* CAN TX and RX GPIO pin configuration. */
GPIO_InitStruct.Pin = LL_CAN_TX_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
LL_GPIO_Init(CAN_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_CAN_RX_PIN;
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
LL_GPIO_Init(CAN_GPIO_PORT, &GPIO_InitStruct);
#endif
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
/* Configure GPIO pin for (optional) backdoor entry input. */
GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
#endif
} /*** end of HAL_MspInit ***/
/************************************************************************************//**
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
** function to perform system level de-initialization (GPIOs, clock, DMA,
** interrupt).
** \return none.
**
****************************************************************************************/
void HAL_MspDeInit(void)
{
/* Reset the RCC clock configuration to the default reset state. */
LL_RCC_DeInit();
/* Deinit used GPIOs. */
LL_GPIO_DeInit(GPIOB);
LL_GPIO_DeInit(GPIOA);
#if (BOOT_COM_CAN_ENABLE > 0)
/* CAN clock disable. */
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_CAN1);
#endif
#if (BOOT_COM_RS232_ENABLE > 0)
/* UART clock disable. */
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_USART1);
#endif
/* GPIO ports clock disable. */
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOB);
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOA);
/* AFIO and PWR clock disable. */
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_AFIO);
} /*** end of HAL_MspDeInit ***/
/*********************************** end of main.c *************************************/

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@ -0,0 +1,379 @@
/**
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
* @file startup_stm32f103xb.s
* @author MCD Application Team
* @version V4.2.0
* @date 31-March-2017
* @brief STM32F103xB Devices vector table for Atollic toolchain.
* This module performs:
* - Set the initial SP
* - Set the initial PC == Reset_Handler,
* - Set the vector table entries with the exceptions ISR address
* - Configure the clock system
* - Branches to main in the C library (which eventually
* calls main()).
* After Reset the Cortex-M3 processor is in Thread mode,
* priority is Privileged, and the Stack is set to Main.
******************************************************************************
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
.syntax unified
.cpu cortex-m3
.fpu softvfp
.thumb
.global g_pfnVectors
.global Default_Handler
/* start address for the initialization values of the .data section.
defined in linker script */
.word _sidata
/* start address for the .data section. defined in linker script */
.word _sdata
/* end address for the .data section. defined in linker script */
.word _edata
/* start address for the .bss section. defined in linker script */
.word _sbss
/* end address for the .bss section. defined in linker script */
.word _ebss
.equ BootRAM, 0xF108F85F
/**
* @brief This is the code that gets called when the processor first
* starts execution following a reset event. Only the absolutely
* necessary set is performed, after which the application
* supplied main() routine is called.
* @param None
* @retval : None
*/
.section .text.Reset_Handler
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
movs r1, #0
b LoopCopyDataInit
CopyDataInit:
ldr r3, =_sidata
ldr r3, [r3, r1]
str r3, [r0, r1]
adds r1, r1, #4
LoopCopyDataInit:
ldr r0, =_sdata
ldr r3, =_edata
adds r2, r0, r1
cmp r2, r3
bcc CopyDataInit
ldr r2, =_sbss
b LoopFillZerobss
/* Zero fill the bss segment. */
FillZerobss:
movs r3, #0
str r3, [r2], #4
LoopFillZerobss:
ldr r3, = _ebss
cmp r2, r3
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
/* Call static constructors */
bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
.size Reset_Handler, .-Reset_Handler
/**
* @brief This is the code that gets called when the processor receives an
* unexpected interrupt. This simply enters an infinite loop, preserving
* the system state for examination by a debugger.
*
* @param None
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
.size Default_Handler, .-Default_Handler
/******************************************************************************
*
* The minimal vector table for a Cortex M3. Note that the proper constructs
* must be placed on this to ensure that it ends up at physical address
* 0x0000.0000.
*
******************************************************************************/
.section .isr_vector,"a",%progbits
.type g_pfnVectors, %object
.size g_pfnVectors, .-g_pfnVectors
g_pfnVectors:
.word _estack
.word Reset_Handler
.word NMI_Handler
.word HardFault_Handler
.word MemManage_Handler
.word BusFault_Handler
.word UsageFault_Handler
.word 0
.word 0
.word 0
.word 0
.word SVC_Handler
.word DebugMon_Handler
.word 0
.word PendSV_Handler
.word SysTick_Handler
.word WWDG_IRQHandler
.word PVD_IRQHandler
.word TAMPER_IRQHandler
.word RTC_IRQHandler
.word FLASH_IRQHandler
.word RCC_IRQHandler
.word EXTI0_IRQHandler
.word EXTI1_IRQHandler
.word EXTI2_IRQHandler
.word EXTI3_IRQHandler
.word EXTI4_IRQHandler
.word DMA1_Channel1_IRQHandler
.word DMA1_Channel2_IRQHandler
.word DMA1_Channel3_IRQHandler
.word DMA1_Channel4_IRQHandler
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
.word ADC1_2_IRQHandler
.word USB_HP_CAN1_TX_IRQHandler
.word USB_LP_CAN1_RX0_IRQHandler
.word CAN1_RX1_IRQHandler
.word CAN1_SCE_IRQHandler
.word EXTI9_5_IRQHandler
.word TIM1_BRK_IRQHandler
.word TIM1_UP_IRQHandler
.word TIM1_TRG_COM_IRQHandler
.word TIM1_CC_IRQHandler
.word TIM2_IRQHandler
.word TIM3_IRQHandler
.word TIM4_IRQHandler
.word I2C1_EV_IRQHandler
.word I2C1_ER_IRQHandler
.word I2C2_EV_IRQHandler
.word I2C2_ER_IRQHandler
.word SPI1_IRQHandler
.word SPI2_IRQHandler
.word USART1_IRQHandler
.word USART2_IRQHandler
.word USART3_IRQHandler
.word EXTI15_10_IRQHandler
.word RTC_Alarm_IRQHandler
.word USBWakeUp_IRQHandler
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word 0
.word BootRAM /* @0x108. This is for boot in RAM mode for
STM32F10x Medium Density devices. */
/*******************************************************************************
*
* Provide weak aliases for each Exception handler to the Default_Handler.
* As they are weak aliases, any function with the same name will override
* this definition.
*
*******************************************************************************/
.weak NMI_Handler
.thumb_set NMI_Handler,Default_Handler
.weak HardFault_Handler
.thumb_set HardFault_Handler,Default_Handler
.weak MemManage_Handler
.thumb_set MemManage_Handler,Default_Handler
.weak BusFault_Handler
.thumb_set BusFault_Handler,Default_Handler
.weak UsageFault_Handler
.thumb_set UsageFault_Handler,Default_Handler
.weak SVC_Handler
.thumb_set SVC_Handler,Default_Handler
.weak DebugMon_Handler
.thumb_set DebugMon_Handler,Default_Handler
.weak PendSV_Handler
.thumb_set PendSV_Handler,Default_Handler
.weak SysTick_Handler
.thumb_set SysTick_Handler,Default_Handler
.weak WWDG_IRQHandler
.thumb_set WWDG_IRQHandler,Default_Handler
.weak PVD_IRQHandler
.thumb_set PVD_IRQHandler,Default_Handler
.weak TAMPER_IRQHandler
.thumb_set TAMPER_IRQHandler,Default_Handler
.weak RTC_IRQHandler
.thumb_set RTC_IRQHandler,Default_Handler
.weak FLASH_IRQHandler
.thumb_set FLASH_IRQHandler,Default_Handler
.weak RCC_IRQHandler
.thumb_set RCC_IRQHandler,Default_Handler
.weak EXTI0_IRQHandler
.thumb_set EXTI0_IRQHandler,Default_Handler
.weak EXTI1_IRQHandler
.thumb_set EXTI1_IRQHandler,Default_Handler
.weak EXTI2_IRQHandler
.thumb_set EXTI2_IRQHandler,Default_Handler
.weak EXTI3_IRQHandler
.thumb_set EXTI3_IRQHandler,Default_Handler
.weak EXTI4_IRQHandler
.thumb_set EXTI4_IRQHandler,Default_Handler
.weak DMA1_Channel1_IRQHandler
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
.weak DMA1_Channel2_IRQHandler
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
.weak DMA1_Channel3_IRQHandler
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
.weak DMA1_Channel4_IRQHandler
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
.weak DMA1_Channel5_IRQHandler
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
.weak DMA1_Channel6_IRQHandler
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
.weak ADC1_2_IRQHandler
.thumb_set ADC1_2_IRQHandler,Default_Handler
.weak USB_HP_CAN1_TX_IRQHandler
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
.weak USB_LP_CAN1_RX0_IRQHandler
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
.weak CAN1_RX1_IRQHandler
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
.weak CAN1_SCE_IRQHandler
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
.weak TIM1_BRK_IRQHandler
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
.weak TIM1_UP_IRQHandler
.thumb_set TIM1_UP_IRQHandler,Default_Handler
.weak TIM1_TRG_COM_IRQHandler
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
.weak TIM1_CC_IRQHandler
.thumb_set TIM1_CC_IRQHandler,Default_Handler
.weak TIM2_IRQHandler
.thumb_set TIM2_IRQHandler,Default_Handler
.weak TIM3_IRQHandler
.thumb_set TIM3_IRQHandler,Default_Handler
.weak TIM4_IRQHandler
.thumb_set TIM4_IRQHandler,Default_Handler
.weak I2C1_EV_IRQHandler
.thumb_set I2C1_EV_IRQHandler,Default_Handler
.weak I2C1_ER_IRQHandler
.thumb_set I2C1_ER_IRQHandler,Default_Handler
.weak I2C2_EV_IRQHandler
.thumb_set I2C2_EV_IRQHandler,Default_Handler
.weak I2C2_ER_IRQHandler
.thumb_set I2C2_ER_IRQHandler,Default_Handler
.weak SPI1_IRQHandler
.thumb_set SPI1_IRQHandler,Default_Handler
.weak SPI2_IRQHandler
.thumb_set SPI2_IRQHandler,Default_Handler
.weak USART1_IRQHandler
.thumb_set USART1_IRQHandler,Default_Handler
.weak USART2_IRQHandler
.thumb_set USART2_IRQHandler,Default_Handler
.weak USART3_IRQHandler
.thumb_set USART3_IRQHandler,Default_Handler
.weak EXTI15_10_IRQHandler
.thumb_set EXTI15_10_IRQHandler,Default_Handler
.weak RTC_Alarm_IRQHandler
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
.weak USBWakeUp_IRQHandler
.thumb_set USBWakeUp_IRQHandler,Default_Handler
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/