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#381 progress 

find_cygwin . -type f -print0 | xargs -0 dos2unix
This commit is contained in:
rusefi 2017-03-24 13:49:18 -04:00
parent 7d30cf8b88
commit e8e4bd7213
42 changed files with 25652 additions and 25652 deletions
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284
misc/build_current_bundle.bat
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rem rem
rem This script would compile firmware, dev console and win32 simulator into a single bundle file rem This script would compile firmware, dev console and win32 simulator into a single bundle file
rem This script depends on Cygwin tools: zip rem This script depends on Cygwin tools: zip
rem rem
echo Hello rusEfi build full bundle echo Hello rusEfi build full bundle
java -version java -version
echo %date% %time% echo %date% %time%
echo Building win32 functional tests echo Building win32 functional tests
cd win32_functional_tests cd win32_functional_tests
gcc -v gcc -v
make -v make -v
cd .. cd ..
cd firmware cd firmware
echo %date% %time% echo %date% %time%
echo "CD to ${PWD}" echo "CD to ${PWD}"
echo Building firmware echo Building firmware
rm -fR .dep rm -fR .dep
rm -fR build rm -fR build
java -jar ../java_tools/version2header.jar java -jar ../java_tools/version2header.jar
call clean_compile_two_versions.bat call clean_compile_two_versions.bat
if not exist deliver/rusefi_release.hex echo FAILED RELEASE if not exist deliver/rusefi_release.hex echo FAILED RELEASE
if not exist deliver/rusefi_release.hex exit -1 if not exist deliver/rusefi_release.hex exit -1
if not exist deliver/rusefi_debug.hex echo FAILED DEBUG if not exist deliver/rusefi_debug.hex echo FAILED DEBUG
if not exist deliver/rusefi_debug.hex exit -1 if not exist deliver/rusefi_debug.hex exit -1
cd .. cd ..
echo Building java console echo Building java console
cd java_console cd java_console
call ant clean call ant clean
call ant call ant
cd .. cd ..
if not exist java_console_binary/rusefi_console.jar echo CONSOLE COMPILATION FAILED if not exist java_console_binary/rusefi_console.jar echo CONSOLE COMPILATION FAILED
if not exist java_console_binary/rusefi_console.jar exit -1 if not exist java_console_binary/rusefi_console.jar exit -1
echo Building rusefi simulator echo Building rusefi simulator
cd win32_functional_tests cd win32_functional_tests
mkdir out mkdir out
rm -rf build rm -rf build
rm -rf .dep rm -rf .dep
call compile.bat call compile.bat
if not exist build/rusefi_simulator.exe echo SIMULATOR COMPILATION FAILED if not exist build/rusefi_simulator.exe echo SIMULATOR COMPILATION FAILED
if not exist build/rusefi_simulator.exe exit -1 if not exist build/rusefi_simulator.exe exit -1
cd .. cd ..
rm -rf temp rm -rf temp
mkdir temp mkdir temp
set folder=snapshot_%date:~10%%date:~4,2%%date:~7,2%_%time:~0,2%%time:~3,2%_rusefi set folder=snapshot_%date:~10%%date:~4,2%%date:~7,2%_%time:~0,2%%time:~3,2%_rusefi
set folder=temp\%folder% set folder=temp\%folder%
# this replaces spaces with 0s - that's needed before 10am # this replaces spaces with 0s - that's needed before 10am
set folder=%folder: =0% set folder=%folder: =0%
echo Working folder: echo Working folder:
echo %folder% echo %folder%
mkdir %folder% mkdir %folder%
cp java_console_binary/rusefi_console.jar %folder% cp java_console_binary/rusefi_console.jar %folder%
cp win32_functional_tests/build/rusefi_simulator.exe %folder% cp win32_functional_tests/build/rusefi_simulator.exe %folder%
cp firmware/tunerstudio/rusefi.ini %folder% cp firmware/tunerstudio/rusefi.ini %folder%
cp firmware/svnversion.h %folder% cp firmware/svnversion.h %folder%
cp -r misc/install/openocd %folder% cp -r misc/install/openocd %folder%
cp java_console/rusefi.xml %folder% cp java_console/rusefi.xml %folder%
cp firmware/deliver/rusefi_release.* %folder% cp firmware/deliver/rusefi_release.* %folder%
cp firmware/deliver/rusefi_debug.* %folder% cp firmware/deliver/rusefi_debug.* %folder%
cp misc/console_launcher/rusefi_console.exe %folder% cp misc/console_launcher/rusefi_console.exe %folder%
cd temp cd temp
echo "Please copy find.exe to findcyg.exe in cygwin folder" echo "Please copy find.exe to findcyg.exe in cygwin folder"
findcyg . -name '.svn' > folders_to_delete.txt findcyg . -name '.svn' > folders_to_delete.txt
echo "Deleting .svn" echo "Deleting .svn"
xargs rm -rf < folders_to_delete.txt xargs rm -rf < folders_to_delete.txt
echo "Deleted .svn" echo "Deleted .svn"
rm -rf folders_to_delete.txt rm -rf folders_to_delete.txt
echo "Building bundle" echo "Building bundle"
pwd pwd
zip -r rusefi_bundle.zip * zip -r rusefi_bundle.zip *
echo "Bundle ready" echo "Bundle ready"
cd .. cd ..
echo "We are back in root directory" echo "We are back in root directory"
pwd pwd
echo "Building only console" echo "Building only console"
cd %folder% cd %folder%
pwd pwd
dir dir
zip ../rusefi_console.zip rusefi_console.jar rusefi.xml zip ../rusefi_console.zip rusefi_console.jar rusefi.xml
if not exist ../rusefi_console.zip echo CONSOLE ZIP FAILED if not exist ../rusefi_console.zip echo CONSOLE ZIP FAILED
if not exist ../rusefi_console.zip exit -1 if not exist ../rusefi_console.zip exit -1
echo "only console ready" echo "only console ready"
echo "Going back to root folder" echo "Going back to root folder"
cd .. cd ..
cd .. cd ..
pwd pwd
echo "Making rusefi_simulator.zip" echo "Making rusefi_simulator.zip"
pwd pwd
zip -j temp/rusefi_simulator.zip win32_functional_tests/build/rusefi_simulator.exe firmware/tunerstudio/rusefi.ini java_console_binary/rusefi_console.jar zip -j temp/rusefi_simulator.zip win32_functional_tests/build/rusefi_simulator.exe firmware/tunerstudio/rusefi.ini java_console_binary/rusefi_console.jar
echo open ftp://u71977750-build:%RUSEFI_BUILD_FTP_PASS%@rusefi.com/ > ftp_commands.txt echo open ftp://u71977750-build:%RUSEFI_BUILD_FTP_PASS%@rusefi.com/ > ftp_commands.txt
echo binary >> ftp_commands.txt echo binary >> ftp_commands.txt
echo put rusefi_bundle.zip >> ftp_commands.txt echo put rusefi_bundle.zip >> ftp_commands.txt
echo cd separate_files >> ftp_commands.txt echo cd separate_files >> ftp_commands.txt
echo put rusefi_simulator.zip >> ftp_commands.txt echo put rusefi_simulator.zip >> ftp_commands.txt
echo put rusefi_console.zip >> ftp_commands.txt echo put rusefi_console.zip >> ftp_commands.txt
echo exit >> ftp_commands.txt echo exit >> ftp_commands.txt
cd temp cd temp
call winscp.com /script=../ftp_commands.txt call winscp.com /script=../ftp_commands.txt
IF NOT ERRORLEVEL 0 echo winscp error DETECTED IF NOT ERRORLEVEL 0 echo winscp error DETECTED
IF NOT ERRORLEVEL 0 EXIT /B 1 IF NOT ERRORLEVEL 0 EXIT /B 1
cd .. cd ..
echo %date% %time% echo %date% %time%
echo "build_current_bundle: DONE here" echo "build_current_bundle: DONE here"
pwd pwd

4634
misc/chibi_contr/ch.ewp
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1680
misc/chibi_contr/ch.ewp.patch
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16984
misc/chibi_contr/misra_1998_report.txt
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16252
misc/chibi_contr/misra_2004_report.txt
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102
misc/git2svn.bat
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echo This script should be executed from the root of rusEfi master GITHUB local copy echo This script should be executed from the root of rusEfi master GITHUB local copy
pwd pwd
echo Updating from SVN echo Updating from SVN
call git fetch --all call git fetch --all
call git reset --hard origin/master call git reset --hard origin/master
IF NOT ERRORLEVEL echo ERROR git pull-ing IF NOT ERRORLEVEL echo ERROR git pull-ing
IF NOT ERRORLEVEL 0 EXIT /B 1 IF NOT ERRORLEVEL 0 EXIT /B 1
set RUSEFI_SVN_PATH=../../svn/ set RUSEFI_SVN_PATH=../../svn/
set RUSEFI_SVN_W_PATH=..\..\svn set RUSEFI_SVN_W_PATH=..\..\svn
set RUSEFI_GIT_PATH=../git/rusefi set RUSEFI_GIT_PATH=../git/rusefi
cd %RUSEFI_SVN_PATH% cd %RUSEFI_SVN_PATH%
svn up svn up
cd %RUSEFI_GIT_PATH% cd %RUSEFI_GIT_PATH%
ls -l %RUSEFI_SVN_PATH% ls -l %RUSEFI_SVN_PATH%
rd /s /q %RUSEFI_SVN_W_PATH%\firmware rd /s /q %RUSEFI_SVN_W_PATH%\firmware
rd /s /q %RUSEFI_SVN_W_PATH%\hardware rd /s /q %RUSEFI_SVN_W_PATH%\hardware
rd /s /q %RUSEFI_SVN_W_PATH%\java_console rd /s /q %RUSEFI_SVN_W_PATH%\java_console
rd /s /q %RUSEFI_SVN_W_PATH%\unit_tests rd /s /q %RUSEFI_SVN_W_PATH%\unit_tests
rd /s /q %RUSEFI_SVN_W_PATH%\misc rd /s /q %RUSEFI_SVN_W_PATH%\misc
rd /s /q %RUSEFI_SVN_W_PATH%\win32_functional_tests rd /s /q %RUSEFI_SVN_W_PATH%\win32_functional_tests
cp -r firmware %RUSEFI_SVN_PATH% cp -r firmware %RUSEFI_SVN_PATH%
cp -r hardware %RUSEFI_SVN_PATH% cp -r hardware %RUSEFI_SVN_PATH%
cp -r java_console %RUSEFI_SVN_PATH% cp -r java_console %RUSEFI_SVN_PATH%
cp -r unit_tests %RUSEFI_SVN_PATH% cp -r unit_tests %RUSEFI_SVN_PATH%
cp -r misc %RUSEFI_SVN_PATH% cp -r misc %RUSEFI_SVN_PATH%
cp -r win32_functional_tests %RUSEFI_SVN_PATH% cp -r win32_functional_tests %RUSEFI_SVN_PATH%
rem rm -f %RUSEFI_GIT_PATH%/readme.* rem rm -f %RUSEFI_GIT_PATH%/readme.*
rem rm -f %RUSEFI_GIT_PATH%/README.* rem rm -f %RUSEFI_GIT_PATH%/README.*
cp -r README.* %RUSEFI_SVN_PATH% cp -r README.* %RUSEFI_SVN_PATH%
cp -r readme.* %RUSEFI_SVN_PATH% cp -r readme.* %RUSEFI_SVN_PATH%
cd %RUSEFI_SVN_PATH% cd %RUSEFI_SVN_PATH%
pwd pwd
rem http://stackoverflow.com/questions/2120844/how-do-i-add-all-new-files-to-svn rem http://stackoverflow.com/questions/2120844/how-do-i-add-all-new-files-to-svn
svn add --force . svn add --force .
svn ci --no-auth-cache --non-interactive --username rusefi --password %RUSEFI_SVN_PASSWORD% -m "auto-merge from github" svn ci --no-auth-cache --non-interactive --username rusefi --password %RUSEFI_SVN_PASSWORD% -m "auto-merge from github"

32
misc/git2svn_init.bat
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set GIT2SVN_ROOT=c:\stuff\rusefi.git2svn set GIT2SVN_ROOT=c:\stuff\rusefi.git2svn
set RUSEFI_SVN_PATH=%GIT2SVN_ROOT%\svn set RUSEFI_SVN_PATH=%GIT2SVN_ROOT%\svn
set RUSEFI_GIT_PATH=%GIT2SVN_ROOT%\git set RUSEFI_GIT_PATH=%GIT2SVN_ROOT%\git
rd /s /q %GIT2SVN_ROOT% rd /s /q %GIT2SVN_ROOT%
mkdir -p %RUSEFI_SVN_PATH% mkdir -p %RUSEFI_SVN_PATH%
cd %RUSEFI_SVN_PATH% cd %RUSEFI_SVN_PATH%
svn co https://svn.code.sf.net/p/rusefi/code/trunk/ . svn co https://svn.code.sf.net/p/rusefi/code/trunk/ .
mkdir -p %RUSEFI_GIT_PATH% mkdir -p %RUSEFI_GIT_PATH%
cd %RUSEFI_GIT_PATH% cd %RUSEFI_GIT_PATH%
git clone https://github.com/rusefi/rusefi.git git clone https://github.com/rusefi/rusefi.git

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misc/git_force_update.bat
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echo going to Root of SVN project echo going to Root of SVN project
cd .. cd ..
set RUSEFI_GIT_PATH=..\rusefi.git set RUSEFI_GIT_PATH=..\rusefi.git
cd %RUSEFI_GIT_PATH% cd %RUSEFI_GIT_PATH%
git fetch --all git fetch --all
git reset --hard origin/master git reset --hard origin/master

486
misc/hip9011_test_code/hip9011.c
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#include "stm32f4xx.h" #include "stm32f4xx.h"
/** /**
* SPI 2 * SPI 2
* *
* Chip Select: PD11 * Chip Select: PD11
* *
* *
* http://www.ti.com/lit/ds/symlink/tpic8101.pdf * http://www.ti.com/lit/ds/symlink/tpic8101.pdf
* http://www.intersil.com/content/dam/Intersil/documents/an97/an9770.pdf * http://www.intersil.com/content/dam/Intersil/documents/an97/an9770.pdf
* http://e2e.ti.com/cfs-file/__key/telligent-evolution-components-attachments/00-26-01-00-00-42-36-40/TPIC8101-Training.pdf * http://e2e.ti.com/cfs-file/__key/telligent-evolution-components-attachments/00-26-01-00-00-42-36-40/TPIC8101-Training.pdf
* *
*/ */
#define NO_DATA 0x0100 #define NO_DATA 0x0100
#define RX_BUF_SIZE 128 #define RX_BUF_SIZE 128
#define TX_BUF_SIZE 128 #define TX_BUF_SIZE 128
uint8_t rx_buf[RX_BUF_SIZE]; uint8_t rx_buf[RX_BUF_SIZE];
uint8_t tx_buf[TX_BUF_SIZE]; uint8_t tx_buf[TX_BUF_SIZE];
volatile uint16_t rx_head; volatile uint16_t rx_head;
volatile uint16_t rx_tail; volatile uint16_t rx_tail;
volatile uint16_t tx_head; volatile uint16_t tx_head;
volatile uint16_t tx_tail; volatile uint16_t tx_tail;
void uart_putc(uint8_t c); void uart_putc(uint8_t c);
uint16_t uart_getc(void); uint16_t uart_getc(void);
uint16_t spi(uint16_t data); uint16_t spi(uint16_t data);
int main(void) int main(void)
{ {
RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN); RCC->AHB1ENR |= (RCC_AHB1ENR_GPIOBEN | RCC_AHB1ENR_GPIOCEN | RCC_AHB1ENR_GPIODEN);
RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN | RCC_APB1ENR_USART3EN); RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN | RCC_APB1ENR_USART3EN);
// PB11 / INT/HOLD // PB11 / INT/HOLD
GPIOB->MODER |= GPIO_MODER_MODER11_0; GPIOB->MODER |= GPIO_MODER_MODER11_0;
// open drain output // open drain output
GPIOB->OTYPER |= GPIO_OTYPER_OT_11; GPIOB->OTYPER |= GPIO_OTYPER_OT_11;
GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR11_1; GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR11_1;
// PD11 / Chip Select // PD11 / Chip Select
GPIOD->MODER |= GPIO_MODER_MODER11_0; GPIOD->MODER |= GPIO_MODER_MODER11_0;
// open drain output // open drain output
GPIOD->OTYPER |= GPIO_OTYPER_OT_11; GPIOD->OTYPER |= GPIO_OTYPER_OT_11;
GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR11_1; GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR11_1;
// PB13 / SCK // PB13 / SCK
GPIOB->MODER |= GPIO_MODER_MODER13_1; GPIOB->MODER |= GPIO_MODER_MODER13_1;
// open drain output // open drain output
GPIOB->OTYPER |= GPIO_OTYPER_OT_13; GPIOB->OTYPER |= GPIO_OTYPER_OT_13;
GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR13_1; GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR13_1;
GPIOB->AFR[1] |= (0x05 << 20); GPIOB->AFR[1] |= (0x05 << 20);
// PB14 / MISO // PB14 / MISO
GPIOB->MODER |= GPIO_MODER_MODER14_1; GPIOB->MODER |= GPIO_MODER_MODER14_1;
GPIOB->PUPDR |= GPIO_PUPDR_PUPDR14_1; GPIOB->PUPDR |= GPIO_PUPDR_PUPDR14_1;
GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR14_1; GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR14_1;
GPIOB->AFR[1] |= (0x05 << 24); GPIOB->AFR[1] |= (0x05 << 24);
// PB15 / MOSI // PB15 / MOSI
GPIOB->MODER |= GPIO_MODER_MODER15_1; GPIOB->MODER |= GPIO_MODER_MODER15_1;
// open drain output // open drain output
GPIOB->OTYPER |= GPIO_OTYPER_OT_15; GPIOB->OTYPER |= GPIO_OTYPER_OT_15;
GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR15_1; GPIOB->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR15_1;
GPIOB->AFR[1] |= (0x05 << 28); GPIOB->AFR[1] |= (0x05 << 28);
// PD12 / LED // PD12 / LED
GPIOD->MODER |= GPIO_MODER_MODER12_0; GPIOD->MODER |= GPIO_MODER_MODER12_0;
GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR12_1; GPIOD->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR12_1;
// SPI // SPI
SPI2->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_CPHA | SPI_CR1_MSTR | (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0); SPI2->CR1 |= SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_CPHA | SPI_CR1_MSTR | (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0);
SPI2->CR1 |= SPI_CR1_SPE; SPI2->CR1 |= SPI_CR1_SPE;
// PC10 / TX // PC10 / TX
GPIOC->MODER |= GPIO_MODER_MODER10_1; GPIOC->MODER |= GPIO_MODER_MODER10_1;
GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0; GPIOC->OSPEEDR |= GPIO_OSPEEDER_OSPEEDR10_0;
GPIOC->AFR[1] |= (0x07 << 8); GPIOC->AFR[1] |= (0x07 << 8);
// PC11 / RX // PC11 / RX
GPIOC->MODER |= GPIO_MODER_MODER11_1; GPIOC->MODER |= GPIO_MODER_MODER11_1;
GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR11; GPIOC->PUPDR &= ~GPIO_PUPDR_PUPDR11;
GPIOC->AFR[1] |= (0x07 << 12); GPIOC->AFR[1] |= (0x07 << 12);
// USART // USART
USART3->BRR = 0x00D9; // 50.0 MHz / 0x00D9 = 115200 USART3->BRR = 0x00D9; // 50.0 MHz / 0x00D9 = 115200
USART3->CR3 |= USART_CR3_DMAT; USART3->CR3 |= USART_CR3_DMAT;
USART3->CR1 |= (USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE); USART3->CR1 |= (USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE);
USART3->CR1 |= USART_CR1_UE; USART3->CR1 |= USART_CR1_UE;
NVIC_SetPriority(USART3_IRQn, 15); NVIC_SetPriority(USART3_IRQn, 15);
NVIC_EnableIRQ(USART3_IRQn); NVIC_EnableIRQ(USART3_IRQn);
__enable_irq(); __enable_irq();
volatile uint32_t i; volatile uint32_t i;
uint16_t data; uint16_t data;
uart_putc(spi(0b01001100)); uart_putc(spi(0b01001100));
uart_putc(spi(0b01001100)); uart_putc(spi(0b01001100));
uart_putc(spi(0b11100001)); uart_putc(spi(0b11100001));
// SET_ADVANCED_MODE // SET_ADVANCED_MODE
uart_putc(spi(0b01110001)); uart_putc(spi(0b01110001));
for (;;) { for (;;) {
/*data = uart_getc(); /*data = uart_getc();
if ((data & 0xFF00) == 0) { if ((data & 0xFF00) == 0) {
uart_putc(spi(data)); uart_putc(spi(data));
}*/ }*/
// LED on PD12 goes LOW // LED on PD12 goes LOW
GPIOD->BSRRL = GPIO_ODR_ODR_12; GPIOD->BSRRL = GPIO_ODR_ODR_12;
// delay // delay
for (i = 0; i < 10000; i++); for (i = 0; i < 10000; i++);
// BAND_PASS_CMD // BAND_PASS_CMD
uart_putc(spi(0b00000000 | (40 & 0x3F))); uart_putc(spi(0b00000000 | (40 & 0x3F)));
// Set the gain // Set the gain
uart_putc(spi(0b10000000 | (49 & 0x3F))); uart_putc(spi(0b10000000 | (49 & 0x3F)));
// Set the integration time constant // Set the integration time constant
uart_putc(spi(0b11000000 | (31 & 0x1F))); uart_putc(spi(0b11000000 | (31 & 0x1F)));
// SET_ADVANCED_MODE // SET_ADVANCED_MODE
uart_putc(spi(0b01110001)); uart_putc(spi(0b01110001));
// int/hold LOW // int/hold LOW
GPIOB->BSRRL = GPIO_ODR_ODR_11; GPIOB->BSRRL = GPIO_ODR_ODR_11;
// LED on PD12 goes HIGH // LED on PD12 goes HIGH
GPIOD->BSRRH = GPIO_ODR_ODR_12; GPIOD->BSRRH = GPIO_ODR_ODR_12;
// delay // delay
for (i = 0; i < 10000; i++); for (i = 0; i < 10000; i++);
// int/hold HIGH // int/hold HIGH
GPIOB->BSRRH = GPIO_ODR_ODR_11; GPIOB->BSRRH = GPIO_ODR_ODR_11;
} }
return 0; return 0;
} }
uint16_t spi(uint16_t data) uint16_t spi(uint16_t data)
{ {
volatile uint16_t i; volatile uint16_t i;
// Chip Select PD11 goes HIGH // Chip Select PD11 goes HIGH
GPIOD->BSRRH = GPIO_ODR_ODR_11; GPIOD->BSRRH = GPIO_ODR_ODR_11;
for (i = 0; i < 10; i++); for (i = 0; i < 10; i++);
SPI2->DR = data; SPI2->DR = data;
while (!(SPI2->SR & SPI_SR_TXE)); while (!(SPI2->SR & SPI_SR_TXE));
while (!(SPI2->SR & SPI_SR_RXNE)); while (!(SPI2->SR & SPI_SR_RXNE));
while ((SPI2->SR & SPI_SR_BSY)); while ((SPI2->SR & SPI_SR_BSY));
for (i = 0; i < 10; i++); for (i = 0; i < 10; i++);
// Chip Select PD11 goes LOW // Chip Select PD11 goes LOW
GPIOD->BSRRL = GPIO_ODR_ODR_11; GPIOD->BSRRL = GPIO_ODR_ODR_11;
for (i = 0; i < 100; i++); for (i = 0; i < 100; i++);
return SPI2->DR; return SPI2->DR;
} }
void uart_putc(uint8_t c) void uart_putc(uint8_t c)
{ {
uint16_t tmphead; uint16_t tmphead;
tmphead = (tmphead < (TX_BUF_SIZE - 1)) ? (tx_head + 1) : 0; tmphead = (tmphead < (TX_BUF_SIZE - 1)) ? (tx_head + 1) : 0;
tx_buf[tmphead] = c; tx_buf[tmphead] = c;
tx_head = tmphead; tx_head = tmphead;
USART3->CR1 |= USART_CR1_TXEIE; USART3->CR1 |= USART_CR1_TXEIE;
} }
uint16_t uart_getc(void) uint16_t uart_getc(void)
{ {
uint16_t data, tmptail; uint16_t data, tmptail;
if (rx_tail == rx_head) if (rx_tail == rx_head)
{ {
data = NO_DATA; data = NO_DATA;
} }
else else
{ {
tmptail = (tmptail < (RX_BUF_SIZE - 1)) ? (rx_tail + 1) : 0; tmptail = (tmptail < (RX_BUF_SIZE - 1)) ? (rx_tail + 1) : 0;
rx_tail = tmptail; rx_tail = tmptail;
data = rx_buf[tmptail]; data = rx_buf[tmptail];
} }
return data; return data;
} }
void USART3_IRQHandler(void) void USART3_IRQHandler(void)
{ {
if ((USART3->SR & USART_SR_RXNE)) if ((USART3->SR & USART_SR_RXNE))
{ {
uint8_t data, tmphead; uint8_t data, tmphead;
USART3->SR = ~USART_SR_RXNE; USART3->SR = ~USART_SR_RXNE;
data = USART3->DR; data = USART3->DR;
tmphead = (rx_head < (RX_BUF_SIZE - 1)) ? (rx_head + 1) : 0; tmphead = (rx_head < (RX_BUF_SIZE - 1)) ? (rx_head + 1) : 0;
if (rx_tail == tmphead) if (rx_tail == tmphead)
{ {
// Buffer overflow // Buffer overflow
} }
else else
{ {
rx_head = tmphead; rx_head = tmphead;
rx_buf[tmphead] = data; rx_buf[tmphead] = data;
} }
} }
if ((USART3->SR & USART_SR_TXE)) if ((USART3->SR & USART_SR_TXE))
{ {
uint16_t tmptail; uint16_t tmptail;
USART3->SR = ~USART_SR_TXE; USART3->SR = ~USART_SR_TXE;
if (tx_tail != tx_head) if (tx_tail != tx_head)
{ {
tmptail = (tx_tail < (TX_BUF_SIZE - 1)) ? (tx_tail + 1) : 0; tmptail = (tx_tail < (TX_BUF_SIZE - 1)) ? (tx_tail + 1) : 0;
tx_tail = tmptail; tx_tail = tmptail;
USART3->DR = tx_buf[tmptail]; USART3->DR = tx_buf[tmptail];
} }
else else
{ {
USART3->CR1 &= ~USART_CR1_TXEIE; USART3->CR1 &= ~USART_CR1_TXEIE;
} }
} }
} }

62
misc/hw_test.bat
View File

@ -1,31 +1,31 @@
echo I am hw_test.bat echo I am hw_test.bat
cd ../firmware cd ../firmware
call flash_erase call flash_erase
echo Compiling firmware echo Compiling firmware
pwd pwd
call compile_and_program.bat call compile_and_program.bat
if not exist build/rusefi.bin echo FAILED TO COMPILE if not exist build/rusefi.bin echo FAILED TO COMPILE
if not exist build/rusefi.bin exit -1 if not exist build/rusefi.bin exit -1
pwd pwd
cd .. cd ..
echo Running some commands echo Running some commands
pwd pwd
rem java -cp java_console_binary\rusefi_console.jar com.rusefi.CmdLine "set_led_blinking_period 10" rem java -cp java_console_binary\rusefi_console.jar com.rusefi.CmdLine "set_led_blinking_period 10"
cd java_console cd java_console
echo Running tests echo Running tests
which java which java
which javac which javac
ant realtest ant realtest
IF NOT ERRORLEVEL echo ERROR DETECTED IF NOT ERRORLEVEL echo ERROR DETECTED
IF NOT ERRORLEVEL 0 EXIT /B 1 IF NOT ERRORLEVEL 0 EXIT /B 1

62
misc/install/openocd/mem_helper.tcl
View File

@ -1,31 +1,31 @@
# Helper for common memory read/modify/write procedures # Helper for common memory read/modify/write procedures
# mrw: "memory read word", returns value of $reg # mrw: "memory read word", returns value of $reg
proc mrw {reg} { proc mrw {reg} {
set value "" set value ""
mem2array value 32 $reg 1 mem2array value 32 $reg 1
return $value(0) return $value(0)
} }
add_usage_text mrw "address" add_usage_text mrw "address"
add_help_text mrw "Returns value of word in memory." add_help_text mrw "Returns value of word in memory."
proc mrb {reg} { proc mrb {reg} {
set value "" set value ""
mem2array value 8 $reg 1 mem2array value 8 $reg 1
return $value(0) return $value(0)
} }
add_usage_text mrb "address" add_usage_text mrb "address"
add_help_text mrb "Returns value of byte in memory." add_help_text mrb "Returns value of byte in memory."
# mmw: "memory modify word", updates value of $reg # mmw: "memory modify word", updates value of $reg
# $reg <== ((value & ~$clearbits) | $setbits) # $reg <== ((value & ~$clearbits) | $setbits)
proc mmw {reg setbits clearbits} { proc mmw {reg setbits clearbits} {
set old [mrw $reg] set old [mrw $reg]
set new [expr ($old & ~$clearbits) | $setbits] set new [expr ($old & ~$clearbits) | $setbits]
mww $reg $new mww $reg $new
} }
add_usage_text mmw "address setbits clearbits" add_usage_text mmw "address setbits clearbits"
add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;" add_help_text mmw "Modify word in memory. new_val = (old_val & ~clearbits) | setbits;"

32
misc/install/openocd/stlink-v2-1.cfg
View File

@ -1,16 +1,16 @@
# #
# STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer # STMicroelectronics ST-LINK/V2-1 in-circuit debugger/programmer
# #
interface hla interface hla
hla_layout stlink hla_layout stlink
hla_device_desc "ST-LINK/V2-1" hla_device_desc "ST-LINK/V2-1"
hla_vid_pid 0x0483 0x374b hla_vid_pid 0x0483 0x374b
# Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2 # Optionally specify the serial number of ST-LINK/V2 usb device. ST-LINK/V2
# devices seem to have serial numbers with unreadable characters. ST-LINK/V2 # devices seem to have serial numbers with unreadable characters. ST-LINK/V2
# firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial # firmware version >= V2.J21.S4 recommended to avoid issues with adapter serial
# number reset issues. # number reset issues.
# eg. # eg.
#hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f" #hla_serial "\xaa\xbc\x6e\x06\x50\x75\xff\x55\x17\x42\x19\x3f"

24
misc/install/openocd/stm32f429disc1.cfg
View File

@ -1,12 +1,12 @@
# #
# This is an STM32F429 discovery board with a single STM32F429ZI chip. # This is an STM32F429 discovery board with a single STM32F429ZI chip.
# http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090 # http://www.st.com/web/catalog/tools/FM116/SC959/SS1532/PF259090
# #
source [find openocd/stlink-v2-1.cfg] source [find openocd/stlink-v2-1.cfg]
transport select hla_swd transport select hla_swd
source [find openocd/stm32f4x.cfg] source [find openocd/stm32f4x.cfg]
reset_config srst_only reset_config srst_only

274
misc/install/openocd/stm32f4x.cfg
View File

@ -1,137 +1,137 @@
# script for stm32f4x family # script for stm32f4x family
# #
# stm32 devices support both JTAG and SWD transports. # stm32 devices support both JTAG and SWD transports.
# #
source [find openocd/swj-dp.tcl] source [find openocd/swj-dp.tcl]
source [find openocd/mem_helper.tcl] source [find openocd/mem_helper.tcl]
if { [info exists CHIPNAME] } { if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME set _CHIPNAME $CHIPNAME
} else { } else {
set _CHIPNAME stm32f4x set _CHIPNAME stm32f4x
} }
set _ENDIAN little set _ENDIAN little
# Work-area is a space in RAM used for flash programming # Work-area is a space in RAM used for flash programming
# By default use 32kB (Available RAM in smallest device STM32F410) # By default use 32kB (Available RAM in smallest device STM32F410)
if { [info exists WORKAREASIZE] } { if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE set _WORKAREASIZE $WORKAREASIZE
} else { } else {
set _WORKAREASIZE 0x8000 set _WORKAREASIZE 0x8000
} }
#jtag scan chain #jtag scan chain
if { [info exists CPUTAPID] } { if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID set _CPUTAPID $CPUTAPID
} else { } else {
if { [using_jtag] } { if { [using_jtag] } {
# See STM Document RM0090 # See STM Document RM0090
# Section 38.6.3 - corresponds to Cortex-M4 r0p1 # Section 38.6.3 - corresponds to Cortex-M4 r0p1
set _CPUTAPID 0x4ba00477 set _CPUTAPID 0x4ba00477
} { } {
set _CPUTAPID 0x2ba01477 set _CPUTAPID 0x2ba01477
} }
} }
swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
if { [info exists BSTAPID] } { if { [info exists BSTAPID] } {
set _BSTAPID $BSTAPID set _BSTAPID $BSTAPID
} else { } else {
# See STM Document RM0090 # See STM Document RM0090
# Section 38.6.2 # Section 38.6.2
# STM32F405xx/07xx and STM32F415xx/17xx # STM32F405xx/07xx and STM32F415xx/17xx
set _BSTAPID1 0x06413041 set _BSTAPID1 0x06413041
# STM32F42xxx and STM32F43xxx # STM32F42xxx and STM32F43xxx
set _BSTAPID2 0x06419041 set _BSTAPID2 0x06419041
# See STM Document RM0368 (Rev. 3) # See STM Document RM0368 (Rev. 3)
# STM32F401B/C # STM32F401B/C
set _BSTAPID3 0x06423041 set _BSTAPID3 0x06423041
# STM32F401D/E # STM32F401D/E
set _BSTAPID4 0x06433041 set _BSTAPID4 0x06433041
# See STM Document RM0383 (Rev 2) # See STM Document RM0383 (Rev 2)
# STM32F411 # STM32F411
set _BSTAPID5 0x06431041 set _BSTAPID5 0x06431041
# See STM Document RM0386 # See STM Document RM0386
# STM32F469 # STM32F469
set _BSTAPID6 0x06434041 set _BSTAPID6 0x06434041
# See STM Document RM0401 # See STM Document RM0401
# STM32F410 # STM32F410
set _BSTAPID7 0x06458041 set _BSTAPID7 0x06458041
# STM32F412 # STM32F412
set _BSTAPID8 0x06441041 set _BSTAPID8 0x06441041
} }
if {[using_jtag]} { if {[using_jtag]} {
swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \ swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \ -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \ -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
-expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \ -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
-expected-id $_BSTAPID8 -expected-id $_BSTAPID8
} }
set _TARGETNAME $_CHIPNAME.cpu set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz # JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz
# #
# Since we may be running of an RC oscilator, we crank down the speed a # Since we may be running of an RC oscilator, we crank down the speed a
# bit more to be on the safe side. Perhaps superstition, but if are # bit more to be on the safe side. Perhaps superstition, but if are
# running off a crystal, we can run closer to the limit. Note # running off a crystal, we can run closer to the limit. Note
# that there can be a pretty wide band where things are more or less stable. # that there can be a pretty wide band where things are more or less stable.
adapter_khz 2000 adapter_khz 2000
adapter_nsrst_delay 100 adapter_nsrst_delay 100
if {[using_jtag]} { if {[using_jtag]} {
jtag_ntrst_delay 100 jtag_ntrst_delay 100
} }
reset_config srst_nogate reset_config srst_nogate
if {![using_hla]} { if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to # if srst is not fitted use SYSRESETREQ to
# perform a soft reset # perform a soft reset
cortex_m reset_config sysresetreq cortex_m reset_config sysresetreq
} }
$_TARGETNAME configure -event examine-end { $_TARGETNAME configure -event examine-end {
# Enable debug during low power modes (uses more power) # Enable debug during low power modes (uses more power)
# DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP # DBGMCU_CR |= DBG_STANDBY | DBG_STOP | DBG_SLEEP
mmw 0xE0042004 0x00000007 0 mmw 0xE0042004 0x00000007 0
# Stop watchdog counters during halt # Stop watchdog counters during halt
# DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP # DBGMCU_APB1_FZ |= DBG_IWDG_STOP | DBG_WWDG_STOP
mmw 0xE0042008 0x00001800 0 mmw 0xE0042008 0x00001800 0
} }
$_TARGETNAME configure -event trace-config { $_TARGETNAME configure -event trace-config {
# Set TRACE_IOEN; TRACE_MODE is set to async; when using sync # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync
# change this value accordingly to configure trace pins # change this value accordingly to configure trace pins
# assignment # assignment
mmw 0xE0042004 0x00000020 0 mmw 0xE0042004 0x00000020 0
} }
$_TARGETNAME configure -event reset-init { $_TARGETNAME configure -event reset-init {
# Configure PLL to boost clock to HSI x 4 (64 MHz) # Configure PLL to boost clock to HSI x 4 (64 MHz)
mww 0x40023804 0x08012008 ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P) mww 0x40023804 0x08012008 ;# RCC_PLLCFGR 16 Mhz /8 (M) * 128 (N) /4(P)
mww 0x40023C00 0x00000102 ;# FLASH_ACR = PRFTBE | 2(Latency) mww 0x40023C00 0x00000102 ;# FLASH_ACR = PRFTBE | 2(Latency)
mmw 0x40023800 0x01000000 0 ;# RCC_CR |= PLLON mmw 0x40023800 0x01000000 0 ;# RCC_CR |= PLLON
sleep 10 ;# Wait for PLL to lock sleep 10 ;# Wait for PLL to lock
mmw 0x40023808 0x00001000 0 ;# RCC_CFGR |= RCC_CFGR_PPRE1_DIV2 mmw 0x40023808 0x00001000 0 ;# RCC_CFGR |= RCC_CFGR_PPRE1_DIV2
mmw 0x40023808 0x00000002 0 ;# RCC_CFGR |= RCC_CFGR_SW_PLL mmw 0x40023808 0x00000002 0 ;# RCC_CFGR |= RCC_CFGR_SW_PLL
# Boost JTAG frequency # Boost JTAG frequency
adapter_khz 8000 adapter_khz 8000
} }
$_TARGETNAME configure -event reset-start { $_TARGETNAME configure -event reset-start {
# Reduce speed since CPU speed will slow down to 16MHz with the reset # Reduce speed since CPU speed will slow down to 16MHz with the reset
adapter_khz 2000 adapter_khz 2000
} }

68
misc/install/openocd/swj-dp.tcl
View File

@ -1,34 +1,34 @@
# ARM Debug Interface V5 (ADI_V5) utility # ARM Debug Interface V5 (ADI_V5) utility
# ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since # ... Mostly for SWJ-DP (not SW-DP or JTAG-DP, since
# SW-DP and JTAG-DP targets don't need to switch based # SW-DP and JTAG-DP targets don't need to switch based
# on which transport is active. # on which transport is active.
# #
# declare a JTAG or SWD Debug Access Point (DAP) # declare a JTAG or SWD Debug Access Point (DAP)
# based on the transport in use with this session. # based on the transport in use with this session.
# You can't access JTAG ops when SWD is active, etc. # You can't access JTAG ops when SWD is active, etc.
# params are currently what "jtag newtap" uses # params are currently what "jtag newtap" uses
# because OpenOCD internals are still strongly biased # because OpenOCD internals are still strongly biased
# to JTAG .... but for SWD, "irlen" etc are ignored, # to JTAG .... but for SWD, "irlen" etc are ignored,
# and the internals work differently # and the internals work differently
# for now, ignore non-JTAG and non-SWD transports # for now, ignore non-JTAG and non-SWD transports
# (e.g. initial flash programming via SPI or UART) # (e.g. initial flash programming via SPI or UART)
# split out "chip" and "tag" so we can someday handle # split out "chip" and "tag" so we can someday handle
# them more uniformly irlen too...) # them more uniformly irlen too...)
if [catch {transport select}] { if [catch {transport select}] {
echo "Error: unable to select a session transport. Can't continue." echo "Error: unable to select a session transport. Can't continue."
shutdown shutdown
} }
proc swj_newdap {chip tag args} { proc swj_newdap {chip tag args} {
if [using_hla] { if [using_hla] {
eval hla newtap $chip $tag $args eval hla newtap $chip $tag $args
} elseif [using_jtag] { } elseif [using_jtag] {
eval jtag newtap $chip $tag $args eval jtag newtap $chip $tag $args
} elseif [using_swd] { } elseif [using_swd] {
eval swd newdap $chip $tag $args eval swd newdap $chip $tag $args
} }
} }

10
misc/install/run_openocd.bat
View File

@ -1,5 +1,5 @@
rem if you have an older Rev C discovery please update to latest Rev D firmware rem if you have an older Rev C discovery please update to latest Rev D firmware
rem As of March 2017 this enabled GDB debugging using ARM Eclipse plug-in rem As of March 2017 this enabled GDB debugging using ARM Eclipse plug-in
openocd\openocd.exe -f openocd/stm32f429disc1.cfg -c init -c reset openocd\openocd.exe -f openocd/stm32f429disc1.cfg -c init -c reset

22
misc/jenkins.bat
View File

@ -1,11 +1,11 @@
zip -j rusefi_simulator.zip win32_functional_tests/build/rusefi_simulator.exe firmware/tunerstudio/rusefi.ini java_console_binary/rusefi_console.jar zip -j rusefi_simulator.zip win32_functional_tests/build/rusefi_simulator.exe firmware/tunerstudio/rusefi.ini java_console_binary/rusefi_console.jar
echo user u71977750-build> ftpcmd.dat echo user u71977750-build> ftpcmd.dat
echo XXX >> ftpcmd.dat echo XXX >> ftpcmd.dat
echo bin>> ftpcmd.dat echo bin>> ftpcmd.dat
echo put rusefi_simulator.zip separate_files/rusefi_simulator.zip >> ftpcmd.dat echo put rusefi_simulator.zip separate_files/rusefi_simulator.zip >> ftpcmd.dat
echo put temp/rusefi_bundle.zip rusefi_bundle.zip >> ftpcmd.dat echo put temp/rusefi_bundle.zip rusefi_bundle.zip >> ftpcmd.dat
echo quit>> ftpcmd.dat echo quit>> ftpcmd.dat
ftp -n -s:ftpcmd.dat rusefi.com ftp -n -s:ftpcmd.dat rusefi.com

98
misc/jenkins.sh
View File

@ -1,50 +1,50 @@
#!/bin/bash #!/bin/bash
echo "The PATH is ${PATH}" echo "The PATH is ${PATH}"
cd "${WORKSPACE}" cd "${WORKSPACE}"
echo "start in workspace ${PWD}" echo "start in workspace ${PWD}"
cd firmware cd firmware
echo "CD to ${PWD}" echo "CD to ${PWD}"
rm -fR .dep rm -fR .dep
rm -fR build rm -fR build
make make
if [ ! -f build/rusefi.hex ]; then if [ ! -f build/rusefi.hex ]; then
echo "Firmware compilation failed" echo "Firmware compilation failed"
exit -1 exit -1
fi fi
cd "${WORKSPACE}/win32_algo_tests" cd "${WORKSPACE}/win32_algo_tests"
echo "CD to ${PWD}" echo "CD to ${PWD}"
rm -fR .dep rm -fR .dep
rm -fR build rm -fR build
make make
if [ ! -f build/rusefi_test ]; then if [ ! -f build/rusefi_test ]; then
echo "test compilation failed" echo "test compilation failed"
exit -1 exit -1
fi fi
# we want to terminate if test fails # we want to terminate if test fails
set -e set -e
# invoke the tests - hopefully error code would be propagated? # invoke the tests - hopefully error code would be propagated?
build/rusefi_test build/rusefi_test
cd "${WORKSPACE}/java_console" cd "${WORKSPACE}/java_console"
echo "CD to ${PWD}" echo "CD to ${PWD}"
ant ant
cd "${WORKSPACE}" cd "${WORKSPACE}"
echo "CD to ${PWD}" echo "CD to ${PWD}"
zip -j firmware/build/rusefi_firmware.zip firmware/build/rusefi.hex firmware/tunerstudio/rusefi.ini zip -j firmware/build/rusefi_firmware.zip firmware/build/rusefi.hex firmware/tunerstudio/rusefi.ini
echo user u71977750-build pass > ftp.cmd echo user u71977750-build pass > ftp.cmd
echo put firmware/build/rusefi_firmware.zip rusefi_firmware.zip >> ftp.cmd echo put firmware/build/rusefi_firmware.zip rusefi_firmware.zip >> ftp.cmd
echo put java_console_binary/rusefi_console.jar rusefi_console.jar >> ftp.cmd echo put java_console_binary/rusefi_console.jar rusefi_console.jar >> ftp.cmd
ftp -npiv rusefi.com < ftp.cmd ftp -npiv rusefi.com < ftp.cmd
cat ftp.cmd cat ftp.cmd
rm ftp.cmd rm ftp.cmd

2512
misc/ms_logs/page_issue/TunerStudioAppDebug.first_launch.txt
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File diff suppressed because it is too large Load Diff

240
misc/ms_logs/page_issue/TunerStudioAppDebug.second_launch_trancated.txt
View File

@ -1,99 +1,99 @@
TunerStudio 2.6.01 started on Fri Jul 04 17:05:33 EDT 2014 TunerStudio 2.6.01 started on Fri Jul 04 17:05:33 EDT 2014
JRE 1.7.0_60, Windows 7 6.1, x86 JRE 1.7.0_60, Windows 7 6.1, x86
java.library.path=lib java.library.path=lib
TunerStudioMS.jar TunerStudioMS.jar
Look:Metal, ClassName:'javax.swing.plaf.metal.MetalLookAndFeel' Look:Metal, ClassName:'javax.swing.plaf.metal.MetalLookAndFeel'
Look:Nimbus, ClassName:'javax.swing.plaf.nimbus.NimbusLookAndFeel' Look:Nimbus, ClassName:'javax.swing.plaf.nimbus.NimbusLookAndFeel'
Look:CDE/Motif, ClassName:'com.sun.java.swing.plaf.motif.MotifLookAndFeel' Look:CDE/Motif, ClassName:'com.sun.java.swing.plaf.motif.MotifLookAndFeel'
Look:Windows, ClassName:'com.sun.java.swing.plaf.windows.WindowsLookAndFeel' Look:Windows, ClassName:'com.sun.java.swing.plaf.windows.WindowsLookAndFeel'
Look:Windows Classic, ClassName:'com.sun.java.swing.plaf.windows.WindowsClassicLookAndFeel' Look:Windows Classic, ClassName:'com.sun.java.swing.plaf.windows.WindowsClassicLookAndFeel'
Setting Look & Feel to:javax.swing.plaf.metal.MetalLookAndFeel Setting Look & Feel to:javax.swing.plaf.metal.MetalLookAndFeel
7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for F resolved to: x46 F 7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for F resolved to: x46 F
7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for I resolved to: x49 I 7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for I resolved to: x49 I
7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for f resolved to: x66 f 7/4/14 5:05:34 PM :Debug: Command Non-VolatileBytes for f resolved to: x66 f
7/4/14 5:05:34 PM :Debug: App Name:TunerStudio, appEdition:MS Lite! 7/4/14 5:05:34 PM :Debug: App Name:TunerStudio, appEdition:MS Lite!
7/4/14 5:05:36 PM :Debug: Time to retreive font name list: 42 ms. 7/4/14 5:05:36 PM :Debug: Time to retreive font name list: 42 ms.
WARNING: RXTX Version mismatch WARNING: RXTX Version mismatch
Jar version = RXTX-2.2pre1 Jar version = RXTX-2.2pre1
native lib Version = RXTX-2.1-7 native lib Version = RXTX-2.1-7
7/4/14 5:05:36 PM :Info: Initialized RXTX driver: 11ms. 7/4/14 5:05:36 PM :Info: Initialized RXTX driver: 11ms.
No check, last update check=Fri Jul 04 15:49:57 EDT 2014 No check, last update check=Fri Jul 04 15:49:57 EDT 2014
MSmain: No check, last update check=Fri Jul 04 15:49:54 EDT 2014 MSmain: No check, last update check=Fri Jul 04 15:49:54 EDT 2014
MSad: No check, last update check=Fri Jul 04 15:49:57 EDT 2014 MSad: No check, last update check=Fri Jul 04 15:49:57 EDT 2014
7/4/14 5:05:47 PM :Debug: Opening project: C:\Users\pc\Documents\TunerStudioProjects\MyCar 7/4/14 5:05:47 PM :Debug: Opening project: C:\Users\pc\Documents\TunerStudioProjects\MyCar
7/4/14 5:05:47 PM :Debug: Reading translation file as plain text because: fast binary headers not found. probably not a fast binary file 7/4/14 5:05:47 PM :Debug: Reading translation file as plain text because: fast binary headers not found. probably not a fast binary file
7/4/14 5:05:47 PM :Debug: Filtered ConfigurationOptionGroup in 34ms. 7/4/14 5:05:47 PM :Debug: Filtered ConfigurationOptionGroup in 34ms.
7/4/14 5:05:47 PM :Info: Read file canPcVariables.ini: 0.0ms 7/4/14 5:05:47 PM :Info: Read file canPcVariables.ini: 0.0ms
7/4/14 5:05:47 PM :Info: Filtered ini: 0.0ms 7/4/14 5:05:47 PM :Info: Filtered ini: 0.0ms
7/4/14 5:05:47 PM :Info: Loading Trigger Wheels 7/4/14 5:05:47 PM :Info: Loading Trigger Wheels
7/4/14 5:05:47 PM :Info: Loaded All known ini sections 7/4/14 5:05:47 PM :Info: Loaded All known ini sections
7/4/14 5:05:47 PM :Info: Parsed and validated ini "canPcVariables.ini" in : 22ms. 7/4/14 5:05:47 PM :Info: Parsed and validated ini "canPcVariables.ini" in : 22ms.
7/4/14 5:05:47 PM :Info: Read file mainController.ini: 1.0ms 7/4/14 5:05:47 PM :Info: Read file mainController.ini: 1.0ms
7/4/14 5:05:47 PM :Info: Filtered ini: 0.0ms 7/4/14 5:05:47 PM :Info: Filtered ini: 0.0ms
7/4/14 5:05:47 PM :Debug: ini signature: MShift v0.01 7/4/14 5:05:47 PM :Debug: ini signature: MShift v0.01
7/4/14 5:05:47 PM :Info: Set Write Blocks on = true 7/4/14 5:05:47 PM :Info: Set Write Blocks on = true
7/4/14 5:05:47 PM :Info: Loading Trigger Wheels 7/4/14 5:05:47 PM :Info: Loading Trigger Wheels
7/4/14 5:05:47 PM :Info: Loaded All known ini sections 7/4/14 5:05:47 PM :Info: Loaded All known ini sections
7/4/14 5:05:47 PM :Info: Parsed and validated ini "mainController.ini" in : 25ms. 7/4/14 5:05:47 PM :Info: Parsed and validated ini "mainController.ini" in : 25ms.
7/4/14 5:05:47 PM :Info: Not Loading default Tools because non are defined for signature: MShift v0.01 7/4/14 5:05:47 PM :Info: Not Loading default Tools because non are defined for signature: MShift v0.01
7/4/14 5:05:48 PM :Debug: Adding Configuration: MyCar 7/4/14 5:05:48 PM :Debug: Adding Configuration: MyCar
7/4/14 5:05:48 PM :Info: Tune opened, 2256 bytes updated. File:C:\Users\pc\Documents\TunerStudioProjects\MyCar\CurrentTune.msq 7/4/14 5:05:48 PM :Info: Tune opened, 2256 bytes updated. File:C:\Users\pc\Documents\TunerStudioProjects\MyCar\CurrentTune.msq
7/4/14 5:05:48 PM :Debug: Flush lasted: 0ms. 7/4/14 5:05:48 PM :Debug: Flush lasted: 0ms.
7/4/14 5:05:48 PM :Info: !!! Loaded config in 321 7/4/14 5:05:48 PM :Info: !!! Loaded config in 321
7/4/14 5:05:48 PM :Info: Opening port: COM18 7/4/14 5:05:48 PM :Info: Opening port: COM18
7/4/14 5:05:48 PM :Debug: 0ms. - added Port 7/4/14 5:05:48 PM :Debug: 0ms. - added Port
7/4/14 5:05:48 PM :Debug: 15ms. - 1st got port 7/4/14 5:05:48 PM :Debug: 15ms. - 1st got port
7/4/14 5:05:48 PM :Debug: 15ms. - got port 7/4/14 5:05:48 PM :Debug: 15ms. - got port
7/4/14 5:05:48 PM :Debug: 25ms. - setParameters 7/4/14 5:05:48 PM :Debug: 25ms. - setParameters
7/4/14 5:05:48 PM :Debug: Monitoring COM18 @ 115200 baud for controllers. 7/4/14 5:05:48 PM :Debug: Monitoring COM18 @ 115200 baud for controllers.
7/4/14 5:05:48 PM :Debug: Started new CommThread for MyCar 7/4/14 5:05:48 PM :Debug: Started new CommThread for MyCar
7/4/14 5:05:48 PM :Info: Comm Manager for MyCar Started 7/4/14 5:05:48 PM :Info: Comm Manager for MyCar Started
7/4/14 5:05:48 PM :Debug: commThreadExpectedReturnTime set to ms from now: 1220 7/4/14 5:05:48 PM :Debug: commThreadExpectedReturnTime set to ms from now: 1220
7/4/14 5:05:48 PM :Debug: Comm Read Thread Change! Old Thread:null, new Thread:COMM Thread767.0493304470116 7/4/14 5:05:48 PM :Debug: Comm Read Thread Change! Old Thread:null, new Thread:COMM Thread767.0493304470116
7/4/14 5:05:48 PM :Info: Started Comms Watchdog 7/4/14 5:05:48 PM :Info: Started Comms Watchdog
7/4/14 5:05:48 PM :Info: !!! Activated Project 445 7/4/14 5:05:48 PM :Info: !!! Activated Project 445
7/4/14 5:05:48 PM :Time: 0:00.283: SENT, 1 bytes 7/4/14 5:05:48 PM :Time: 0:00.283: SENT, 1 bytes
x46 F x46 F
7/4/14 5:05:48 PM :Debug: High Speed Paint: true 7/4/14 5:05:48 PM :Debug: High Speed Paint: true
7/4/14 5:05:48 PM :Debug: !!! Opened Dash 477 7/4/14 5:05:48 PM :Debug: !!! Opened Dash 477
7/4/14 5:05:48 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140 7/4/14 5:05:48 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140
7/4/14 5:05:48 PM :Time: 0:00.883: Received, 3 bytes 7/4/14 5:05:48 PM :Time: 0:00.883: Received, 3 bytes
x30 x30 x31 001 x30 x30 x31 001
7/4/14 5:05:48 PM :Time: 0:00.883: SENT, 7 bytes 7/4/14 5:05:48 PM :Time: 0:00.883: SENT, 7 bytes
x00 x01 x48 xAA x05 x26 x2F ..H..&/ x00 x01 x48 xAA x05 x26 x2F ..H..&/
7/4/14 5:05:49 PM :Info: Communicating with Bowling & Grippo MS1 Base Code MShift v0.01 7/4/14 5:05:49 PM :Info: Communicating with Bowling & Grippo MS1 Base Code MShift v0.01
7/4/14 5:05:49 PM :Time: 0:01.684: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.684: Received, 3 bytes
x00 x0E x00 ... x00 x0E x00 ...
7/4/14 5:05:49 PM :Time: 0:01.684: Received, 17 bytes 7/4/14 5:05:49 PM :Time: 0:01.684: Received, 17 bytes
x4D x53 x68 x69 x66 x74 x20 x76 x30 x2E x30 x31 x00 xB1 x45 x6A MShift.v0.01..Ej x4D x53 x68 x69 x66 x74 x20 x76 x30 x2E x30 x31 x00 xB1 x45 x6A MShift.v0.01..Ej
x84 . x84 .
Time: 0:01.687: Received Instruction: Time: 0:01.687: Received Instruction:
Time: 0:01.696: Processing Instruction: Time: 0:01.696: Processing Instruction:
7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.0 complete 7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.0 complete
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180
7/4/14 5:05:49 PM :Time: 0:01.717: SENT, 9 bytes 7/4/14 5:05:49 PM :Time: 0:01.717: SENT, 9 bytes
x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P...... x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P......
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260
7/4/14 5:05:49 PM :Time: 0:01.766: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.766: Received, 3 bytes
x00 x01 x00 ... x00 x01 x00 ...
7/4/14 5:05:49 PM :Time: 0:01.767: Received, 4 bytes 7/4/14 5:05:49 PM :Time: 0:01.767: Received, 4 bytes
xD2 x02 xEF x8D .... xD2 x02 xEF x8D ....
7/4/14 5:05:49 PM :Time: 0:01.767: SENT, 13 bytes 7/4/14 5:05:49 PM :Time: 0:01.767: SENT, 13 bytes
x00 x07 x52 x00 x00 x00 x00 x64 x05 x58 xDD x7D xCC ..R....d.X.}. x00 x07 x52 x00 x00 x00 x00 x64 x05 x58 xDD x7D xCC ..R....d.X.}.
7/4/14 5:05:49 PM :Debug: Read page time: 51ms. 7/4/14 5:05:49 PM :Debug: Read page time: 51ms.
7/4/14 5:05:49 PM :Time: 0:01.817: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.817: Received, 3 bytes
x05 x65 x00 .e. x05 x65 x00 .e.
7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.25 complete 7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.25 complete
7/4/14 5:05:49 PM :Time: 0:01.818: Received, 1384 bytes 7/4/14 5:05:49 PM :Time: 0:01.818: Received, 1384 bytes
x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A
x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA
@ -182,26 +182,26 @@ x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 ..........
x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 ................ x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 ................
x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 ................ x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 x00 ................
x00 x00 x00 x00 xB2 xF2 xA1 xBB ........ x00 x00 x00 x00 xB2 xF2 xA1 xBB ........
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180
7/4/14 5:05:49 PM :Time: 0:01.828: SENT, 9 bytes 7/4/14 5:05:49 PM :Time: 0:01.828: SENT, 9 bytes
x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P...... x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P......
7/4/14 5:05:49 PM :Time: 0:01.877: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.877: Received, 3 bytes
x00 x01 x00 ... x00 x01 x00 ...
7/4/14 5:05:49 PM :Time: 0:01.878: Received, 4 bytes 7/4/14 5:05:49 PM :Time: 0:01.878: Received, 4 bytes
xD2 x02 xEF x8D .... xD2 x02 xEF x8D ....
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260
7/4/14 5:05:49 PM :Time: 0:01.878: SENT, 13 bytes 7/4/14 5:05:49 PM :Time: 0:01.878: SENT, 13 bytes
x00 x07 x52 x00 x00 x00 x00 x44 x01 xCA x34 x9D x77 ..R....D..4.w x00 x07 x52 x00 x00 x00 x00 x44 x01 xCA x34 x9D x77 ..R....D..4.w
7/4/14 5:05:49 PM :Debug: Read page time: 51ms. 7/4/14 5:05:49 PM :Debug: Read page time: 51ms.
7/4/14 5:05:49 PM :Time: 0:01.929: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.929: Received, 3 bytes
x01 x45 x00 .E. x01 x45 x00 .E.
7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.5 complete 7/4/14 5:05:49 PM :Debug: Reading ECU Data, 0.5 complete
7/4/14 5:05:49 PM :Time: 0:01.929: Received, 328 bytes 7/4/14 5:05:49 PM :Time: 0:01.929: Received, 328 bytes
x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A
x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA
@ -224,26 +224,26 @@ x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F ...?...?..
x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F ...?...?...?...? x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F ...?...?...?...?
x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F ...?...?...?...? x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F x00 x00 x80 x3F ...?...?...?...?
x00 x00 x80 x3F x9E xB1 xC9 x0D ...?.... x00 x00 x80 x3F x9E xB1 xC9 x0D ...?....
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180
7/4/14 5:05:49 PM :Time: 0:01.939: SENT, 9 bytes 7/4/14 5:05:49 PM :Time: 0:01.939: SENT, 9 bytes
x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P...... x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P......
7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260 7/4/14 5:05:49 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260
7/4/14 5:05:49 PM :Time: 0:01.989: Received, 3 bytes 7/4/14 5:05:49 PM :Time: 0:01.989: Received, 3 bytes
x00 x01 x00 ... x00 x01 x00 ...
7/4/14 5:05:49 PM :Time: 0:01.989: Received, 4 bytes 7/4/14 5:05:49 PM :Time: 0:01.989: Received, 4 bytes
xD2 x02 xEF x8D .... xD2 x02 xEF x8D ....
7/4/14 5:05:49 PM :Time: 0:01.990: SENT, 13 bytes 7/4/14 5:05:49 PM :Time: 0:01.990: SENT, 13 bytes
x00 x07 x52 x00 x00 x00 x00 x00 x04 x2E x4B xE3 xF9 ..R.......K.. x00 x07 x52 x00 x00 x00 x00 x00 x04 x2E x4B xE3 xF9 ..R.......K..
7/4/14 5:05:50 PM :Time: 0:02.039: Received, 3 bytes 7/4/14 5:05:50 PM :Time: 0:02.039: Received, 3 bytes
x04 x01 x00 ... x04 x01 x00 ...
7/4/14 5:05:50 PM :Debug: Read page time: 51ms. 7/4/14 5:05:50 PM :Debug: Read page time: 51ms.
7/4/14 5:05:50 PM :Debug: Reading ECU Data, 0.75 complete 7/4/14 5:05:50 PM :Debug: Reading ECU Data, 0.75 complete
7/4/14 5:05:50 PM :Time: 0:02.040: Received, 1028 bytes 7/4/14 5:05:50 PM :Time: 0:02.040: Received, 1028 bytes
x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A
x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA
@ -310,26 +310,26 @@ x04 x00 x00 x00 x00 x00 x00 x00 x01 x00 x00 x00 x00 x00 x00 x3F ..........
x01 x00 x00 x00 x00 x00 x00 x00 xA0 x52 x33 x01 x14 x00 x00 x00 .........R3..... x01 x00 x00 x00 x00 x00 x00 x00 xA0 x52 x33 x01 x14 x00 x00 x00 .........R3.....
x04 x00 x00 x00 x03 x00 x00 x00 x01 x00 x00 x00 x14 x00 x00 x00 ................ x04 x00 x00 x00 x03 x00 x00 x00 x01 x00 x00 x00 x14 x00 x00 x00 ................
x15 x1F x50 x47 ..PG x15 x1F x50 x47 ..PG
7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180 7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20180
7/4/14 5:05:50 PM :Time: 0:02.051: SENT, 9 bytes 7/4/14 5:05:50 PM :Time: 0:02.051: SENT, 9 bytes
x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P...... x00 x03 x50 x00 x00 x93 xFD xF7 xA2 ..P......
7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260 7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20260
7/4/14 5:05:50 PM :Time: 0:02.101: Received, 3 bytes 7/4/14 5:05:50 PM :Time: 0:02.101: Received, 3 bytes
x00 x01 x00 ... x00 x01 x00 ...
7/4/14 5:05:50 PM :Time: 0:02.101: Received, 4 bytes 7/4/14 5:05:50 PM :Time: 0:02.101: Received, 4 bytes
xD2 x02 xEF x8D .... xD2 x02 xEF x8D ....
7/4/14 5:05:50 PM :Time: 0:02.101: SENT, 13 bytes 7/4/14 5:05:50 PM :Time: 0:02.101: SENT, 13 bytes
x00 x07 x52 x00 x00 x00 x00 x00 x04 x2E x4B xE3 xF9 ..R.......K.. x00 x07 x52 x00 x00 x00 x00 x00 x04 x2E x4B xE3 xF9 ..R.......K..
7/4/14 5:05:50 PM :Time: 0:02.152: Received, 3 bytes 7/4/14 5:05:50 PM :Time: 0:02.152: Received, 3 bytes
x04 x01 x00 ... x04 x01 x00 ...
7/4/14 5:05:50 PM :Debug: Read page time: 51ms. 7/4/14 5:05:50 PM :Debug: Read page time: 51ms.
7/4/14 5:05:50 PM :Debug: Reading ECU Data, 1.0 complete 7/4/14 5:05:50 PM :Debug: Reading ECU Data, 1.0 complete
7/4/14 5:05:50 PM :Time: 0:02.152: Received, 1028 bytes 7/4/14 5:05:50 PM :Time: 0:02.152: Received, 1028 bytes
x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A x00 x00 x00 x00 x9A x99 xEF x42 x00 x00 x00 x41 x00 x00 x10 x41 .......B...A...A
x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA x00 x00 x20 x41 x00 x00 x30 x41 x00 x00 x40 x41 x00 x00 x50 x41 ...A..0A..@A..PA
@ -396,31 +396,31 @@ x04 x00 x00 x00 x00 x00 x00 x00 x01 x00 x00 x00 x00 x00 x00 x3F ..........
x01 x00 x00 x00 x00 x00 x00 x00 xA0 x52 x33 x01 x14 x00 x00 x00 .........R3..... x01 x00 x00 x00 x00 x00 x00 x00 xA0 x52 x33 x01 x14 x00 x00 x00 .........R3.....
x04 x00 x00 x00 x03 x00 x00 x00 x01 x00 x00 x00 x14 x00 x00 x00 ................ x04 x00 x00 x00 x03 x00 x00 x00 x01 x00 x00 x00 x14 x00 x00 x00 ................
x15 x1F x50 x47 ..PG x15 x1F x50 x47 ..PG
7/4/14 5:05:50 PM :Debug: Read All Data 7/4/14 5:05:50 PM :Debug: Read All Data
7/4/14 5:05:50 PM :Debug: isBlank Time: 0 ms. 7/4/14 5:05:50 PM :Debug: isBlank Time: 0 ms.
7/4/14 5:05:50 PM :Debug: Real OchDelay for MyCar: 50, timeout=300 7/4/14 5:05:50 PM :Debug: Real OchDelay for MyCar: 50, timeout=300
7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140 7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140
Time: 0:02.153: Processing Complete: Time: 0:02.153: Processing Complete:
7/4/14 5:05:50 PM :Time: 0:02.154: SENT, 7 bytes 7/4/14 5:05:50 PM :Time: 0:02.154: SENT, 7 bytes
x00 x01 x4F x34 x61 xB3 x8C ..O4a.. x00 x01 x4F x34 x61 xB3 x8C ..O4a..
7/4/14 5:05:50 PM :Debug: DiffTime: 6 ms. 7/4/14 5:05:50 PM :Debug: DiffTime: 6 ms.
7/4/14 5:05:50 PM :Debug: Time to get Panels = 0ms. 7/4/14 5:05:50 PM :Debug: Time to get Panels = 0ms.
7/4/14 5:05:50 PM :Debug: old style time to read outpc: 49 ms. 7/4/14 5:05:50 PM :Debug: old style time to read outpc: 49 ms.
7/4/14 5:05:50 PM :Time: 0:02.204: Received, 3 bytes 7/4/14 5:05:50 PM :Time: 0:02.204: Received, 3 bytes
x00 x35 x00 .5. x00 x35 x00 .5.
7/4/14 5:05:50 PM :Time: 0:02.204: Received, 56 bytes 7/4/14 5:05:50 PM :Time: 0:02.204: Received, 56 bytes
xF0 x00 x00 x00 x76 x30 x19 x42 x8F x86 x89 x42 xE0 x89 x9D x3E ....v0.B...B...> xF0 x00 x00 x00 x76 x30 x19 x42 x8F x86 x89 x42 xE0 x89 x9D x3E ....v0.B...B...>
x75 x4A x27 x3F x08 x84 x10 x41 x00 x00 x00 x00 x02 x0B x30 x3D uJ'?...A......0= x75 x4A x27 x3F x08 x84 x10 x41 x00 x00 x00 x00 x02 x0B x30 x3D uJ'?...A......0=
x66 x00 x00 x00 xB9 x8B x3B x42 x00 x00 xC0 x7F x01 x00 x00 x00 f.....;B....... x66 x00 x00 x00 xB9 x8B x3B x42 x00 x00 xC0 x7F x01 x00 x00 x00 f.....;B.......
xA0 xA7 x37 x42 x59 x00 x00 xCC ..7BY... xA0 xA7 x37 x42 x59 x00 x00 xCC ..7BY...
7/4/14 5:05:50 PM :Info: dr: 0:47 7/4/14 5:05:50 PM :Info: dr: 0:47
7/4/14 5:05:50 PM :Debug: Range Sort Time: 0 7/4/14 5:05:50 PM :Debug: Range Sort Time: 0
7/4/14 5:05:50 PM :Debug: Real OchDelay for MyCar: 50, timeout=300 7/4/14 5:05:50 PM :Debug: Real OchDelay for MyCar: 50, timeout=300
7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140 7/4/14 5:05:50 PM :Debug: commThreadExpectedReturnTime set to ms from now: 20140
7/4/14 5:05:50 PM :Time: 0:02.215: SENT, 7 bytes 7/4/14 5:05:50 PM :Time: 0:02.215: SENT, 7 bytes
x00 x01 x4F x34 x61 xB3 x8C ..O4a.. x00 x01 x4F x34 x61 xB3 x8C ..O4a..

1880
misc/ms_logs/page_issue/plain.TunerStudioAppDebug.first_launch.txt
View File

File diff suppressed because it is too large Load Diff

1046
misc/ms_logs/page_issue/plain.TunerStudioAppDebug.second_launch.txt
View File

File diff suppressed because it is too large Load Diff

154
misc/perf_test/eclipse_release_2012_06_21_1.txt
View File

@ -1,77 +1,77 @@
EFI_ANALOG_INPUTS=1 EFI_ANALOG_INPUTS=1
EFI_INTERNAL_ADC=1 EFI_INTERNAL_ADC=1
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.6.3 *** Kernel: 2.6.3
*** Compiled: Jun 21 2014 - 19:21:43 *** Compiled: Jun 21 2014 - 19:21:43
*** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083] *** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083]
*** Architecture: ARMv7-ME *** Architecture: ARMv7-ME
*** Core Variant: Cortex-M4F *** Core Variant: Cortex-M4F
*** Port Info: Advanced kernel mode *** Port Info: Advanced kernel mode
*** Platform: STM32F407/F417 High Performance with DSP and FPU *** Platform: STM32F407/F417 High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32F4-Discovery *** Test Board: STMicroelectronics STM32F4-Discovery
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.1 (Benchmark, messages #1) --- Test Case 1.1 (Benchmark, messages #1)
--- Score : 106846 msgs/S, 213692 ctxswc/S --- Score : 106846 msgs/S, 213692 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.2 (Benchmark, messages #2) --- Test Case 1.2 (Benchmark, messages #2)
--- Score : 91032 msgs/S, 182064 ctxswc/S --- Score : 91032 msgs/S, 182064 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.3 (Benchmark, messages #3) --- Test Case 1.3 (Benchmark, messages #3)
--- Score : 91062 msgs/S, 182124 ctxswc/S --- Score : 91062 msgs/S, 182124 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.4 (Benchmark, context switch) --- Test Case 1.4 (Benchmark, context switch)
--- Score : 380152 ctxswc/S --- Score : 380152 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.5 (Benchmark, threads, full cycle) --- Test Case 1.5 (Benchmark, threads, full cycle)
--- Score : 65031 threads/S --- Score : 65031 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.6 (Benchmark, threads, create only) --- Test Case 1.6 (Benchmark, threads, create only)
--- Score : 105088 threads/S --- Score : 105088 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 1.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 30909 reschedules/S, 185454 ctxswc/S --- Score : 30909 reschedules/S, 185454 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.8 (Benchmark, round robin context switching) --- Test Case 1.8 (Benchmark, round robin context switching)
--- Score : 250940 ctxswc/S --- Score : 250940 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.9 (Benchmark, I/O Queues throughput) --- Test Case 1.9 (Benchmark, I/O Queues throughput)
--- Score : 388708 bytes/S --- Score : 388708 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.10 (Benchmark, virtual timers set/reset) --- Test Case 1.10 (Benchmark, virtual timers set/reset)
--- Score : 343632 timers/S --- Score : 343632 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.11 (Benchmark, semaphores wait/signal) --- Test Case 1.11 (Benchmark, semaphores wait/signal)
--- Score : 307664 wait+signal/S --- Score : 307664 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.12 (Benchmark, mutexes lock/unlock) --- Test Case 1.12 (Benchmark, mutexes lock/unlock)
--- Score : 299168 lock+unlock/S --- Score : 299168 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.13 (Benchmark, RAM footprint) --- Test Case 1.13 (Benchmark, RAM footprint)
--- System: 3180 bytes --- System: 3180 bytes
--- Thread: 84 bytes --- Thread: 84 bytes
--- Timer : 20 bytes --- Timer : 20 bytes
--- Semaph: 12 bytes --- Semaph: 12 bytes
--- EventS: 4 bytes --- EventS: 4 bytes
--- EventL: 16 bytes --- EventL: 16 bytes
--- Mutex : 16 bytes --- Mutex : 16 bytes
--- CondV.: 8 bytes --- CondV.: 8 bytes
--- Queue : 36 bytes --- Queue : 36 bytes
--- MailB.: 40 bytes --- MailB.: 40 bytes
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------

158
misc/perf_test/eclipse_release_2012_06_21_2.txt
View File

@ -1,79 +1,79 @@
EFI_SHAFT_POSITION_INPUT=1 EFI_SHAFT_POSITION_INPUT=1
EFI_EMULATE_POSITION_SENSORS=0 EFI_EMULATE_POSITION_SENSORS=0
EFI_ANALOG_INPUTS=1 EFI_ANALOG_INPUTS=1
EFI_INTERNAL_ADC=1 EFI_INTERNAL_ADC=1
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.6.3 *** Kernel: 2.6.3
*** Compiled: Jun 21 2014 - 19:29:31 *** Compiled: Jun 21 2014 - 19:29:31
*** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083] *** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083]
*** Architecture: ARMv7-ME *** Architecture: ARMv7-ME
*** Core Variant: Cortex-M4F *** Core Variant: Cortex-M4F
*** Port Info: Advanced kernel mode *** Port Info: Advanced kernel mode
*** Platform: STM32F407/F417 High Performance with DSP and FPU *** Platform: STM32F407/F417 High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32F4-Discovery *** Test Board: STMicroelectronics STM32F4-Discovery
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.1 (Benchmark, messages #1) --- Test Case 1.1 (Benchmark, messages #1)
--- Score : 107257 msgs/S, 214514 ctxswc/S --- Score : 107257 msgs/S, 214514 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.2 (Benchmark, messages #2) --- Test Case 1.2 (Benchmark, messages #2)
--- Score : 91390 msgs/S, 182780 ctxswc/S --- Score : 91390 msgs/S, 182780 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.3 (Benchmark, messages #3) --- Test Case 1.3 (Benchmark, messages #3)
--- Score : 91494 msgs/S, 182988 ctxswc/S --- Score : 91494 msgs/S, 182988 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.4 (Benchmark, context switch) --- Test Case 1.4 (Benchmark, context switch)
--- Score : 381256 ctxswc/S --- Score : 381256 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.5 (Benchmark, threads, full cycle) --- Test Case 1.5 (Benchmark, threads, full cycle)
--- Score : 65280 threads/S --- Score : 65280 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.6 (Benchmark, threads, create only) --- Test Case 1.6 (Benchmark, threads, create only)
--- Score : 105550 threads/S --- Score : 105550 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 1.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 31046 reschedules/S, 186276 ctxswc/S --- Score : 31046 reschedules/S, 186276 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.8 (Benchmark, round robin context switching) --- Test Case 1.8 (Benchmark, round robin context switching)
--- Score : 251860 ctxswc/S --- Score : 251860 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.9 (Benchmark, I/O Queues throughput) --- Test Case 1.9 (Benchmark, I/O Queues throughput)
--- Score : 390116 bytes/S --- Score : 390116 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.10 (Benchmark, virtual timers set/reset) --- Test Case 1.10 (Benchmark, virtual timers set/reset)
--- Score : 350956 timers/S --- Score : 350956 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.11 (Benchmark, semaphores wait/signal) --- Test Case 1.11 (Benchmark, semaphores wait/signal)
--- Score : 308780 wait+signal/S --- Score : 308780 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.12 (Benchmark, mutexes lock/unlock) --- Test Case 1.12 (Benchmark, mutexes lock/unlock)
--- Score : 300260 lock+unlock/S --- Score : 300260 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.13 (Benchmark, RAM footprint) --- Test Case 1.13 (Benchmark, RAM footprint)
--- System: 3180 bytes --- System: 3180 bytes
--- Thread: 84 bytes --- Thread: 84 bytes
--- Timer : 20 bytes --- Timer : 20 bytes
--- Semaph: 12 bytes --- Semaph: 12 bytes
--- EventS: 4 bytes --- EventS: 4 bytes
--- EventL: 16 bytes --- EventL: 16 bytes
--- Mutex : 16 bytes --- Mutex : 16 bytes
--- CondV.: 8 bytes --- CondV.: 8 bytes
--- Queue : 36 bytes --- Queue : 36 bytes
--- MailB.: 40 bytes --- MailB.: 40 bytes
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------

168
misc/perf_test/eclipse_release_2012_06_21_3.txt
View File

@ -1,84 +1,84 @@
EFI_SHAFT_POSITION_INPUT=1 EFI_SHAFT_POSITION_INPUT=1
EFI_EMULATE_POSITION_SENSORS=0 EFI_EMULATE_POSITION_SENSORS=0
EFI_ANALOG_INPUTS=1 EFI_ANALOG_INPUTS=1
EFI_INTERNAL_ADC=0 EFI_INTERNAL_ADC=0
CH_DBG_SYSTEM_STATE_CHECK=1 CH_DBG_SYSTEM_STATE_CHECK=1
CH_DBG_ENABLE_CHECKS=0 CH_DBG_ENABLE_CHECKS=0
CH_DBG_ENABLE_ASSERTS=0 CH_DBG_ENABLE_ASSERTS=0
CH_DBG_ENABLE_STACK_CHECK=0 CH_DBG_ENABLE_STACK_CHECK=0
CH_DBG_THREADS_PROFILING=0 CH_DBG_THREADS_PROFILING=0
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.6.3 *** Kernel: 2.6.3
*** Compiled: Jun 21 2014 - 20:21:09 *** Compiled: Jun 21 2014 - 20:21:09
*** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083] *** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083]
*** Architecture: ARMv7-ME *** Architecture: ARMv7-ME
*** Core Variant: Cortex-M4F *** Core Variant: Cortex-M4F
*** Port Info: Advanced kernel mode *** Port Info: Advanced kernel mode
*** Platform: STM32F407/F417 High Performance with DSP and FPU *** Platform: STM32F407/F417 High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32F4-Discovery *** Test Board: STMicroelectronics STM32F4-Discovery
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.1 (Benchmark, messages #1) --- Test Case 1.1 (Benchmark, messages #1)
--- Score : 123421 msgs/S, 246842 ctxswc/S --- Score : 123421 msgs/S, 246842 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.2 (Benchmark, messages #2) --- Test Case 1.2 (Benchmark, messages #2)
--- Score : 105558 msgs/S, 211116 ctxswc/S --- Score : 105558 msgs/S, 211116 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.3 (Benchmark, messages #3) --- Test Case 1.3 (Benchmark, messages #3)
--- Score : 105671 msgs/S, 211342 ctxswc/S --- Score : 105671 msgs/S, 211342 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.4 (Benchmark, context switch) --- Test Case 1.4 (Benchmark, context switch)
--- Score : 471536 ctxswc/S --- Score : 471536 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.5 (Benchmark, threads, full cycle) --- Test Case 1.5 (Benchmark, threads, full cycle)
--- Score : 79851 threads/S --- Score : 79851 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.6 (Benchmark, threads, create only) --- Test Case 1.6 (Benchmark, threads, create only)
--- Score : 121381 threads/S --- Score : 121381 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 1.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 36893 reschedules/S, 221358 ctxswc/S --- Score : 36893 reschedules/S, 221358 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.8 (Benchmark, round robin context switching) --- Test Case 1.8 (Benchmark, round robin context switching)
--- Score : 297948 ctxswc/S --- Score : 297948 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.9 (Benchmark, I/O Queues throughput) --- Test Case 1.9 (Benchmark, I/O Queues throughput)
--- Score : 392824 bytes/S --- Score : 392824 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.10 (Benchmark, virtual timers set/reset) --- Test Case 1.10 (Benchmark, virtual timers set/reset)
--- Score : 379438 timers/S --- Score : 379438 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.11 (Benchmark, semaphores wait/signal) --- Test Case 1.11 (Benchmark, semaphores wait/signal)
--- Score : 358984 wait+signal/S --- Score : 358984 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.12 (Benchmark, mutexes lock/unlock) --- Test Case 1.12 (Benchmark, mutexes lock/unlock)
--- Score : 326936 lock+unlock/S --- Score : 326936 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.13 (Benchmark, RAM footprint) --- Test Case 1.13 (Benchmark, RAM footprint)
--- System: 3164 bytes --- System: 3164 bytes
--- Thread: 76 bytes --- Thread: 76 bytes
--- Timer : 20 bytes --- Timer : 20 bytes
--- Semaph: 12 bytes --- Semaph: 12 bytes
--- EventS: 4 bytes --- EventS: 4 bytes
--- EventL: 16 bytes --- EventL: 16 bytes
--- Mutex : 16 bytes --- Mutex : 16 bytes
--- CondV.: 8 bytes --- CondV.: 8 bytes
--- Queue : 36 bytes --- Queue : 36 bytes
--- MailB.: 40 bytes --- MailB.: 40 bytes
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------

182
misc/perf_test/eclipse_release_2012_06_21_4.txt
View File

@ -1,91 +1,91 @@
EFI_SHAFT_POSITION_INPUT=0 EFI_SHAFT_POSITION_INPUT=0
EFI_EMULATE_POSITION_SENSORS=0 EFI_EMULATE_POSITION_SENSORS=0
EFI_ANALOG_INPUTS=0 EFI_ANALOG_INPUTS=0
EFI_HD44780_LCD=0 EFI_HD44780_LCD=0
EFI_MAP_AVERAGING=0 EFI_MAP_AVERAGING=0
EFI_WAVE_ANALYZER=0 EFI_WAVE_ANALYZER=0
EFI_WAVE_CHART=0 EFI_WAVE_CHART=0
EFI_ANALOG_CHART=0 EFI_ANALOG_CHART=0
EFI_SHAFT_POSITION_INPUT=0 EFI_SHAFT_POSITION_INPUT=0
EFI_ENGINE_CONTROL=0 EFI_ENGINE_CONTROL=0
CH_DBG_SYSTEM_STATE_CHECK=1 CH_DBG_SYSTEM_STATE_CHECK=1
CH_DBG_ENABLE_CHECKS=0 CH_DBG_ENABLE_CHECKS=0
CH_DBG_ENABLE_ASSERTS=0 CH_DBG_ENABLE_ASSERTS=0
CH_DBG_ENABLE_STACK_CHECK=0 CH_DBG_ENABLE_STACK_CHECK=0
CH_DBG_THREADS_PROFILING=0 CH_DBG_THREADS_PROFILING=0
*** ChibiOS/RT test suite *** ChibiOS/RT test suite
*** ***
*** Kernel: 2.6.3 *** Kernel: 2.6.3
*** Compiled: Jun 21 2014 - 23:37:48 *** Compiled: Jun 21 2014 - 23:37:48
*** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083] *** Compiler: GCC 4.7.4 20130613 (release) [ARM/embedded-4_7-branch revision 200083]
*** Architecture: ARMv7-ME *** Architecture: ARMv7-ME
*** Core Variant: Cortex-M4F *** Core Variant: Cortex-M4F
*** Port Info: Advanced kernel mode *** Port Info: Advanced kernel mode
*** Platform: STM32F407/F417 High Performance with DSP and FPU *** Platform: STM32F407/F417 High Performance with DSP and FPU
*** Test Board: STMicroelectronics STM32F4-Discovery *** Test Board: STMicroelectronics STM32F4-Discovery
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.1 (Benchmark, messages #1) --- Test Case 1.1 (Benchmark, messages #1)
--- Score : 199330 msgs/S, 398660 ctxswc/S --- Score : 199330 msgs/S, 398660 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.2 (Benchmark, messages #2) --- Test Case 1.2 (Benchmark, messages #2)
--- Score : 170472 msgs/S, 340944 ctxswc/S --- Score : 170472 msgs/S, 340944 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.3 (Benchmark, messages #3) --- Test Case 1.3 (Benchmark, messages #3)
--- Score : 170471 msgs/S, 340942 ctxswc/S --- Score : 170471 msgs/S, 340942 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.4 (Benchmark, context switch) --- Test Case 1.4 (Benchmark, context switch)
--- Score : 756752 ctxswc/S --- Score : 756752 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.5 (Benchmark, threads, full cycle) --- Test Case 1.5 (Benchmark, threads, full cycle)
--- Score : 130042 threads/S --- Score : 130042 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.6 (Benchmark, threads, create only) --- Test Case 1.6 (Benchmark, threads, create only)
--- Score : 196372 threads/S --- Score : 196372 threads/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.7 (Benchmark, mass reschedule, 5 threads) --- Test Case 1.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 59609 reschedules/S, 357654 ctxswc/S --- Score : 59609 reschedules/S, 357654 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.8 (Benchmark, round robin context switching) --- Test Case 1.8 (Benchmark, round robin context switching)
--- Score : 479164 ctxswc/S --- Score : 479164 ctxswc/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.9 (Benchmark, I/O Queues throughput) --- Test Case 1.9 (Benchmark, I/O Queues throughput)
--- Score : 630204 bytes/S --- Score : 630204 bytes/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.10 (Benchmark, virtual timers set/reset) --- Test Case 1.10 (Benchmark, virtual timers set/reset)
--- Score : 611438 timers/S --- Score : 611438 timers/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.11 (Benchmark, semaphores wait/signal) --- Test Case 1.11 (Benchmark, semaphores wait/signal)
--- Score : 574200 wait+signal/S --- Score : 574200 wait+signal/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.12 (Benchmark, mutexes lock/unlock) --- Test Case 1.12 (Benchmark, mutexes lock/unlock)
--- Score : 523264 lock+unlock/S --- Score : 523264 lock+unlock/S
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
--- Test Case 1.13 (Benchmark, RAM footprint) --- Test Case 1.13 (Benchmark, RAM footprint)
--- System: 3164 bytes --- System: 3164 bytes
--- Thread: 76 bytes --- Thread: 76 bytes
--- Timer : 20 bytes --- Timer : 20 bytes
--- Semaph: 12 bytes --- Semaph: 12 bytes
--- EventS: 4 bytes --- EventS: 4 bytes
--- EventL: 16 bytes --- EventL: 16 bytes
--- Mutex : 16 bytes --- Mutex : 16 bytes
--- CondV.: 8 bytes --- CondV.: 8 bytes
--- Queue : 36 bytes --- Queue : 36 bytes
--- MailB.: 40 bytes --- MailB.: 40 bytes
--- Result: SUCCESS --- Result: SUCCESS
---------------------------------------------------------------------------- ----------------------------------------------------------------------------
Final result: SUCCESS Final result: SUCCESS

102
misc/stm32f1_test_project/.cproject
View File

@ -1,51 +1,51 @@
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<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.424462599" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.424462599" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool> </tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.1280737601" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder"> <tool id="org.eclipse.cdt.build.core.settings.holder.1280737601" name="GNU C++" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.49735864" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.49735864" languageId="org.eclipse.cdt.core.g++" languageName="GNU C++" sourceContentType="org.eclipse.cdt.core.cxxSource,org.eclipse.cdt.core.cxxHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool> </tool>
<tool id="org.eclipse.cdt.build.core.settings.holder.1205432135" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder"> <tool id="org.eclipse.cdt.build.core.settings.holder.1205432135" name="GNU C" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1755774820" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1755774820" languageId="org.eclipse.cdt.core.gcc" languageName="GNU C" sourceContentType="org.eclipse.cdt.core.cSource,org.eclipse.cdt.core.cHeader" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
</tool> </tool>
</toolChain> </toolChain>
</folderInfo> </folderInfo>
</configuration> </configuration>
</storageModule> </storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration> </cconfiguration>
</storageModule> </storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0"> <storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="ARMCM3-STM32F103RB-NUCLEO.null.494699019" name="ARMCM3-STM32F103RB-NUCLEO"/> <project id="ARMCM3-STM32F103RB-NUCLEO.null.494699019" name="ARMCM3-STM32F103RB-NUCLEO"/>
</storageModule> </storageModule>
<storageModule moduleId="scannerConfiguration"> <storageModule moduleId="scannerConfiguration">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
<scannerConfigBuildInfo instanceId="0.539548154"> <scannerConfigBuildInfo instanceId="0.539548154">
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/> <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile"/>
</scannerConfigBuildInfo> </scannerConfigBuildInfo>
</storageModule> </storageModule>
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
</cproject> </cproject>

86
misc/stm32f1_test_project/.project
View File

@ -1,43 +1,43 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<projectDescription> <projectDescription>
<name>ARMCM3-STM32F103RB-NUCLEO</name> <name>ARMCM3-STM32F103RB-NUCLEO</name>
<comment></comment> <comment></comment>
<projects> <projects>
</projects> </projects>
<buildSpec> <buildSpec>
<buildCommand> <buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers> <triggers>clean,full,incremental,</triggers>
<arguments> <arguments>
</arguments> </arguments>
</buildCommand> </buildCommand>
<buildCommand> <buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers> <triggers>full,incremental,</triggers>
<arguments> <arguments>
</arguments> </arguments>
</buildCommand> </buildCommand>
</buildSpec> </buildSpec>
<natures> <natures>
<nature>org.eclipse.cdt.core.cnature</nature> <nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures> </natures>
<linkedResources> <linkedResources>
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_NUCLEO_F103RB</locationURI> <locationURI>CHIBIOS/boards/ST_NUCLEO_F103RB</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/os</locationURI> <locationURI>CHIBIOS/os</locationURI>
</link> </link>
<link> <link>
<name>test</name> <name>test</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/test</locationURI> <locationURI>CHIBIOS/test</locationURI>
</link> </link>
</linkedResources> </linkedResources>
</projectDescription> </projectDescription>

412
misc/stm32f1_test_project/Makefile
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@ -1,206 +1,206 @@
############################################################################## ##############################################################################
# Build global options # Build global options
# NOTE: Can be overridden externally. # NOTE: Can be overridden externally.
# #
# Compiler options here. # Compiler options here.
ifeq ($(USE_OPT),) ifeq ($(USE_OPT),)
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
endif endif
# C specific options here (added to USE_OPT). # C specific options here (added to USE_OPT).
ifeq ($(USE_COPT),) ifeq ($(USE_COPT),)
USE_COPT = USE_COPT =
endif endif
# C++ specific options here (added to USE_OPT). # C++ specific options here (added to USE_OPT).
ifeq ($(USE_CPPOPT),) ifeq ($(USE_CPPOPT),)
USE_CPPOPT = -fno-rtti USE_CPPOPT = -fno-rtti
endif endif
# Enable this if you want the linker to remove unused code and data # Enable this if you want the linker to remove unused code and data
ifeq ($(USE_LINK_GC),) ifeq ($(USE_LINK_GC),)
USE_LINK_GC = yes USE_LINK_GC = yes
endif endif
# Linker extra options here. # Linker extra options here.
ifeq ($(USE_LDOPT),) ifeq ($(USE_LDOPT),)
USE_LDOPT = USE_LDOPT =
endif endif
# Enable this if you want link time optimizations (LTO) # Enable this if you want link time optimizations (LTO)
ifeq ($(USE_LTO),) ifeq ($(USE_LTO),)
USE_LTO = no USE_LTO = no
endif endif
# If enabled, this option allows to compile the application in THUMB mode. # If enabled, this option allows to compile the application in THUMB mode.
ifeq ($(USE_THUMB),) ifeq ($(USE_THUMB),)
USE_THUMB = yes USE_THUMB = yes
endif endif
# Enable this if you want to see the full log while compiling. # Enable this if you want to see the full log while compiling.
ifeq ($(USE_VERBOSE_COMPILE),) ifeq ($(USE_VERBOSE_COMPILE),)
USE_VERBOSE_COMPILE = no USE_VERBOSE_COMPILE = no
endif endif
# #
# Build global options # Build global options
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Architecture or project specific options # Architecture or project specific options
# #
# #
# Architecture or project specific options # Architecture or project specific options
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Project, sources and paths # Project, sources and paths
# #
# Define project name here # Define project name here
PROJECT = ch PROJECT = ch
# Imported source files and paths # Imported source files and paths
CHIBIOS = ../../firmware/chibios CHIBIOS = ../../firmware/chibios
include $(CHIBIOS)/boards/ST_NUCLEO_F103RB/board.mk include $(CHIBIOS)/boards/ST_NUCLEO_F103RB/board.mk
include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk
include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk
include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/os/kernel/kernel.mk
#include $(CHIBIOS)/test/test.mk #include $(CHIBIOS)/test/test.mk
# Define linker script file here # Define linker script file here
LDSCRIPT= $(CHIBIOS)/../config/stm32f1egt/STM32F103xB.ld LDSCRIPT= $(CHIBIOS)/../config/stm32f1egt/STM32F103xB.ld
# C sources that can be compiled in ARM or THUMB mode depending on the global # C sources that can be compiled in ARM or THUMB mode depending on the global
# setting. # setting.
CSRC = $(PORTSRC) \ CSRC = $(PORTSRC) \
$(KERNSRC) \ $(KERNSRC) \
$(HALSRC) \ $(HALSRC) \
$(PLATFORMSRC) \ $(PLATFORMSRC) \
$(BOARDSRC) \ $(BOARDSRC) \
main.c main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global # C++ sources that can be compiled in ARM or THUMB mode depending on the global
# setting. # setting.
CPPSRC = CPPSRC =
# C sources to be compiled in ARM mode regardless of the global setting. # C sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size. # option that results in lower performance and larger code size.
ACSRC = ACSRC =
# C++ sources to be compiled in ARM mode regardless of the global setting. # C++ sources to be compiled in ARM mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size. # option that results in lower performance and larger code size.
ACPPSRC = ACPPSRC =
# C sources to be compiled in THUMB mode regardless of the global setting. # C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size. # option that results in lower performance and larger code size.
TCSRC = TCSRC =
# C sources to be compiled in THUMB mode regardless of the global setting. # C sources to be compiled in THUMB mode regardless of the global setting.
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler # NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
# option that results in lower performance and larger code size. # option that results in lower performance and larger code size.
TCPPSRC = TCPPSRC =
# List ASM source files here # List ASM source files here
ASMSRC = $(PORTASM) ASMSRC = $(PORTASM)
INCDIR = $(PORTINC) $(KERNINC) \ INCDIR = $(PORTINC) $(KERNINC) \
$(HALINC) $(PLATFORMINC) $(BOARDINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \
$(CHIBIOS)/os/various $(CHIBIOS)/os/various
# #
# Project, sources and paths # Project, sources and paths
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Compiler settings # Compiler settings
# #
MCU = cortex-m3 MCU = cortex-m3
#TRGT = arm-elf- #TRGT = arm-elf-
TRGT = arm-none-eabi- TRGT = arm-none-eabi-
CC = $(TRGT)gcc CC = $(TRGT)gcc
CPPC = $(TRGT)g++ CPPC = $(TRGT)g++
# Enable loading with g++ only if you need C++ runtime support. # Enable loading with g++ only if you need C++ runtime support.
# NOTE: You can use C++ even without C++ support if you are careful. C++ # NOTE: You can use C++ even without C++ support if you are careful. C++
# runtime support makes code size explode. # runtime support makes code size explode.
LD = $(TRGT)gcc LD = $(TRGT)gcc
#LD = $(TRGT)g++ #LD = $(TRGT)g++
CP = $(TRGT)objcopy CP = $(TRGT)objcopy
AS = $(TRGT)gcc -x assembler-with-cpp AS = $(TRGT)gcc -x assembler-with-cpp
OD = $(TRGT)objdump OD = $(TRGT)objdump
SZ = $(TRGT)size SZ = $(TRGT)size
HEX = $(CP) -O ihex HEX = $(CP) -O ihex
BIN = $(CP) -O binary BIN = $(CP) -O binary
# ARM-specific options here # ARM-specific options here
AOPT = AOPT =
# THUMB-specific options here # THUMB-specific options here
TOPT = -mthumb -DTHUMB TOPT = -mthumb -DTHUMB
# Define C warning options here # Define C warning options here
CWARN = -Wall -Wextra -Wstrict-prototypes CWARN = -Wall -Wextra -Wstrict-prototypes
# Define C++ warning options here # Define C++ warning options here
CPPWARN = -Wall -Wextra CPPWARN = -Wall -Wextra
# #
# Compiler settings # Compiler settings
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Start of default section # Start of default section
# #
# List all default C defines here, like -D_DEBUG=1 # List all default C defines here, like -D_DEBUG=1
DDEFS = DDEFS =
# List all default ASM defines here, like -D_DEBUG=1 # List all default ASM defines here, like -D_DEBUG=1
DADEFS = DADEFS =
# List all default directories to look for include files here # List all default directories to look for include files here
DINCDIR = DINCDIR =
# List the default directory to look for the libraries here # List the default directory to look for the libraries here
DLIBDIR = DLIBDIR =
# List all default libraries here # List all default libraries here
DLIBS = DLIBS =
# #
# End of default section # End of default section
############################################################################## ##############################################################################
############################################################################## ##############################################################################
# Start of user section # Start of user section
# #
# List all user C define here, like -D_DEBUG=1 # List all user C define here, like -D_DEBUG=1
UDEFS = UDEFS =
# Define ASM defines here # Define ASM defines here
UADEFS = UADEFS =
# List all user directories here # List all user directories here
UINCDIR = UINCDIR =
# List the user directory to look for the libraries here # List the user directory to look for the libraries here
ULIBDIR = ULIBDIR =
# List all user libraries here # List all user libraries here
ULIBS = ULIBS =
# #
# End of user defines # End of user defines
############################################################################## ##############################################################################
RULESPATH = $(CHIBIOS)/os/ports/GCC/ARMCMx RULESPATH = $(CHIBIOS)/os/ports/GCC/ARMCMx
include $(RULESPATH)/rules.mk include $(RULESPATH)/rules.mk

674
misc/stm32f1_test_project/build/ch.hex
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rem make, gcc, Windows and Cygwin combined have some issue with spaces or colons in paths, that's a workaround rem make, gcc, Windows and Cygwin combined have some issue with spaces or colons in paths, that's a workaround
rem that's more or less 'make clean' rem that's more or less 'make clean'
rd /s /q .dep rd /s /q .dep
rd /s /q build rd /s /q build
# that's 'make' with some extra utilities # that's 'make' with some extra utilities
compile.bat compile.bat

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rd /s /q .dep rd /s /q .dep
echo Starting compilation echo Starting compilation
rem the important piece rem the important piece
make make

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@ -1 +1 @@
st-link_cli -c SWD ur -P build\ch.hex -Rst -Run st-link_cli -c SWD ur -P build\ch.hex -Rst -Run

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misc/stm32f1_test_project/halconf.h
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@ -1,312 +1,312 @@
/* /*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
You may obtain a copy of the License at You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0 http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
*/ */
/** /**
* @file templates/halconf.h * @file templates/halconf.h
* @brief HAL configuration header. * @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the * @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use * various device drivers from your application. You may also use
* this file in order to override the device drivers default settings. * this file in order to override the device drivers default settings.
* *
* @addtogroup HAL_CONF * @addtogroup HAL_CONF
* @{ * @{
*/ */
#ifndef _HALCONF_H_ #ifndef _HALCONF_H_
#define _HALCONF_H_ #define _HALCONF_H_
#include "mcuconf.h" #include "mcuconf.h"
/** /**
* @brief Enables the TM subsystem. * @brief Enables the TM subsystem.
*/ */
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) #if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM TRUE #define HAL_USE_TM TRUE
#endif #endif
/** /**
* @brief Enables the PAL subsystem. * @brief Enables the PAL subsystem.
*/ */
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE #define HAL_USE_PAL TRUE
#endif #endif
/** /**
* @brief Enables the ADC subsystem. * @brief Enables the ADC subsystem.
*/ */
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC FALSE #define HAL_USE_ADC FALSE
#endif #endif
/** /**
* @brief Enables the CAN subsystem. * @brief Enables the CAN subsystem.
*/ */
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE #define HAL_USE_CAN FALSE
#endif #endif
/** /**
* @brief Enables the EXT subsystem. * @brief Enables the EXT subsystem.
*/ */
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE #define HAL_USE_EXT FALSE
#endif #endif
/** /**
* @brief Enables the GPT subsystem. * @brief Enables the GPT subsystem.
*/ */
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE #define HAL_USE_GPT FALSE
#endif #endif
/** /**
* @brief Enables the I2C subsystem. * @brief Enables the I2C subsystem.
*/ */
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C FALSE #define HAL_USE_I2C FALSE
#endif #endif
/** /**
* @brief Enables the ICU subsystem. * @brief Enables the ICU subsystem.
*/ */
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE #define HAL_USE_ICU FALSE
#endif #endif
/** /**
* @brief Enables the MAC subsystem. * @brief Enables the MAC subsystem.
*/ */
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE #define HAL_USE_MAC FALSE
#endif #endif
/** /**
* @brief Enables the MMC_SPI subsystem. * @brief Enables the MMC_SPI subsystem.
*/ */
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE #define HAL_USE_MMC_SPI FALSE
#endif #endif
/** /**
* @brief Enables the PWM subsystem. * @brief Enables the PWM subsystem.
*/ */
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE #define HAL_USE_PWM FALSE
#endif #endif
/** /**
* @brief Enables the RTC subsystem. * @brief Enables the RTC subsystem.
*/ */
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE #define HAL_USE_RTC FALSE
#endif #endif
/** /**
* @brief Enables the SDC subsystem. * @brief Enables the SDC subsystem.
*/ */
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE #define HAL_USE_SDC FALSE
#endif #endif
/** /**
* @brief Enables the SERIAL subsystem. * @brief Enables the SERIAL subsystem.
*/ */
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL TRUE #define HAL_USE_SERIAL TRUE
#endif #endif
/** /**
* @brief Enables the SERIAL over USB subsystem. * @brief Enables the SERIAL over USB subsystem.
*/ */
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB FALSE #define HAL_USE_SERIAL_USB FALSE
#endif #endif
/** /**
* @brief Enables the SPI subsystem. * @brief Enables the SPI subsystem.
*/ */
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE #define HAL_USE_SPI FALSE
#endif #endif
/** /**
* @brief Enables the UART subsystem. * @brief Enables the UART subsystem.
*/ */
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) #if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE #define HAL_USE_UART FALSE
#endif #endif
/** /**
* @brief Enables the USB subsystem. * @brief Enables the USB subsystem.
*/ */
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) #if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB FALSE #define HAL_USE_USB FALSE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* ADC driver related settings. */ /* ADC driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Enables synchronous APIs. * @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE #define ADC_USE_WAIT TRUE
#endif #endif
/** /**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE #define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* CAN driver related settings. */ /* CAN driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Sleep mode related APIs inclusion switch. * @brief Sleep mode related APIs inclusion switch.
*/ */
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE #define CAN_USE_SLEEP_MODE TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* I2C driver related settings. */ /* I2C driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Enables the mutual exclusion APIs on the I2C bus. * @brief Enables the mutual exclusion APIs on the I2C bus.
*/ */
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE #define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* MAC driver related settings. */ /* MAC driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Enables an event sources for incoming packets. * @brief Enables an event sources for incoming packets.
*/ */
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE #define MAC_USE_ZERO_COPY FALSE
#endif #endif
/** /**
* @brief Enables an event sources for incoming packets. * @brief Enables an event sources for incoming packets.
*/ */
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE #define MAC_USE_EVENTS TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* MMC_SPI driver related settings. */ /* MMC_SPI driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Delays insertions. * @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting * @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with * routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however. * lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not * This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU. * use a DMA channel and heavily loads the CPU.
*/ */
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE #define MMC_NICE_WAITING TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* SDC driver related settings. */ /* SDC driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Number of initialization attempts before rejecting the card. * @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals. * @note Attempts are performed at 10mS intervals.
*/ */
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100 #define SDC_INIT_RETRY 100
#endif #endif
/** /**
* @brief Include support for MMC cards. * @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept * @note MMC support is not yet implemented so this option must be kept
* at @p FALSE. * at @p FALSE.
*/ */
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE #define SDC_MMC_SUPPORT FALSE
#endif #endif
/** /**
* @brief Delays insertions. * @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting * @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with * routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however. * lower priority, this may slow down the driver a bit however.
*/ */
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE #define SDC_NICE_WAITING TRUE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* SERIAL driver related settings. */ /* SERIAL driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Default bit rate. * @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the * @details Configuration parameter, this is the baud rate selected for the
* default configuration. * default configuration.
*/ */
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400 #define SERIAL_DEFAULT_BITRATE 38400
#endif #endif
/** /**
* @brief Serial buffers size. * @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue * @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application. * buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive * @note The default is 64 bytes for both the transmission and receive
* buffers. * buffers.
*/ */
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16 #define SERIAL_BUFFERS_SIZE 16
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
/* SPI driver related settings. */ /* SPI driver related settings. */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Enables synchronous APIs. * @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE #define SPI_USE_WAIT TRUE
#endif #endif
/** /**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE #define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif #endif
#endif /* _HALCONF_H_ */ #endif /* _HALCONF_H_ */
/** @} */ /** @} */

156
misc/stm32f1_test_project/main.c
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@ -1,78 +1,78 @@
/* /*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
You may obtain a copy of the License at You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0 http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
*/ */
#include "ch.h" #include "ch.h"
#include "hal.h" #include "hal.h"
#define BL_PORT GPIOC #define BL_PORT GPIOC
#define BL_PIN 13 #define BL_PIN 13
/* /*
* Red LED blinker thread, times are in milliseconds. * Red LED blinker thread, times are in milliseconds.
*/ */
static WORKING_AREA(waThread1, 128); static WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) { static msg_t Thread1(void *arg) {
(void)arg; (void)arg;
chRegSetThreadName("blinker"); chRegSetThreadName("blinker");
while (TRUE) { while (TRUE) {
palClearPad(BL_PORT, BL_PIN); palClearPad(BL_PORT, BL_PIN);
chThdSleepMilliseconds(30); chThdSleepMilliseconds(30);
palSetPad(BL_PORT, BL_PIN); palSetPad(BL_PORT, BL_PIN);
chThdSleepMilliseconds(30); chThdSleepMilliseconds(30);
} }
return 0; return 0;
} }
/* /*
* Application entry point. * Application entry point.
*/ */
int main(void) { int main(void) {
/* /*
* System initializations. * System initializations.
* - HAL initialization, this also initializes the configured device drivers * - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations. * and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the * - Kernel initialization, the main() function becomes a thread and the
* RTOS is active. * RTOS is active.
*/ */
halInit(); halInit();
chSysInit(); chSysInit();
/* /*
* Activates the serial driver 2 using the driver default configuration. * Activates the serial driver 2 using the driver default configuration.
*/ */
sdStart(&SD2, NULL); sdStart(&SD2, NULL);
palSetPadMode(BL_PORT, BL_PIN, PAL_MODE_OUTPUT_PUSHPULL); palSetPadMode(BL_PORT, BL_PIN, PAL_MODE_OUTPUT_PUSHPULL);
/* /*
* Creates the blinker thread. * Creates the blinker thread.
*/ */
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/* /*
* Normal main() thread activity, in this demo it does nothing except * Normal main() thread activity, in this demo it does nothing except
* sleeping in a loop and check the button state. * sleeping in a loop and check the button state.
*/ */
while (TRUE) { while (TRUE) {
// if (!palReadPad(GPIOC, GPIOC_BUTTON)) // if (!palReadPad(GPIOC, GPIOC_BUTTON))
// TestThread(&SD2); // TestThread(&SD2);
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
} }
} }

398
misc/stm32f1_test_project/mcuconf.h
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@ -1,199 +1,199 @@
/* /*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
You may obtain a copy of the License at You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0 http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS, distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and See the License for the specific language governing permissions and
limitations under the License. limitations under the License.
*/ */
#define STM32F103_MCUCONF #define STM32F103_MCUCONF
/* /*
* STM32F103 drivers configuration. * STM32F103 drivers configuration.
* The following settings override the default settings present in * The following settings override the default settings present in
* the various device driver implementation headers. * the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole * Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h. * driver is enabled in halconf.h.
* *
* IRQ priorities: * IRQ priorities:
* 15...0 Lowest...Highest. * 15...0 Lowest...Highest.
* *
* DMA priorities: * DMA priorities:
* 0...3 Lowest...Highest. * 0...3 Lowest...Highest.
*/ */
/* /*
* HAL driver system settings. * HAL driver system settings.
*/ */
#define STM32_NO_INIT FALSE #define STM32_NO_INIT FALSE
#define STM32_HSI_ENABLED TRUE #define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED FALSE #define STM32_LSI_ENABLED FALSE
#define STM32_HSE_ENABLED FALSE #define STM32_HSE_ENABLED FALSE
#define STM32_LSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE
#define STM32_SW STM32_SW_PLL #define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSI #define STM32_PLLSRC STM32_PLLSRC_HSI
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 12 #define STM32_PLLMUL_VALUE 12
#define STM32_HPRE STM32_HPRE_DIV1 #define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE1 STM32_PPRE1_DIV2
#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_ADCPRE STM32_ADCPRE_DIV4
#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USB_CLOCK_REQUIRED TRUE
#define STM32_USBPRE STM32_USBPRE_DIV1 #define STM32_USBPRE STM32_USBPRE_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_RTCSEL STM32_RTCSEL_NOCLOCK #define STM32_RTCSEL STM32_RTCSEL_NOCLOCK
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
/* /*
* ADC driver system settings. * ADC driver system settings.
*/ */
#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC1_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_IRQ_PRIORITY 6
/* /*
* CAN driver system settings. * CAN driver system settings.
*/ */
#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_USE_CAN1 FALSE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11 #define STM32_CAN_CAN1_IRQ_PRIORITY 11
/* /*
* EXT driver system settings. * EXT driver system settings.
*/ */
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 #define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 #define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 #define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 #define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 #define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI17_IRQ_PRIORITY 6
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7
/* /*
* I2C driver system settings. * I2C driver system settings.
*/ */
#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C2 FALSE
#define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_IRQ_PRIORITY 5
#define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5
#define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
/* /*
* ICU driver system settings. * ICU driver system settings.
*/ */
#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7
/* /*
* RTC driver system settings. * RTC driver system settings.
*/ */
#define STM32_RTC_IRQ_PRIORITY 15 #define STM32_RTC_IRQ_PRIORITY 15
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.
*/ */
#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART2 TRUE
#define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12
/* /*
* SPI driver system settings. * SPI driver system settings.
*/ */
#define STM32_SPI_USE_SPI1 FALSE #define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()
/* /*
* UART driver system settings. * UART driver system settings.
*/ */
#define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
/* /*
* USB driver system settings. * USB driver system settings.
*/ */
#define STM32_USB_USE_USB1 FALSE #define STM32_USB_USE_USB1 FALSE
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_HP_IRQ_PRIORITY 13
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14

56
misc/stm32f1_test_project/readme.txt
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@ -1,28 +1,28 @@
***************************************************************************** *****************************************************************************
** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. ** ** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. **
***************************************************************************** *****************************************************************************
** TARGET ** ** TARGET **
The demo runs on an ST_NUCLEO_F103RB board. The demo runs on an ST_NUCLEO_F103RB board.
** The Demo ** ** The Demo **
The demo flashes the board LED using a thread, by pressing the button located The demo flashes the board LED using a thread, by pressing the button located
on the board the test procedure is activated with output on the serial port on the board the test procedure is activated with output on the serial port
SD2 (USART2, mapped on USB virtual COM port). SD2 (USART2, mapped on USB virtual COM port).
** Build Procedure ** ** Build Procedure **
The demo has been tested by using the free Codesourcery GCC-based toolchain The demo has been tested by using the free Codesourcery GCC-based toolchain
and YAGARTO. and YAGARTO.
Just modify the TRGT line in the makefile in order to use different GCC ports. Just modify the TRGT line in the makefile in order to use different GCC ports.
** Notes ** ** Notes **
Some files used by the demo are not part of ChibiOS/RT but are copyright of Some files used by the demo are not part of ChibiOS/RT but are copyright of
ST Microelectronics and are licensed under a different license. ST Microelectronics and are licensed under a different license.
Also note that not all the files present in the ST library are distributed Also note that not all the files present in the ST library are distributed
with ChibiOS/RT, you can find the whole library on the ST web site: with ChibiOS/RT, you can find the whole library on the ST web site:
http://www.st.com http://www.st.com

84
misc/svn2git.bat
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@ -1,42 +1,42 @@
echo This script should be executed from the root of rusEfi trunk SVN local copy echo This script should be executed from the root of rusEfi trunk SVN local copy
pwd pwd
echo Updating from SVN echo Updating from SVN
call svn update call svn update
set RUSEFI_GIT_PATH=../rusefi.github/rusefi set RUSEFI_GIT_PATH=../rusefi.github/rusefi
ls -l %RUSEFI_GIT_PATH% ls -l %RUSEFI_GIT_PATH%
rd /s /q %RUSEFI_GIT_PATH%\firmware rd /s /q %RUSEFI_GIT_PATH%\firmware
rd /s /q %RUSEFI_GIT_PATH%\hardware rd /s /q %RUSEFI_GIT_PATH%\hardware
rd /s /q %RUSEFI_GIT_PATH%\java_console rd /s /q %RUSEFI_GIT_PATH%\java_console
rd /s /q %RUSEFI_GIT_PATH%\unit_tests rd /s /q %RUSEFI_GIT_PATH%\unit_tests
rd /s /q %RUSEFI_GIT_PATH%\win32_functional_tests rd /s /q %RUSEFI_GIT_PATH%\win32_functional_tests
cp -r firmware %RUSEFI_GIT_PATH% cp -r firmware %RUSEFI_GIT_PATH%
cp -r hardware %RUSEFI_GIT_PATH% cp -r hardware %RUSEFI_GIT_PATH%
cp -r java_console %RUSEFI_GIT_PATH% cp -r java_console %RUSEFI_GIT_PATH%
cp -r unit_tests %RUSEFI_GIT_PATH% cp -r unit_tests %RUSEFI_GIT_PATH%
cp -r win32_functional_tests %RUSEFI_GIT_PATH% cp -r win32_functional_tests %RUSEFI_GIT_PATH%
rm -f %RUSEFI_GIT_PATH%/readme.* rm -f %RUSEFI_GIT_PATH%/readme.*
rm -f %RUSEFI_GIT_PATH%/README.* rm -f %RUSEFI_GIT_PATH%/README.*
cp -r README.* %RUSEFI_GIT_PATH% cp -r README.* %RUSEFI_GIT_PATH%
cp -r readme.* %RUSEFI_GIT_PATH% cp -r readme.* %RUSEFI_GIT_PATH%
echo Going to git copy location echo Going to git copy location
cd %RUSEFI_GIT_PATH% cd %RUSEFI_GIT_PATH%
git config --global user.email "russianefi@gmail.com" git config --global user.email "russianefi@gmail.com"
git config --global user.name "rusEfi" git config --global user.name "rusEfi"
git pull git pull
git add * git add *
git commit -a -m "auto-sync" git commit -a -m "auto-sync"
git push --repo https://rusefi:PASSWORD@github.com/rusefi/rusefi git push --repo https://rusefi:PASSWORD@github.com/rusefi/rusefi

18
misc/svn2git_init.bat
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@ -1,9 +1,9 @@
rd /s /q c:\stuff\rusefi.svn2git rd /s /q c:\stuff\rusefi.svn2git
mkdir -p c:\stuff\rusefi.svn2git\rusefi.svn mkdir -p c:\stuff\rusefi.svn2git\rusefi.svn
cd c:\stuff\rusefi.svn2git\rusefi.svn cd c:\stuff\rusefi.svn2git\rusefi.svn
svn co https://svn.code.sf.net/p/rusefi/code/trunk/ . svn co https://svn.code.sf.net/p/rusefi/code/trunk/ .
mkdir -p c:\stuff\rusefi.svn2git\rusefi.github mkdir -p c:\stuff\rusefi.svn2git\rusefi.github
cd c:\stuff\rusefi.svn2git\rusefi.github cd c:\stuff\rusefi.svn2git\rusefi.github
git clone https://github.com/rusefi/rusefi.git git clone https://github.com/rusefi/rusefi.git

44
misc/test_bundle.bat
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@ -1,23 +1,23 @@
echo Statding test_bundle.bat echo Statding test_bundle.bat
cd java_console cd java_console
rem call ant autotest rem call ant autotest
rem IF NOT ERRORLEVEL 0 echo auto test ERROR DETECTED rem IF NOT ERRORLEVEL 0 echo auto test ERROR DETECTED
rem IF NOT ERRORLEVEL 0 EXIT /B 1 rem IF NOT ERRORLEVEL 0 EXIT /B 1
cd .. cd ..
pwd pwd
echo Cleaning echo Cleaning
cd firmware cd firmware
call clean.bat call clean.bat
cd .. cd ..
cd misc cd misc
call hw_test.bat call hw_test.bat
IF NOT ERRORLEVEL 0 echo real hardware test ERROR DETECTED IF NOT ERRORLEVEL 0 echo real hardware test ERROR DETECTED
IF NOT ERRORLEVEL 0 EXIT /B 1 IF NOT ERRORLEVEL 0 EXIT /B 1
cd .. cd ..
pwd pwd
echo %date% %time% echo %date% %time%
echo test_bundle.bat: done echo test_bundle.bat: done

96
misc/unit_tests.bat
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@ -1,48 +1,48 @@
echo I am unit_tests.bat echo I am unit_tests.bat
cd firmware cd firmware
echo "CD to ${PWD}" echo "CD to ${PWD}"
rm -fR .dep rm -fR .dep
rm -fR build rm -fR build
java -jar ../java_tools/version2header.jar java -jar ../java_tools/version2header.jar
make make
if not exist build/rusefi.hex echo FAILED TO COMPILE FIRMWARE if not exist build/rusefi.hex echo FAILED TO COMPILE FIRMWARE
if not exist build/rusefi.hex exit -1 if not exist build/rusefi.hex exit -1
cd .. cd ..
echo We are in root folder echo We are in root folder
pwd pwd
cd unit_tests cd unit_tests
call compile.bat call compile.bat
pwd pwd
ls -l build ls -l build
if not exist build/rusefi_test.exe echo FAILED TO COMPILE UNIT TESTS if not exist build/rusefi_test.exe echo FAILED TO COMPILE UNIT TESTS
if not exist build/rusefi_test.exe exit -1 if not exist build/rusefi_test.exe exit -1
echo Unit tests build looks good, now executing unit tests echo Unit tests build looks good, now executing unit tests
cd build cd build
call rusefi_test.exe call rusefi_test.exe
IF NOT ERRORLEVEL echo UNIT TEST FAILED IF NOT ERRORLEVEL echo UNIT TEST FAILED
IF NOT ERRORLEVEL 0 EXIT /B 1 IF NOT ERRORLEVEL 0 EXIT /B 1
cd .. cd ..
cd .. cd ..
echo Back to root folder echo Back to root folder
pwd pwd
echo Preparing firmware-only fast upload echo Preparing firmware-only fast upload
zip -j firmware/build/rusefi_firmware.zip firmware/svnversion.h firmware/build/rusefi.hex firmware/build/rusefi.bin firmware/build/rusefi.elf firmware/tunerstudio/rusefi.ini zip -j firmware/build/rusefi_firmware.zip firmware/svnversion.h firmware/build/rusefi.hex firmware/build/rusefi.bin firmware/build/rusefi.elf firmware/tunerstudio/rusefi.ini
echo Now uploading only firmware echo Now uploading only firmware
ncftpput -u u71977750-build -p %RUSEFI_BUILD_FTP_PASS% rusefi.com separate_files firmware/build/rusefi_firmware.zip ncftpput -u u71977750-build -p %RUSEFI_BUILD_FTP_PASS% rusefi.com separate_files firmware/build/rusefi_firmware.zip