mirror of https://github.com/rusefi/wideband.git
f1_rev2: add OpenBLT (#92)
(cherry picked from commit 85e1ac8e5e75e22b247db0f5a512656453425729) Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
This commit is contained in:
rusefillc
GitHub
parent
d3d260b828
commit
076406e4b0
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@ -2,8 +2,13 @@
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set -e
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cd openblt
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# build bootloader
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make -j12 BOARD=f1_rev2
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# back out to the root
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cd ../..
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cd ../../..
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export EXTRA_PARAMS="-DECHO_UART=TRUE"
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@ -0,0 +1,180 @@
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#****************************************************************************************
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#| Description: Makefile for GNU ARM Embedded toolchain.
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#| File Name: makefile
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#|
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#|---------------------------------------------------------------------------------------
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#| C O P Y R I G H T
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#|---------------------------------------------------------------------------------------
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#| Copyright (c) 2017 by Feaser http://www.feaser.com All rights reserved
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#|
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#|---------------------------------------------------------------------------------------
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#| L I C E N S E
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#|---------------------------------------------------------------------------------------
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#| This file is part of OpenBLT. OpenBLT is free software: you can redistribute it and/or
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#| modify it under the terms of the GNU General Public License as published by the Free
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#| Software Foundation, either version 3 of the License, or (at your option) any later
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#| version.
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#|
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#| OpenBLT is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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#| without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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#| PURPOSE. See the GNU General Public License for more details.
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#|
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#| You have received a copy of the GNU General Public License along with OpenBLT. It
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#| should be located in ".\Doc\license.html". If not, contact Feaser to obtain a copy.
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#|
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#****************************************************************************************
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SHELL = sh
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#|--------------------------------------------------------------------------------------|
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#| Configure project name |
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#|--------------------------------------------------------------------------------------|
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PROJ_NAME=openblt_$(BOARD)
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#|--------------------------------------------------------------------------------------|
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#| Configure OpenBLT path |
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#|--------------------------------------------------------------------------------------|
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OPENBLT_PATH=../../../ext/openblt/Target
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#|--------------------------------------------------------------------------------------|
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#| Configure tool path |
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#|--------------------------------------------------------------------------------------|
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# Compiler should be in PATH
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#|--------------------------------------------------------------------------------------|
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#| Collect project files |
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#|--------------------------------------------------------------------------------------|
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# Recursive wildcard function implementation. Example usages:
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# $(call rwildcard, , *.c *.h)
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# --> Returns all *.c and *.h files in the current directory and below
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# $(call rwildcard, /lib/, *.c)
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# --> Returns all *.c files in the /lib directory and below
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rwildcard = $(strip $(foreach d,$(wildcard $1*),$(call rwildcard,$d/,$2) $(filter $(subst *,%,$2),$d)))
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# Collect all application files in the current directory and its subdirectories, but
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# exclude flash-layout.c as this one is directly included in a source file, when used.
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PROJ_FILES = $(filter-out flash_layout.c, $(call rwildcard, , *.c *.h *.s))
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# Collect bootloader core files
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/*.c)
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/*.h)
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# Collect bootloader port files
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/*.c)
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/*.h)
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# Collect bootloader port compiler specific files
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/GCC/*.c)
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PROJ_FILES += $(wildcard $(OPENBLT_PATH)/Source/ARMCM3_STM32F1/GCC/*.h)
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# reuse ST32F1xx HAL and CMSIS from one of OpenBLT exaples to avoid having copy in this git
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_PATH)/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Boot/lib/CMSIS, *.c *.h *.s))
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PROJ_FILES += $(filter-out uip, $(call rwildcard, $(OPENBLT_PATH)/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Boot/lib/STM32F1xx_HAL_Driver/, *.c *.h *.s))
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#|--------------------------------------------------------------------------------------|
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#| Toolchain binaries |
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#|--------------------------------------------------------------------------------------|
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RM = rm
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CC = $(TOOL_PATH)arm-none-eabi-gcc
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LN = $(TOOL_PATH)arm-none-eabi-gcc
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OC = $(TOOL_PATH)arm-none-eabi-objcopy
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OD = $(TOOL_PATH)arm-none-eabi-objdump
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AS = $(TOOL_PATH)arm-none-eabi-gcc
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SZ = $(TOOL_PATH)arm-none-eabi-size
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#|--------------------------------------------------------------------------------------|
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#| Filter project files
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#|--------------------------------------------------------------------------------------|
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PROJ_ASRCS = $(filter %.s,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
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PROJ_CSRCS = $(filter %.c,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
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PROJ_CHDRS = $(filter %.h,$(foreach file,$(PROJ_FILES),$(notdir $(file))))
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#|--------------------------------------------------------------------------------------|
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#| Set important path variables |
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#|--------------------------------------------------------------------------------------|
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VPATH = $(foreach path,$(sort $(foreach file,$(PROJ_FILES),$(dir $(file)))) $(subst \,/,$(OBJ_PATH)),$(path) :)
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OBJ_PATH = obj
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BIN_PATH = bin
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INC_PATH += $(patsubst %/,%,$(patsubst %,-I%,$(sort $(foreach file,$(filter %.h,$(PROJ_FILES)),$(dir $(file))))))
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LIB_PATH =
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#|--------------------------------------------------------------------------------------|
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#| Options for toolchain binaries |
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#|--------------------------------------------------------------------------------------|
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STDFLAGS = -mcpu=cortex-m3 -mthumb -std=gnu11 -fstack-usage -Wall -specs=nano.specs
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STDFLAGS += -fdata-sections -ffunction-sections -Wall -g -Wno-strict-aliasing
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OPTFLAGS = -Og
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CFLAGS = $(STDFLAGS) $(OPTFLAGS)
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CFLAGS += -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -DSTM32F103xB
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CFLAGS += -D__weak="__attribute__((weak))" -D__packed="__attribute__((__packed__))"
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CFLAGS += $(INC_PATH)
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AFLAGS = $(CFLAGS)
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LFLAGS = $(STDFLAGS) $(OPTFLAGS)
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LFLAGS += -Wl,-script="STM32F103RB_FLASH.ld" -Wl,-Map=$(BIN_PATH)/$(PROJ_NAME).map
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LFLAGS += -Wl,--gc-sections $(LIB_PATH)
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OFLAGS = -O srec
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ODFLAGS = -x
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SZFLAGS = -B -d
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RMFLAGS = -f
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#|--------------------------------------------------------------------------------------|
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#| Specify library files |
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#|--------------------------------------------------------------------------------------|
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LIBS =
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#|--------------------------------------------------------------------------------------|
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#| Define targets |
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#|--------------------------------------------------------------------------------------|
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AOBJS = $(patsubst %.s,%.o,$(PROJ_ASRCS))
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COBJS = $(patsubst %.c,%.o,$(PROJ_CSRCS))
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#|--------------------------------------------------------------------------------------|
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#| Make ALL |
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#|--------------------------------------------------------------------------------------|
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.PHONY: all
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all: $(BIN_PATH)/$(PROJ_NAME).srec
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$(BIN_PATH)/$(PROJ_NAME).srec : $(BIN_PATH)/$(PROJ_NAME).elf
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@$(OC) $< $(OFLAGS) $@
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@$(OD) $(ODFLAGS) $< > $(BIN_PATH)/$(PROJ_NAME).map
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@echo +++ Summary of memory consumption:
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@$(SZ) $(SZFLAGS) $<
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@echo +++ Build complete [$(notdir $@)]
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$(BIN_PATH)/$(PROJ_NAME).elf : $(AOBJS) $(COBJS)
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@echo +++ Linking [$(notdir $@)]
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@mkdir -p $(BIN_PATH)
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@$(LN) $(LFLAGS) -o $@ $(patsubst %.o,$(OBJ_PATH)/%.o,$(^F)) $(LIBS)
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#|--------------------------------------------------------------------------------------|
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#| Compile and assemble |
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#|--------------------------------------------------------------------------------------|
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$(AOBJS): %.o: %.s $(PROJ_CHDRS)
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@mkdir -p $(OBJ_PATH)
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@echo +++ Assembling [$(notdir $<)]
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@$(AS) $(AFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
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$(COBJS): %.o: %.c $(PROJ_CHDRS)
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@mkdir -p $(OBJ_PATH)
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@echo +++ Compiling [$(notdir $<)]
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@$(CC) $(CFLAGS) -c $< -o $(OBJ_PATH)/$(@F)
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#|--------------------------------------------------------------------------------------|
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#| Make CLEAN |
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#|--------------------------------------------------------------------------------------|
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.PHONY: clean
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clean:
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@echo +++ Cleaning build environment
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@$(RM) $(RMFLAGS) $(foreach file,$(AOBJS),$(OBJ_PATH)/$(file))
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@$(RM) $(RMFLAGS) $(foreach file,$(COBJS),$(OBJ_PATH)/$(file))
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@$(RM) $(RMFLAGS) $(patsubst %.o,%.lst,$(foreach file,$(COBJS),$(OBJ_PATH)/$(file)))
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@$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).elf $(BIN_PATH)/$(PROJ_NAME).map
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@$(RM) $(RMFLAGS) $(BIN_PATH)/$(PROJ_NAME).srec
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@$(RM) $(RMFLAGS) -r $(OBJ_PATH)
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@$(RM) $(RMFLAGS) -r $(BIN_PATH)
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@echo +++ Clean complete
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@ -0,0 +1,168 @@
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/*
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*****************************************************************************
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**
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** File : stm32_flash.ld
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**
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** Abstract : Linker script for STM32F103RB Device with
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** 128KByte FLASH, 20KByte RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Environment : Atollic TrueSTUDIO(R)
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**
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** Distribution: The file is distributed as is, without any warranty
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** of any kind.
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**
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** (c)Copyright Atollic AB.
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** You may use this file as-is or modify it according to the needs of your
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** project. This file may only be built (assembled or compiled and linked)
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** using the Atollic TrueSTUDIO(R) product. The use of this file together
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** with other tools than Atollic TrueSTUDIO(R) is not permitted.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20005000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 8K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(4);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(4);
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} >RAM
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
|
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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@ -0,0 +1,138 @@
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#ifndef BLT_CONF_H
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#define BLT_CONF_H
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/****************************************************************************************
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* C P U D R I V E R C O N F I G U R A T I O N
|
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****************************************************************************************/
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/* To properly initialize the baudrate clocks of the communication interface, typically
|
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* the speed of the crystal oscillator and/or the speed at which the system runs is
|
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* needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
|
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* BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
|
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* not dependent on the targets architecture, the byte ordering needs to be known.
|
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* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects big endian mode and 0 selects
|
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* little endian mode.
|
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*
|
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* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
|
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* called the moment the user program is about to be started. This could be used to
|
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* de-initialize application specific parts, for example to stop blinking an LED, etc.
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*/
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/** \brief Frequency of the external crystal oscillator. */
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#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
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/** \brief Desired system speed. */
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#define BOOT_CPU_SYSTEM_SPEED_KHZ (48000)
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/** \brief Motorola or Intel style byte ordering. */
|
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#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
|
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/** \brief Enable/disable hook function call right before user program start. */
|
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#define BOOT_CPU_USER_PROGRAM_START_HOOK (1)
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/****************************************************************************************
|
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* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* The RS232 communication interface is selected by setting the BOOT_COM_RS232_ENABLE
|
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* configurable to 1. Configurable BOOT_COM_RS232_BAUDRATE selects the communication speed
|
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* in bits/second. The maximum amount of data bytes in a message for data transmission
|
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* and reception is set through BOOT_COM_RS232_TX_MAX_DATA and BOOT_COM_RS232_RX_MAX_DATA,
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* respectively. It is common for a microcontroller to have more than 1 UART interface
|
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* on board. The zero-based BOOT_COM_RS232_CHANNEL_INDEX selects the UART interface.
|
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*
|
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*/
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/** \brief Enable/disable UART transport layer. */
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#define BOOT_COM_RS232_ENABLE (1)
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/** \brief Configure the desired communication speed. */
|
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#define BOOT_COM_RS232_BAUDRATE (115200)
|
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/** \brief Configure number of bytes in the target->host data packet. */
|
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#define BOOT_COM_RS232_TX_MAX_DATA (64)
|
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/** \brief Configure number of bytes in the host->target data packet. */
|
||||
#define BOOT_COM_RS232_RX_MAX_DATA (64)
|
||||
/** \brief Select the desired UART peripheral as a zero based index. */
|
||||
#define BOOT_COM_RS232_CHANNEL_INDEX (1)
|
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|
||||
|
||||
/****************************************************************************************
|
||||
* B A C K D O O R E N T R Y C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* It is possible to implement an application specific method to force the bootloader to
|
||||
* stay active after a reset. Such a backdoor entry into the bootloader is desired in
|
||||
* situations where the user program does not run properly and therefore cannot
|
||||
* reactivate the bootloader. By enabling these hook functions, the application can
|
||||
* implement the backdoor, which overrides the default backdoor entry that is programmed
|
||||
* into the bootloader. When desired for security purposes, these hook functions can
|
||||
* also be implemented in a way that disables the backdoor entry altogether.
|
||||
*/
|
||||
/** \brief Enable/disable the backdoor override hook functions. */
|
||||
#define BOOT_BACKDOOR_HOOKS_ENABLE (0)
|
||||
|
||||
|
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/****************************************************************************************
|
||||
* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* The NVM driver typically supports erase and program operations of the internal memory
|
||||
* present on the microcontroller. Through these hook functions the NVM driver can be
|
||||
* extended to support additional memory types such as external flash memory and serial
|
||||
* eeproms. The size of the internal memory in kilobytes is specified with configurable
|
||||
* BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can
|
||||
* be overridden with a application specific method by enabling configuration switch
|
||||
* BOOT_NVM_CHECKSUM_HOOKS_ENABLE.
|
||||
*/
|
||||
/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */
|
||||
#define BOOT_NVM_HOOKS_ENABLE (0)
|
||||
/** \brief Configure the size of the default memory device (typically flash EEPROM). */
|
||||
#define BOOT_NVM_SIZE_KB (128)
|
||||
/** \brief Enable/disable hooks functions to override the user program checksum handling. */
|
||||
#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* F L A S H M E M O R Y D R I V E R C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/** \brief This microcontroller has a smaller vector table then the default STM32F1xx
|
||||
* project as assumed in the bootloader's core. This means the user program has
|
||||
* a different checksum location, because this one is added at the end of the
|
||||
* user program's vector table.
|
||||
*/
|
||||
#define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x10c)
|
||||
/** \brief Enable support for a custom flash layout table. It is located in
|
||||
* flash_layout.c. This was done because the default flashLayout[] table
|
||||
* in the bootloader's core has more flash memory reserved for the bootloader
|
||||
* than is needed for this demo.
|
||||
*/
|
||||
#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* W A T C H D O G D R I V E R C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* The COP driver cannot be configured internally in the bootloader, because its use
|
||||
* and configuration is application specific. The bootloader does need to service the
|
||||
* watchdog in case it is used. When the application requires the use of a watchdog,
|
||||
* set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
|
||||
* hook functions.
|
||||
*/
|
||||
/** \brief Enable/disable the hook functions for controlling the watchdog. */
|
||||
#define BOOT_COP_HOOKS_ENABLE (1)
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* S E E D / K E Y S E C U R I T Y C O N F I G U R A T I O N
|
||||
****************************************************************************************/
|
||||
/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-
|
||||
* rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming
|
||||
* operations can be performed, access to this resource need to be unlocked.
|
||||
* In the Microboot settings on tab "XCP Protection" you need to specify a DLL that
|
||||
* implements the unlocking algorithm. The demo programs are configured for the (simple)
|
||||
* algorithm in "libseednkey.dll". The source code for this DLL is available so it can be
|
||||
* customized to your needs.
|
||||
* During the unlock sequence, Microboot requests a seed from the bootloader, which is in
|
||||
* the format of a byte array. Using this seed the unlock algorithm in the DLL computes
|
||||
* a key, which is also a byte array, and sends this back to the bootloader. The
|
||||
* bootloader then verifies this key to determine if programming and erase operations are
|
||||
* permitted.
|
||||
* After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()
|
||||
* are called by the bootloader to obtain the seed and to verify the key, respectively.
|
||||
*/
|
||||
#define BOOT_XCP_SEED_KEY_ENABLE (0)
|
||||
|
||||
|
||||
#endif /* BLT_CONF_H */
|
||||
/*********************************** end of blt_conf.h *********************************/
|
||||
|
|
@ -0,0 +1,31 @@
|
|||
/** \brief Array wit the layout of the flash memory.
|
||||
* \details Also controls what part of the flash memory is reserved for the bootloader.
|
||||
* If the bootloader size changes, the reserved sectors for the bootloader
|
||||
* might need adjustment to make sure the bootloader doesn't get overwritten.
|
||||
*/
|
||||
static const tFlashSector flashLayout[] =
|
||||
{
|
||||
/* space is reserved for a bootloader configuration with all supported communication
|
||||
* interfaces enabled. when for example only UART is needed, than the space required
|
||||
* for the bootloader can be made a lot smaller here.
|
||||
*/
|
||||
/* { 0x08000000, 0x02000 }, flash sector 0 - reserved for bootloader */
|
||||
{ 0x08002000, 0x02000 }, /* flash sector 1 - 8kb */
|
||||
{ 0x08004000, 0x02000 }, /* flash sector 2 - 8kb */
|
||||
{ 0x08006000, 0x02000 }, /* flash sector 3 - 8kb */
|
||||
{ 0x08008000, 0x02000 }, /* flash sector 4 - 8kb */
|
||||
{ 0x0800A000, 0x02000 }, /* flash sector 5 - 8kb */
|
||||
{ 0x0800C000, 0x02000 }, /* flash sector 6 - 8kb */
|
||||
{ 0x0800E000, 0x02000 }, /* flash sector 7 - 8kb */
|
||||
{ 0x08010000, 0x02000 }, /* flash sector 8 - 8kb */
|
||||
{ 0x08012000, 0x02000 }, /* flash sector 9 - 8kb */
|
||||
{ 0x08014000, 0x02000 }, /* flash sector 10 - 8kb */
|
||||
{ 0x08016000, 0x02000 }, /* flash sector 11 - 8kb */
|
||||
{ 0x08018000, 0x02000 }, /* flash sector 12 - 8kb */
|
||||
{ 0x0801A000, 0x02000 }, /* flash sector 13 - 8kb */
|
||||
{ 0x0801C000, 0x02000 }, /* flash sector 14 - 8kb */
|
||||
{ 0x0801E000, 0x02000 }, /* flash sector 15 - 8kb */
|
||||
};
|
||||
|
||||
|
||||
/*********************************** end of flash_layout.c *****************************/
|
||||
|
|
@ -0,0 +1,280 @@
|
|||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "led.h" /* LED driver header */
|
||||
#include "stm32f1xx.h" /* STM32 registers and drivers */
|
||||
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* B A C K D O O R E N T R Y H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_BACKDOOR_HOOKS_ENABLE > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the backdoor entry option.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void BackDoorInitHook(void)
|
||||
{
|
||||
} /*** end of BackDoorInitHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Checks if a backdoor entry is requested.
|
||||
** \return BLT_TRUE if the backdoor entry is requested, BLT_FALSE otherwise.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool BackDoorEntryHook(void)
|
||||
{
|
||||
/* default implementation always activates the bootloader after a reset */
|
||||
return BLT_TRUE;
|
||||
} /*** end of BackDoorEntryHook ***/
|
||||
#endif /* BOOT_BACKDOOR_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* C P U D R I V E R H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called when the bootloader is about to exit and
|
||||
** hand over control to the user program. This is the last moment that
|
||||
** some final checking can be performed and if necessary prevent the
|
||||
** bootloader from activiting the user program.
|
||||
** \return BLT_TRUE if it is okay to start the user program, BLT_FALSE to keep
|
||||
** keep the bootloader active.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool CpuUserProgramStartHook(void)
|
||||
{
|
||||
/* additional and optional backdoor entry through the pushbutton on the board. to
|
||||
* force the bootloader to stay active after reset, keep it pressed during reset.
|
||||
*/
|
||||
if (LL_GPIO_IsInputPinSet(GPIOC, LL_GPIO_PIN_13) == 0)
|
||||
{
|
||||
/* pushbutton pressed, so do not start the user program and keep the
|
||||
* bootloader active instead.
|
||||
*/
|
||||
return BLT_FALSE;
|
||||
}
|
||||
|
||||
/* clean up the LED driver */
|
||||
LedBlinkExit();
|
||||
|
||||
/* okay to start the user program */
|
||||
return BLT_TRUE;
|
||||
} /*** end of CpuUserProgramStartHook ***/
|
||||
#endif /* BOOT_CPU_USER_PROGRAM_START_HOOK > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* W A T C H D O G D R I V E R H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_COP_HOOKS_ENABLE > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the end of the internal COP driver
|
||||
** initialization routine. It can be used to configure and enable the
|
||||
** watchdog.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void CopInitHook(void)
|
||||
{
|
||||
/* this function is called upon initialization. might as well use it to initialize
|
||||
* the LED driver. It is kind of a visual watchdog anyways.
|
||||
*/
|
||||
LedBlinkInit(100);
|
||||
} /*** end of CopInitHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the end of the internal COP driver
|
||||
** service routine. This gets called upon initialization and during
|
||||
** potential long lasting loops and routine. It can be used to service
|
||||
** the watchdog to prevent a watchdog reset.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void CopServiceHook(void)
|
||||
{
|
||||
/* run the LED blink task. this is a better place to do it than in the main() program
|
||||
* loop. certain operations such as flash erase can take a long time, which would cause
|
||||
* a blink interval to be skipped. this function is also called during such operations,
|
||||
* so no blink intervals will be skipped when calling the LED blink task here.
|
||||
*/
|
||||
LedBlinkTask();
|
||||
} /*** end of CopServiceHook ***/
|
||||
#endif /* BOOT_COP_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* N O N - V O L A T I L E M E M O R Y D R I V E R H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_NVM_HOOKS_ENABLE > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the start of the internal NVM driver
|
||||
** initialization routine.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void NvmInitHook(void)
|
||||
{
|
||||
} /*** end of NvmInitHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the start of a firmware update to reinitialize
|
||||
** the NVM driver.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void NvmReinitHook(void)
|
||||
{
|
||||
} /*** end of NvmReinitHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the start of the NVM driver write
|
||||
** routine. It allows additional memory to be operated on. If the address
|
||||
** is not within the range of the additional memory, then
|
||||
** BLT_NVM_NOT_IN_RANGE must be returned to indicate that the data hasn't
|
||||
** been written yet.
|
||||
** \param addr Start address.
|
||||
** \param len Length in bytes.
|
||||
** \param data Pointer to the data buffer.
|
||||
** \return BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
|
||||
** not within the supported memory range, or BLT_NVM_ERROR is the write
|
||||
** operation failed.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_int8u NvmWriteHook(blt_addr addr, blt_int32u len, blt_int8u *data)
|
||||
{
|
||||
return BLT_NVM_NOT_IN_RANGE;
|
||||
} /*** end of NvmWriteHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the start of the NVM driver erase
|
||||
** routine. It allows additional memory to be operated on. If the address
|
||||
** is not within the range of the additional memory, then
|
||||
** BLT_NVM_NOT_IN_RANGE must be returned to indicate that the memory
|
||||
** hasn't been erased yet.
|
||||
** \param addr Start address.
|
||||
** \param len Length in bytes.
|
||||
** \return BLT_NVM_OKAY if successful, BLT_NVM_NOT_IN_RANGE if the address is
|
||||
** not within the supported memory range, or BLT_NVM_ERROR is the erase
|
||||
** operation failed.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_int8u NvmEraseHook(blt_addr addr, blt_int32u len)
|
||||
{
|
||||
return BLT_NVM_NOT_IN_RANGE;
|
||||
} /*** end of NvmEraseHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Callback that gets called at the end of the NVM programming session.
|
||||
** \return BLT_TRUE is successful, BLT_FALSE otherwise.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool NvmDoneHook(void)
|
||||
{
|
||||
return BLT_TRUE;
|
||||
} /*** end of NvmDoneHook ***/
|
||||
#endif /* BOOT_NVM_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Verifies the checksum, which indicates that a valid user program is
|
||||
** present and can be started.
|
||||
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool NvmVerifyChecksumHook(void)
|
||||
{
|
||||
return BLT_TRUE;
|
||||
} /*** end of NvmVerifyChecksum ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Writes a checksum of the user program to non-volatile memory. This is
|
||||
** performed once the entire user program has been programmed. Through
|
||||
** the checksum, the bootloader can check if a valid user programming is
|
||||
** present and can be started.
|
||||
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_bool NvmWriteChecksumHook(void)
|
||||
{
|
||||
return BLT_TRUE;
|
||||
}
|
||||
#endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* S E E D / K E Y S E C U R I T Y H O O K F U N C T I O N S
|
||||
****************************************************************************************/
|
||||
|
||||
#if (BOOT_XCP_SEED_KEY_ENABLE > 0)
|
||||
/************************************************************************************//**
|
||||
** \brief Provides a seed to the XCP master that will be used for the key
|
||||
** generation when the master attempts to unlock the specified resource.
|
||||
** Called by the GET_SEED command.
|
||||
** \param resource Resource that the seed if requested for (XCP_RES_XXX).
|
||||
** \param seed Pointer to byte buffer wher the seed will be stored.
|
||||
** \return Length of the seed in bytes.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_int8u XcpGetSeedHook(blt_int8u resource, blt_int8u *seed)
|
||||
{
|
||||
/* request seed for unlocking ProGraMming resource */
|
||||
if ((resource & XCP_RES_PGM) != 0)
|
||||
{
|
||||
seed[0] = 0x55;
|
||||
}
|
||||
|
||||
/* return seed length */
|
||||
return 1;
|
||||
} /*** end of XcpGetSeedHook ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Called by the UNLOCK command and checks if the key to unlock the
|
||||
** specified resource was correct. If so, then the resource protection
|
||||
** will be removed.
|
||||
** \param resource resource to unlock (XCP_RES_XXX).
|
||||
** \param key pointer to the byte buffer holding the key.
|
||||
** \param len length of the key in bytes.
|
||||
** \return 1 if the key was correct, 0 otherwise.
|
||||
**
|
||||
****************************************************************************************/
|
||||
blt_int8u XcpVerifyKeyHook(blt_int8u resource, blt_int8u *key, blt_int8u len)
|
||||
{
|
||||
/* suppress compiler warning for unused parameter */
|
||||
len = len;
|
||||
|
||||
/* the example key algorithm in "libseednkey.dll" works as follows:
|
||||
* - PGM will be unlocked if key = seed - 1
|
||||
*/
|
||||
|
||||
/* check key for unlocking ProGraMming resource */
|
||||
if ((resource == XCP_RES_PGM) && (key[0] == (0x55-1)))
|
||||
{
|
||||
/* correct key received for unlocking PGM resource */
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* still here so key incorrect */
|
||||
return 0;
|
||||
} /*** end of XcpVerifyKeyHook ***/
|
||||
#endif /* BOOT_XCP_SEED_KEY_ENABLE > 0 */
|
||||
|
||||
|
||||
/*********************************** end of hooks.c ************************************/
|
||||
|
|
@ -0,0 +1,73 @@
|
|||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "led.h" /* module header */
|
||||
#include "stm32f1xx.h" /* STM32 registers and drivers */
|
||||
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Local data declarations
|
||||
****************************************************************************************/
|
||||
/** \brief Holds the desired LED blink interval time. */
|
||||
static blt_int16u ledBlinkIntervalMs;
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the LED blink driver.
|
||||
** \param interval_ms Specifies the desired LED blink interval time in milliseconds.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void LedBlinkInit(blt_int16u interval_ms)
|
||||
{
|
||||
/* store the interval time between LED toggles */
|
||||
ledBlinkIntervalMs = interval_ms;
|
||||
} /*** end of LedBlinkInit ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Task function for blinking the LED as a fixed timer interval.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void LedBlinkTask(void)
|
||||
{
|
||||
static blt_bool ledOn = BLT_FALSE;
|
||||
static blt_int32u nextBlinkEvent = 0;
|
||||
|
||||
/* check for blink event */
|
||||
if (TimerGet() >= nextBlinkEvent)
|
||||
{
|
||||
/* toggle the LED state */
|
||||
if (ledOn == BLT_FALSE)
|
||||
{
|
||||
ledOn = BLT_TRUE;
|
||||
LL_GPIO_SetOutputPin(GPIOA, LL_GPIO_PIN_5);
|
||||
}
|
||||
else
|
||||
{
|
||||
ledOn = BLT_FALSE;
|
||||
LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_5);
|
||||
}
|
||||
/* schedule the next blink event */
|
||||
nextBlinkEvent = TimerGet() + ledBlinkIntervalMs;
|
||||
}
|
||||
} /*** end of LedBlinkTask ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Cleans up the LED blink driver. This is intended to be used upon program
|
||||
** exit.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void LedBlinkExit(void)
|
||||
{
|
||||
/* turn the LED off */
|
||||
LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_5);
|
||||
} /*** end of LedBlinkExit ***/
|
||||
|
||||
|
||||
/*********************************** end of led.c **************************************/
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
#ifndef LED_H
|
||||
#define LED_H
|
||||
|
||||
/****************************************************************************************
|
||||
* Function prototypes
|
||||
****************************************************************************************/
|
||||
void LedBlinkInit(blt_int16u interval_ms);
|
||||
void LedBlinkTask(void);
|
||||
void LedBlinkExit(void);
|
||||
|
||||
|
||||
#endif /* LED_H */
|
||||
/*********************************** end of led.h **************************************/
|
||||
|
|
@ -0,0 +1,335 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_conf.h
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_HAL_CONF_H
|
||||
#define __STM32F1xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_CAN_MODULE_ENABLED
|
||||
/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/*#define HAL_CEC_MODULE_ENABLED */
|
||||
/*#define HAL_CORTEX_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
/*#define HAL_DAC_MODULE_ENABLED */
|
||||
/*#define HAL_DMA_MODULE_ENABLED */
|
||||
/*#define HAL_ETH_MODULE_ENABLED */
|
||||
/*#define HAL_FLASH_MODULE_ENABLED */
|
||||
/*#define HAL_GPIO_MODULE_ENABLED */
|
||||
/*#define HAL_I2C_MODULE_ENABLED */
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_NOR_MODULE_ENABLED */
|
||||
/*#define HAL_NAND_MODULE_ENABLED */
|
||||
/*#define HAL_PCCARD_MODULE_ENABLED */
|
||||
/*#define HAL_PCD_MODULE_ENABLED */
|
||||
/*#define HAL_HCD_MODULE_ENABLED */
|
||||
/*#define HAL_PWR_MODULE_ENABLED */
|
||||
/*#define HAL_RCC_MODULE_ENABLED */
|
||||
/*#define HAL_RTC_MODULE_ENABLED */
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_MMC_MODULE_ENABLED */
|
||||
/*#define HAL_SDRAM_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
/*#define HAL_TIM_MODULE_ENABLED */
|
||||
/*#define HAL_UART_MODULE_ENABLED */
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */
|
||||
#define USE_RTOS 0
|
||||
#define PREFETCH_ENABLE 1
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "Legacy/stm32f1xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_HAL_CONF_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,430 @@
|
|||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f1xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
|
||||
* factors, AHB/APBx prescalers and Flash settings).
|
||||
* This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f1xx_xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
|
||||
* the product used), refer to "HSE_VALUE".
|
||||
* When HSE is used as system clock source, directly or through PLL, and you
|
||||
* are using different crystal you have to adapt the HSE value to your own
|
||||
* configuration.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f1xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/*!< Uncomment the following line if you need to use external SRAM */
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table in
|
||||
Internal SRAM. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 16000000;
|
||||
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemCoreClock variable.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
|
||||
/* Set HSION bit */
|
||||
RCC->CR |= 0x00000001U;
|
||||
|
||||
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
|
||||
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||
RCC->CFGR &= 0xF8FF0000U;
|
||||
#else
|
||||
RCC->CFGR &= 0xF0FF0000U;
|
||||
#endif /* STM32F105xC */
|
||||
|
||||
/* Reset HSEON, CSSON and PLLON bits */
|
||||
RCC->CR &= 0xFEF6FFFFU;
|
||||
|
||||
/* Reset HSEBYP bit */
|
||||
RCC->CR &= 0xFFFBFFFFU;
|
||||
|
||||
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
|
||||
RCC->CFGR &= 0xFF80FFFFU;
|
||||
|
||||
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||
/* Reset PLL2ON and PLL3ON bits */
|
||||
RCC->CR &= 0xEBFFFFFFU;
|
||||
|
||||
/* Disable all interrupts and clear pending bits */
|
||||
RCC->CIR = 0x00FF0000U;
|
||||
|
||||
/* Reset CFGR2 register */
|
||||
RCC->CFGR2 = 0x00000000U;
|
||||
#elif defined(STM32F100xB) || defined(STM32F100xE)
|
||||
/* Disable all interrupts and clear pending bits */
|
||||
RCC->CIR = 0x009F0000U;
|
||||
|
||||
/* Reset CFGR2 register */
|
||||
RCC->CFGR2 = 0x00000000U;
|
||||
#else
|
||||
/* Disable all interrupts and clear pending bits */
|
||||
RCC->CIR = 0x009F0000U;
|
||||
#endif /* STM32F105xC */
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif
|
||||
|
||||
#ifdef VECT_TAB_SRAM
|
||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||
#else
|
||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
|
||||
#endif
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
|
||||
* that HSE_VALUE is same as the real frequency of the crystal used.
|
||||
* Otherwise, this function may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
|
||||
|
||||
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
|
||||
#endif /* STM32F105xC */
|
||||
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
uint32_t prediv1factor = 0U;
|
||||
#endif /* STM32F100xB or STM32F100xE */
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00U: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04U: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08U: /* PLL used as system clock */
|
||||
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||
pllmull = ( pllmull >> 18U) + 2U;
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
#else
|
||||
/* HSE selected as PLL clock entry */
|
||||
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
|
||||
{/* HSE oscillator clock divided by 2 */
|
||||
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
SystemCoreClock = HSE_VALUE * pllmull;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
pllmull = pllmull >> 18U;
|
||||
|
||||
if (pllmull != 0x0DU)
|
||||
{
|
||||
pllmull += 2U;
|
||||
}
|
||||
else
|
||||
{ /* PLL multiplication factor = PLL input clock * 6.5 */
|
||||
pllmull = 13U / 2U;
|
||||
}
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PREDIV1 selected as PLL clock entry */
|
||||
|
||||
/* Get PREDIV1 clock source and division factor */
|
||||
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
|
||||
if (prediv1source == 0U)
|
||||
{
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PLL2 clock selected as PREDIV1 clock entry */
|
||||
|
||||
/* Get PREDIV2 division factor and PLL2 multiplication factor */
|
||||
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
|
||||
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
|
||||
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
|
||||
}
|
||||
}
|
||||
#endif /* STM32F105xC */
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/**
|
||||
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
|
||||
* before jump to __main
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
|
||||
* This function configures the external SRAM mounted on STM3210E-EVAL
|
||||
* board (STM32 High density devices). This SRAM will be used as program
|
||||
* data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
|
||||
required, then adjust the Register Addresses */
|
||||
|
||||
/* Enable FSMC clock */
|
||||
RCC->AHBENR = 0x00000114U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
|
||||
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
|
||||
RCC->APB2ENR = 0x000001E0U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
|
||||
|
||||
(void)(tmpreg);
|
||||
|
||||
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
|
||||
/*---------------- SRAM Address lines configuration -------------------------*/
|
||||
/*---------------- NOE and NWE configuration --------------------------------*/
|
||||
/*---------------- NE3 configuration ----------------------------------------*/
|
||||
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
|
||||
|
||||
GPIOD->CRL = 0x44BB44BBU;
|
||||
GPIOD->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOE->CRL = 0xB44444BBU;
|
||||
GPIOE->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOF->CRL = 0x44BBBBBBU;
|
||||
GPIOF->CRH = 0xBBBB4444U;
|
||||
|
||||
GPIOG->CRL = 0x44BBBBBBU;
|
||||
GPIOG->CRH = 0x444B4B44U;
|
||||
|
||||
/*---------------- FSMC Configuration ---------------------------------------*/
|
||||
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
|
||||
|
||||
FSMC_Bank1->BTCR[4U] = 0x00001091U;
|
||||
FSMC_Bank1->BTCR[5U] = 0x00110212U;
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
|
@ -0,0 +1,194 @@
|
|||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "stm32f1xx.h" /* STM32 registers and drivers */
|
||||
#include "stm32f1xx_ll_rcc.h" /* STM32 LL RCC header */
|
||||
#include "stm32f1xx_ll_bus.h" /* STM32 LL BUS header */
|
||||
#include "stm32f1xx_ll_system.h" /* STM32 LL SYSTEM header */
|
||||
#include "stm32f1xx_ll_utils.h" /* STM32 LL UTILS header */
|
||||
#include "stm32f1xx_ll_usart.h" /* STM32 LL USART header */
|
||||
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
|
||||
|
||||
|
||||
/****************************************************************************************
|
||||
* Function prototypes
|
||||
****************************************************************************************/
|
||||
static void Init(void);
|
||||
static void SystemClock_Config(void);
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief This is the entry point for the bootloader application and is called
|
||||
** by the reset interrupt vector after the C-startup routines executed.
|
||||
** \return Program return code.
|
||||
**
|
||||
****************************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* initialize the microcontroller */
|
||||
Init();
|
||||
/* initialize the bootloader */
|
||||
BootInit();
|
||||
|
||||
/* start the infinite program loop */
|
||||
while (1)
|
||||
{
|
||||
/* run the bootloader task */
|
||||
BootTask();
|
||||
}
|
||||
|
||||
/* program should never get here */
|
||||
return 0;
|
||||
} /*** end of main ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the microcontroller.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void Init(void)
|
||||
{
|
||||
/* HAL library initialization */
|
||||
HAL_Init();
|
||||
/* configure system clock */
|
||||
SystemClock_Config();
|
||||
} /*** end of Init ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief System Clock Configuration. This code was created by CubeMX and configures
|
||||
** the system clock to match the configuration in the bootloader's
|
||||
** configuration (blt_conf.h), specifically the macros:
|
||||
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
|
||||
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
|
||||
** subsystem.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
/* Set flash latency. */
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
|
||||
if (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
|
||||
{
|
||||
/* Error setting flash latency. */
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
/* Enable the HSI clock. */
|
||||
LL_RCC_HSI_Enable();
|
||||
/* Wait till HSE is ready. */
|
||||
while (LL_RCC_HSI_IsReady() != 1)
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
/* Configure and enable the PLL. */
|
||||
/* 48MHz max */
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, LL_RCC_PLL_MUL_12);
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready. */
|
||||
while (LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
;
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready. */
|
||||
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
;
|
||||
}
|
||||
/* Update the system clock speed setting. */
|
||||
LL_SetSystemCoreClock(BOOT_CPU_SYSTEM_SPEED_KHZ * 1000u);
|
||||
} /*** end of SystemClock_Config ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the Global MSP. This function is called from HAL_Init()
|
||||
** function to perform system level initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
LL_GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* AFIO and PWR clock enable. */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||
|
||||
/* GPIO ports clock enable. */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC);
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART clock enable. */
|
||||
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);
|
||||
#endif
|
||||
|
||||
/* Configure GPIO pin for the LED. */
|
||||
GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
|
||||
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
|
||||
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_5);
|
||||
|
||||
/* Configure GPIO pin for (optional) backdoor entry input. */
|
||||
GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
|
||||
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = LL_GPIO_PIN_2;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = LL_GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
|
||||
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
#endif
|
||||
} /*** end of HAL_MspInit ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
|
||||
** function to perform system level de-initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspDeInit(void)
|
||||
{
|
||||
/* Reset the RCC clock configuration to the default reset state. */
|
||||
LL_RCC_DeInit();
|
||||
|
||||
/* Deinit used GPIOs. */
|
||||
LL_GPIO_DeInit(GPIOC);
|
||||
LL_GPIO_DeInit(GPIOA);
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART clock disable. */
|
||||
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_USART2);
|
||||
#endif
|
||||
|
||||
/* GPIO ports clock disable. */
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOC);
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOA);
|
||||
|
||||
/* AFIO and PWR clock disable. */
|
||||
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
} /*** end of HAL_MspDeInit ***/
|
||||
|
||||
|
||||
/*********************************** end of main.c *************************************/
|
||||
|
|
@ -0,0 +1,379 @@
|
|||
/**
|
||||
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
|
||||
* @file startup_stm32f103xb.s
|
||||
* @author MCD Application Team
|
||||
* @version V4.2.0
|
||||
* @date 31-March-2017
|
||||
* @brief STM32F103xB Devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word USB_HP_CAN1_TX_IRQHandler
|
||||
.word USB_LP_CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_IRQHandler
|
||||
.word TIM1_UP_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USBWakeUp_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F10x Medium Density devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_IRQHandler
|
||||
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_CAN1_TX_IRQHandler
|
||||
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_CAN1_RX0_IRQHandler
|
||||
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_IRQHandler
|
||||
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
|
@ -5,7 +5,8 @@
|
|||
MEMORY
|
||||
{
|
||||
blflash (rx) : org = 0x08000000, len = 0
|
||||
appflash (rx) : org = 0x08000000, len = 128k - 1k
|
||||
/* 8k reserved for bootloader */
|
||||
appflash (rx) : org = 0x08000000 + 8k, len = 128k - 1k - 8k
|
||||
configflash (rx) : org = 0x08000000 + 128k - 1k, len = 1k
|
||||
flash1 (rx) : org = 0x00000000, len = 0
|
||||
flash2 (rx) : org = 0x00000000, len = 0
|
||||
|
|
|
|||
Loading…
Reference in New Issue