mirror of https://github.com/rusefi/wideband.git
f1_dual_rev1: OpenBLT (#261)
(cherry picked from commit 790de260f6e335a22737bb7d17d82687e620c838) Co-authored-by: Andrey Gusakov <dron0gus@gmail.com>
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rusefillc
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commit
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BOARD?=f1_dual_rev1
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include ../../f1_common/openblt/Makefile
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#ifndef BLT_CONF_H
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#define BLT_CONF_H
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/****************************************************************************************
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* C P U D R I V E R C O N F I G U R A T I O N
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****************************************************************************************/
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/* To properly initialize the baudrate clocks of the communication interface, typically
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* the speed of the crystal oscillator and/or the speed at which the system runs is
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* needed. Set these through configurables BOOT_CPU_XTAL_SPEED_KHZ and
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* BOOT_CPU_SYSTEM_SPEED_KHZ, respectively. To enable data exchange with the host that is
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* not dependent on the targets architecture, the byte ordering needs to be known.
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* Setting BOOT_CPU_BYTE_ORDER_MOTOROLA to 1 selects big endian mode and 0 selects
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* little endian mode.
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*
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* Set BOOT_CPU_USER_PROGRAM_START_HOOK to 1 if you would like a hook function to be
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* called the moment the user program is about to be started. This could be used to
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* de-initialize application specific parts, for example to stop blinking an LED, etc.
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*/
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/** \brief Frequency of the external crystal oscillator. */
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#define BOOT_CPU_XTAL_SPEED_KHZ (8000)
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/** \brief Desired system speed. */
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#define BOOT_CPU_SYSTEM_SPEED_KHZ (48000)
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/** \brief Motorola or Intel style byte ordering. */
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#define BOOT_CPU_BYTE_ORDER_MOTOROLA (0)
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/** \brief Enable/disable hook function call right before user program start. */
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#define BOOT_CPU_USER_PROGRAM_START_HOOK (0)
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/****************************************************************************************
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* C O M M U N I C A T I O N I N T E R F A C E C O N F I G U R A T I O N
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****************************************************************************************/
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/* The CAN communication interface is selected by setting the BOOT_COM_CAN_ENABLE
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* configurable to 1. Configurable BOOT_COM_CAN_BAUDRATE selects the communication speed
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* in bits/second. Two CAN messages are reserved for communication with the host. The
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* message identifier for sending data from the target to the host is configured with
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* BOOT_COM_CAN_TXMSG_ID. The one for receiving data from the host is configured with
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* BOOT_COM_CAN_RXMSG_ID. Note that an extended 29-bit CAN identifier is configured by
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* OR-ing with mask 0x80000000. The maximum amount of data bytes in a message for data
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* transmission and reception is set through BOOT_COM_CAN_TX_MAX_DATA and
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* BOOT_COM_CAN_RX_MAX_DATA, respectively. It is common for a microcontroller to have more
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* than 1 CAN controller on board. The zero-based BOOT_COM_CAN_CHANNEL_INDEX selects the
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* CAN controller channel.
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*
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*/
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/** \brief Enable/disable CAN transport layer. */
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#define BOOT_COM_CAN_ENABLE (1)
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/** \brief Configure the desired CAN baudrate. */
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#define BOOT_COM_CAN_BAUDRATE (500000)
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/** \brief Configure CAN message ID target->host. */
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#define BOOT_COM_CAN_TX_MSG_ID (0x7E1 /*| 0x80000000*/)
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/** \brief Configure number of bytes in the target->host CAN message. */
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#define BOOT_COM_CAN_TX_MAX_DATA (8)
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/** \brief Configure CAN message ID host->target. */
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#define BOOT_COM_CAN_RX_MSG_ID (0x667 /*| 0x80000000*/)
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/** \brief Configure number of bytes in the host->target CAN message. */
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#define BOOT_COM_CAN_RX_MAX_DATA (8)
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/** \brief Select the desired CAN peripheral as a zero based index. */
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#define BOOT_COM_CAN_CHANNEL_INDEX (0)
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/* The RS232 communication interface is selected by setting the BOOT_COM_RS232_ENABLE
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* configurable to 1. Configurable BOOT_COM_RS232_BAUDRATE selects the communication speed
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* in bits/second. The maximum amount of data bytes in a message for data transmission
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* and reception is set through BOOT_COM_RS232_TX_MAX_DATA and BOOT_COM_RS232_RX_MAX_DATA,
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* respectively. It is common for a microcontroller to have more than 1 UART interface
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* on board. The zero-based BOOT_COM_RS232_CHANNEL_INDEX selects the UART interface.
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*
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*/
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/** \brief Enable/disable UART transport layer. */
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#define BOOT_COM_RS232_ENABLE (1)
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/** \brief Configure the desired communication speed. */
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#define BOOT_COM_RS232_BAUDRATE (115200)
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/** \brief Configure number of bytes in the target->host data packet. */
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#define BOOT_COM_RS232_TX_MAX_DATA (64)
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/** \brief Configure number of bytes in the host->target data packet. */
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#define BOOT_COM_RS232_RX_MAX_DATA (64)
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/** \brief Select the desired UART peripheral as a zero based index. */
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#define BOOT_COM_RS232_CHANNEL_INDEX (0)
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/****************************************************************************************
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* B A C K D O O R E N T R Y C O N F I G U R A T I O N
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****************************************************************************************/
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/* It is possible to implement an application specific method to force the bootloader to
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* stay active after a reset. Such a backdoor entry into the bootloader is desired in
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* situations where the user program does not run properly and therefore cannot
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* reactivate the bootloader. By enabling these hook functions, the application can
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* implement the backdoor, which overrides the default backdoor entry that is programmed
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* into the bootloader. When desired for security purposes, these hook functions can
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* also be implemented in a way that disables the backdoor entry altogether.
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*/
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/** \brief Enable/disable the backdoor override hook functions. */
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#define BOOT_BACKDOOR_HOOKS_ENABLE (0)
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/****************************************************************************************
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* N O N - V O L A T I L E M E M O R Y D R I V E R C O N F I G U R A T I O N
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****************************************************************************************/
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/* The NVM driver typically supports erase and program operations of the internal memory
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* present on the microcontroller. Through these hook functions the NVM driver can be
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* extended to support additional memory types such as external flash memory and serial
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* eeproms. The size of the internal memory in kilobytes is specified with configurable
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* BOOT_NVM_SIZE_KB. If desired the internal checksum writing and verification method can
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* be overridden with a application specific method by enabling configuration switch
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* BOOT_NVM_CHECKSUM_HOOKS_ENABLE.
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*/
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/** \brief Enable/disable the NVM hook function for supporting additional memory devices. */
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#define BOOT_NVM_HOOKS_ENABLE (0)
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/** \brief Configure the size of the default memory device (typically flash EEPROM). */
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#define BOOT_NVM_SIZE_KB (256)
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/** \brief Enable/disable hooks functions to override the user program checksum handling. */
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#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0)
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/****************************************************************************************
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* F L A S H M E M O R Y D R I V E R C O N F I G U R A T I O N
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****************************************************************************************/
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/** \brief This microcontroller has a smaller vector table then the default STM32F1xx
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* project as assumed in the bootloader's core. This means the user program has
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* a different checksum location, because this one is added at the end of the
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* user program's vector table.
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*/
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#define BOOT_FLASH_VECTOR_TABLE_CS_OFFSET (0x1c)
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/** \brief Enable support for a custom flash layout table. It is located in
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* flash_layout.c. This was done because the default flashLayout[] table
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* in the bootloader's core has more flash memory reserved for the bootloader
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* than is needed for this demo.
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*/
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#define BOOT_FLASH_CUSTOM_LAYOUT_ENABLE (1)
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/****************************************************************************************
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* W A T C H D O G D R I V E R C O N F I G U R A T I O N
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****************************************************************************************/
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/* The COP driver cannot be configured internally in the bootloader, because its use
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* and configuration is application specific. The bootloader does need to service the
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* watchdog in case it is used. When the application requires the use of a watchdog,
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* set BOOT_COP_HOOKS_ENABLE to be able to initialize and service the watchdog through
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* hook functions.
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*/
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/** \brief Enable/disable the hook functions for controlling the watchdog. */
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#define BOOT_COP_HOOKS_ENABLE (1)
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/****************************************************************************************
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* S E E D / K E Y S E C U R I T Y C O N F I G U R A T I O N
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****************************************************************************************/
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/* A security mechanism can be enabled in the bootloader's XCP module by setting configu-
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* rable BOOT_XCP_SEED_KEY_ENABLE to 1. Before any memory erase or programming
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* operations can be performed, access to this resource need to be unlocked.
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* In the Microboot settings on tab "XCP Protection" you need to specify a DLL that
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* implements the unlocking algorithm. The demo programs are configured for the (simple)
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* algorithm in "libseednkey.dll". The source code for this DLL is available so it can be
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* customized to your needs.
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* During the unlock sequence, Microboot requests a seed from the bootloader, which is in
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* the format of a byte array. Using this seed the unlock algorithm in the DLL computes
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* a key, which is also a byte array, and sends this back to the bootloader. The
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* bootloader then verifies this key to determine if programming and erase operations are
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* permitted.
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* After enabling this feature the hook functions XcpGetSeedHook() and XcpVerifyKeyHook()
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* are called by the bootloader to obtain the seed and to verify the key, respectively.
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*/
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#define BOOT_XCP_SEED_KEY_ENABLE (0)
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#endif /* BLT_CONF_H */
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/*********************************** end of blt_conf.h *********************************/
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/** \brief Array wit the layout of the flash memory.
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* \details Also controls what part of the flash memory is reserved for the bootloader.
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* If the bootloader size changes, the reserved sectors for the bootloader
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* might need adjustment to make sure the bootloader doesn't get overwritten.
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*/
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/* STM32F103RCT6 - high-density device with 256 Kb of flash = 128 pages of 2Kb */
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static const tFlashSector flashLayout[] =
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{
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/* space is reserved for a bootloader configuration with all supported communication
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* interfaces enabled. when for example only UART is needed, than the space required
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* for the bootloader can be made a lot smaller here.
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*/
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/* { 0x08000000, 0x00800 }, flash sector 0 - reserved for bootloader */
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/* { 0x08000800, 0x00800 }, flash sector 1 - reserved for bootloader */
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/* { 0x08001000, 0x00800 }, flash sector 2 - reserved for bootloader */
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/* { 0x08001800, 0x00800 }, flash sector 3 - reserved for bootloader */
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{ 0x08002000, 0x00800 }, /* flash sector 4 - 2kb */
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{ 0x08002800, 0x00800 }, /* flash sector 5 - 2kb */
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{ 0x08003000, 0x00800 }, /* flash sector 6 - 2kb */
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{ 0x08003800, 0x00800 }, /* flash sector 7 - 2kb */
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#if (BOOT_NVM_SIZE_KB > 16)
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{ 0x08004000, 0x00800 }, /* flash sector 8 - 2kb */
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{ 0x08004800, 0x00800 }, /* flash sector 9 - 2kb */
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{ 0x08005000, 0x00800 }, /* flash sector 10 - 2kb */
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{ 0x08005800, 0x00800 }, /* flash sector 11 - 2kb */
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{ 0x08006000, 0x00800 }, /* flash sector 12 - 2kb */
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{ 0x08006800, 0x00800 }, /* flash sector 13 - 2kb */
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{ 0x08007000, 0x00800 }, /* flash sector 14 - 2kb */
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{ 0x08007800, 0x00800 }, /* flash sector 15 - 2kb */
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#endif
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#if (BOOT_NVM_SIZE_KB > 32)
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{ 0x08008000, 0x00800 }, /* flash sector 16 - 2kb */
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{ 0x08008800, 0x00800 }, /* flash sector 17 - 2kb */
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{ 0x08009000, 0x00800 }, /* flash sector 18 - 2kb */
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{ 0x08009800, 0x00800 }, /* flash sector 19 - 2kb */
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{ 0x0800a000, 0x00800 }, /* flash sector 20 - 2kb */
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{ 0x0800a800, 0x00800 }, /* flash sector 21 - 2kb */
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{ 0x0800b000, 0x00800 }, /* flash sector 22 - 2kb */
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{ 0x0800b800, 0x00800 }, /* flash sector 23 - 2kb */
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{ 0x0800c000, 0x00800 }, /* flash sector 24 - 2kb */
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{ 0x0800c800, 0x00800 }, /* flash sector 25 - 2kb */
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{ 0x0800d000, 0x00800 }, /* flash sector 26 - 2kb */
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{ 0x0800d800, 0x00800 }, /* flash sector 27 - 2kb */
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{ 0x0800e000, 0x00800 }, /* flash sector 28 - 2kb */
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{ 0x0800e800, 0x00800 }, /* flash sector 29 - 2kb */
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{ 0x0800f000, 0x00800 }, /* flash sector 30 - 2kb */
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{ 0x0800f800, 0x00800 }, /* flash sector 31 - 2kb */
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#endif
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#if (BOOT_NVM_SIZE_KB > 64)
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{ 0x08010000, 0x00800 }, /* flash sector 32 - 2kb */
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{ 0x08010800, 0x00800 }, /* flash sector 33 - 2kb */
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{ 0x08011000, 0x00800 }, /* flash sector 34 - 2kb */
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{ 0x08011800, 0x00800 }, /* flash sector 35 - 2kb */
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{ 0x08012000, 0x00800 }, /* flash sector 36 - 2kb */
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{ 0x08012800, 0x00800 }, /* flash sector 37 - 2kb */
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{ 0x08013000, 0x00800 }, /* flash sector 38 - 2kb */
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{ 0x08013800, 0x00800 }, /* flash sector 39 - 2kb */
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{ 0x08014000, 0x00800 }, /* flash sector 40 - 2kb */
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{ 0x08014800, 0x00800 }, /* flash sector 41 - 2kb */
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{ 0x08015000, 0x00800 }, /* flash sector 42 - 2kb */
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{ 0x08015800, 0x00800 }, /* flash sector 43 - 2kb */
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{ 0x08016000, 0x00800 }, /* flash sector 44 - 2kb */
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{ 0x08016800, 0x00800 }, /* flash sector 45 - 2kb */
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{ 0x08017000, 0x00800 }, /* flash sector 46 - 2kb */
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{ 0x08017800, 0x00800 }, /* flash sector 47 - 2kb */
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{ 0x08018000, 0x00800 }, /* flash sector 48 - 2kb */
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{ 0x08018800, 0x00800 }, /* flash sector 49 - 2kb */
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{ 0x08019000, 0x00800 }, /* flash sector 50 - 2kb */
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{ 0x08019800, 0x00800 }, /* flash sector 51 - 2kb */
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{ 0x0801a000, 0x00800 }, /* flash sector 52 - 2kb */
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{ 0x0801a800, 0x00800 }, /* flash sector 53 - 2kb */
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{ 0x0801b000, 0x00800 }, /* flash sector 54 - 2kb */
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{ 0x0801b800, 0x00800 }, /* flash sector 55 - 2kb */
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{ 0x0801c000, 0x00800 }, /* flash sector 56 - 2kb */
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{ 0x0801c800, 0x00800 }, /* flash sector 57 - 2kb */
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{ 0x0801d000, 0x00800 }, /* flash sector 58 - 2kb */
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{ 0x0801d800, 0x00800 }, /* flash sector 59 - 2kb */
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{ 0x0801e000, 0x00800 }, /* flash sector 60 - 2kb */
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{ 0x0801e800, 0x00800 }, /* flash sector 61 - 2kb */
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{ 0x0801f000, 0x00800 }, /* flash sector 62 - 2kb */
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{ 0x0801f800, 0x00800 }, /* flash sector 63 - 2kb */
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#endif
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#if (BOOT_NVM_SIZE_KB > 128)
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{ 0x08020000, 0x00800 }, /* flash sector 64 - 2kb */
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{ 0x08020800, 0x00800 }, /* flash sector 65 - 2kb */
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{ 0x08021000, 0x00800 }, /* flash sector 66 - 2kb */
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{ 0x08021800, 0x00800 }, /* flash sector 67 - 2kb */
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{ 0x08022000, 0x00800 }, /* flash sector 68 - 2kb */
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{ 0x08022800, 0x00800 }, /* flash sector 69 - 2kb */
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{ 0x08023000, 0x00800 }, /* flash sector 70 - 2kb */
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{ 0x08023800, 0x00800 }, /* flash sector 71 - 2kb */
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{ 0x08024000, 0x00800 }, /* flash sector 72 - 2kb */
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{ 0x08024800, 0x00800 }, /* flash sector 73 - 2kb */
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{ 0x08025000, 0x00800 }, /* flash sector 74 - 2kb */
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{ 0x08025800, 0x00800 }, /* flash sector 75 - 2kb */
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{ 0x08026000, 0x00800 }, /* flash sector 76 - 2kb */
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{ 0x08026800, 0x00800 }, /* flash sector 77 - 2kb */
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{ 0x08027000, 0x00800 }, /* flash sector 78 - 2kb */
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{ 0x08027800, 0x00800 }, /* flash sector 79 - 2kb */
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{ 0x08028000, 0x00800 }, /* flash sector 80 - 2kb */
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{ 0x08028800, 0x00800 }, /* flash sector 81 - 2kb */
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{ 0x08029000, 0x00800 }, /* flash sector 82 - 2kb */
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{ 0x08029800, 0x00800 }, /* flash sector 83 - 2kb */
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{ 0x0802a000, 0x00800 }, /* flash sector 84 - 2kb */
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{ 0x0802a800, 0x00800 }, /* flash sector 85 - 2kb */
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{ 0x0802b000, 0x00800 }, /* flash sector 86 - 2kb */
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{ 0x0802b800, 0x00800 }, /* flash sector 87 - 2kb */
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{ 0x0802c000, 0x00800 }, /* flash sector 88 - 2kb */
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{ 0x0802c800, 0x00800 }, /* flash sector 89 - 2kb */
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{ 0x0802d000, 0x00800 }, /* flash sector 90 - 2kb */
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{ 0x0802d800, 0x00800 }, /* flash sector 91 - 2kb */
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{ 0x0802e000, 0x00800 }, /* flash sector 92 - 2kb */
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{ 0x0802e800, 0x00800 }, /* flash sector 93 - 2kb */
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{ 0x0802f000, 0x00800 }, /* flash sector 94 - 2kb */
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{ 0x0802f800, 0x00800 }, /* flash sector 95 - 2kb */
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{ 0x08030000, 0x00800 }, /* flash sector 96 - 2kb */
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{ 0x08030800, 0x00800 }, /* flash sector 97 - 2kb */
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{ 0x08031000, 0x00800 }, /* flash sector 98 - 2kb */
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{ 0x08031800, 0x00800 }, /* flash sector 99 - 2kb */
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{ 0x08032000, 0x00800 }, /* flash sector 100 - 2kb */
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{ 0x08032800, 0x00800 }, /* flash sector 101 - 2kb */
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{ 0x08033000, 0x00800 }, /* flash sector 102 - 2kb */
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{ 0x08033800, 0x00800 }, /* flash sector 103 - 2kb */
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{ 0x08034000, 0x00800 }, /* flash sector 104 - 2kb */
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{ 0x08034800, 0x00800 }, /* flash sector 105 - 2kb */
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{ 0x08035000, 0x00800 }, /* flash sector 106 - 2kb */
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{ 0x08035800, 0x00800 }, /* flash sector 107 - 2kb */
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{ 0x08036000, 0x00800 }, /* flash sector 108 - 2kb */
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{ 0x08036800, 0x00800 }, /* flash sector 109 - 2kb */
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{ 0x08037000, 0x00800 }, /* flash sector 110 - 2kb */
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{ 0x08037800, 0x00800 }, /* flash sector 111 - 2kb */
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{ 0x08038000, 0x00800 }, /* flash sector 112 - 2kb */
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{ 0x08038800, 0x00800 }, /* flash sector 113 - 2kb */
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{ 0x08039000, 0x00800 }, /* flash sector 114 - 2kb */
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{ 0x08039800, 0x00800 }, /* flash sector 115 - 2kb */
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{ 0x0803a000, 0x00800 }, /* flash sector 116 - 2kb */
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{ 0x0803a800, 0x00800 }, /* flash sector 117 - 2kb */
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{ 0x0803b000, 0x00800 }, /* flash sector 118 - 2kb */
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{ 0x0803b800, 0x00800 }, /* flash sector 119 - 2kb */
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{ 0x0803c000, 0x00800 }, /* flash sector 120 - 2kb */
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{ 0x0803c800, 0x00800 }, /* flash sector 121 - 2kb */
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{ 0x0803d000, 0x00800 }, /* flash sector 122 - 2kb */
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{ 0x0803d800, 0x00800 }, /* flash sector 123 - 2kb */
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{ 0x0803e000, 0x00800 }, /* flash sector 124 - 2kb */
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{ 0x0803e800, 0x00800 }, /* flash sector 125 - 2kb */
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{ 0x0803f000, 0x00800 }, /* flash sector 126 - 2kb */
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{ 0x0803f800, 0x00800 }, /* flash sector 127 - 2kb */
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#endif
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#if (BOOT_NVM_SIZE_KB > 256)
|
||||
#error "BOOT_NVM_SIZE_KB > 256 is currently not supported."
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
/*********************************** end of flash_layout.c *****************************/
|
||||
|
|
@ -0,0 +1,207 @@
|
|||
/****************************************************************************************
|
||||
* Include files
|
||||
****************************************************************************************/
|
||||
#include "boot.h" /* bootloader generic header */
|
||||
#include "stm32f1xx.h" /* STM32 registers and drivers */
|
||||
#include "stm32f1xx_ll_rcc.h" /* STM32 LL RCC header */
|
||||
#include "stm32f1xx_ll_bus.h" /* STM32 LL BUS header */
|
||||
#include "stm32f1xx_ll_system.h" /* STM32 LL SYSTEM header */
|
||||
#include "stm32f1xx_ll_utils.h" /* STM32 LL UTILS header */
|
||||
#include "stm32f1xx_ll_usart.h" /* STM32 LL USART header */
|
||||
#include "stm32f1xx_ll_gpio.h" /* STM32 LL GPIO header */
|
||||
|
||||
#include "io_pins.h"
|
||||
|
||||
/****************************************************************************************
|
||||
* Function prototypes
|
||||
****************************************************************************************/
|
||||
static void Init(void);
|
||||
static void SystemClock_Config(void);
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief This is the entry point for the bootloader application and is called
|
||||
** by the reset interrupt vector after the C-startup routines executed.
|
||||
** \return Program return code.
|
||||
**
|
||||
****************************************************************************************/
|
||||
int main(void)
|
||||
{
|
||||
/* initialize the microcontroller */
|
||||
Init();
|
||||
/* initialize the bootloader */
|
||||
BootInit();
|
||||
|
||||
/* start the infinite program loop */
|
||||
while (1)
|
||||
{
|
||||
/* run the bootloader task */
|
||||
BootTask();
|
||||
}
|
||||
|
||||
/* program should never get here */
|
||||
return 0;
|
||||
} /*** end of main ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the microcontroller.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void Init(void)
|
||||
{
|
||||
/* HAL library initialization */
|
||||
HAL_Init();
|
||||
/* configure system clock */
|
||||
SystemClock_Config();
|
||||
} /*** end of Init ***/
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief System Clock Configuration. This code was created by CubeMX and configures
|
||||
** the system clock to match the configuration in the bootloader's
|
||||
** configuration (blt_conf.h), specifically the macros:
|
||||
** BOOT_CPU_SYSTEM_SPEED_KHZ and BOOT_CPU_XTAL_SPEED_KHZ.
|
||||
** Note that the Lower Layer drivers were selected in CubeMX for the RCC
|
||||
** subsystem.
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
static void SystemClock_Config(void)
|
||||
{
|
||||
/* Set flash latency. */
|
||||
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
|
||||
if (LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2)
|
||||
{
|
||||
/* Error setting flash latency. */
|
||||
ASSERT_RT(BLT_FALSE);
|
||||
}
|
||||
|
||||
/* Enable the HSE clock. */
|
||||
LL_RCC_HSE_Enable();
|
||||
/* Wait till HSE is ready. */
|
||||
while (LL_RCC_HSE_IsReady() != 1)
|
||||
{
|
||||
;
|
||||
}
|
||||
|
||||
/* Configure and enable the PLL. */
|
||||
/* 48MHz max */
|
||||
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_2, LL_RCC_PLL_MUL_12);
|
||||
LL_RCC_PLL_Enable();
|
||||
|
||||
/* Wait till PLL is ready. */
|
||||
while (LL_RCC_PLL_IsReady() != 1)
|
||||
{
|
||||
;
|
||||
}
|
||||
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
|
||||
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
|
||||
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
|
||||
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
|
||||
|
||||
/* Wait till System clock is ready. */
|
||||
while (LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
|
||||
{
|
||||
;
|
||||
}
|
||||
/* Update the system clock speed setting. */
|
||||
LL_SetSystemCoreClock(BOOT_CPU_SYSTEM_SPEED_KHZ * 1000u);
|
||||
} /*** end of SystemClock_Config ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief Initializes the Global MSP. This function is called from HAL_Init()
|
||||
** function to perform system level initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
LL_GPIO_InitTypeDef GPIO_InitStruct;
|
||||
|
||||
/* AFIO and PWR clock enable. */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||
|
||||
/* GPIO ports clock enable. */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART clock enable. */
|
||||
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
|
||||
/* UART TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = LL_UART_TX_PIN;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
|
||||
LL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = LL_UART_RX_PIN;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
|
||||
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
|
||||
LL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* CAN clock enable. */
|
||||
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_CAN1);
|
||||
/* CAN TX and RX GPIO pin configuration. */
|
||||
GPIO_InitStruct.Pin = LL_CAN_TX_PIN;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH;
|
||||
LL_GPIO_Init(CAN_GPIO_PORT, &GPIO_InitStruct);
|
||||
GPIO_InitStruct.Pin = LL_CAN_RX_PIN;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = LL_GPIO_PULL_UP;
|
||||
LL_GPIO_Init(CAN_GPIO_PORT, &GPIO_InitStruct);
|
||||
#endif
|
||||
|
||||
#if (BOOT_CPU_USER_PROGRAM_START_HOOK > 0)
|
||||
/* Configure GPIO pin for (optional) backdoor entry input. */
|
||||
GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
|
||||
GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING;
|
||||
LL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
#endif
|
||||
} /*** end of HAL_MspInit ***/
|
||||
|
||||
|
||||
/************************************************************************************//**
|
||||
** \brief DeInitializes the Global MSP. This function is called from HAL_DeInit()
|
||||
** function to perform system level de-initialization (GPIOs, clock, DMA,
|
||||
** interrupt).
|
||||
** \return none.
|
||||
**
|
||||
****************************************************************************************/
|
||||
void HAL_MspDeInit(void)
|
||||
{
|
||||
/* Reset the RCC clock configuration to the default reset state. */
|
||||
LL_RCC_DeInit();
|
||||
|
||||
/* Deinit used GPIOs. */
|
||||
LL_GPIO_DeInit(GPIOB);
|
||||
LL_GPIO_DeInit(GPIOA);
|
||||
|
||||
#if (BOOT_COM_CAN_ENABLE > 0)
|
||||
/* CAN clock disable. */
|
||||
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_CAN1);
|
||||
#endif
|
||||
|
||||
#if (BOOT_COM_RS232_ENABLE > 0)
|
||||
/* UART clock disable. */
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_USART1);
|
||||
#endif
|
||||
|
||||
/* GPIO ports clock disable. */
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOB);
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_GPIOA);
|
||||
|
||||
/* AFIO and PWR clock disable. */
|
||||
LL_APB1_GRP1_DisableClock(LL_APB1_GRP1_PERIPH_PWR);
|
||||
LL_APB2_GRP1_DisableClock(LL_APB2_GRP1_PERIPH_AFIO);
|
||||
} /*** end of HAL_MspDeInit ***/
|
||||
|
||||
|
||||
/*********************************** end of main.c *************************************/
|
||||
|
|
@ -0,0 +1,379 @@
|
|||
/**
|
||||
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
|
||||
* @file startup_stm32f103xb.s
|
||||
* @author MCD Application Team
|
||||
* @version V4.2.0
|
||||
* @date 31-March-2017
|
||||
* @brief STM32F103xB Devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
*
|
||||
* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF108F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word USB_HP_CAN1_TX_IRQHandler
|
||||
.word USB_LP_CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_IRQHandler
|
||||
.word TIM1_UP_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USBWakeUp_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x108. This is for boot in RAM mode for
|
||||
STM32F10x Medium Density devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_IRQHandler
|
||||
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_CAN1_TX_IRQHandler
|
||||
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_CAN1_RX0_IRQHandler
|
||||
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_IRQHandler
|
||||
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
Loading…
Reference in New Issue