From 5e9ad8f15633c8f7c548df406e737c6b00aec9a4 Mon Sep 17 00:00:00 2001 From: Matthew Kennedy Date: Tue, 13 Oct 2020 23:11:32 -0700 Subject: [PATCH] switch to 14 pin stlinkv3 connector --- board_dev/wideband_controller-cache.lib | 38 +- board_dev/wideband_controller.kicad_pcb | 1865 ++++++++++++----------- board_dev/wideband_controller.sch | 65 +- 3 files changed, 1048 insertions(+), 920 deletions(-) diff --git a/board_dev/wideband_controller-cache.lib b/board_dev/wideband_controller-cache.lib index 0f4621c..dfc8e4e 100644 --- a/board_dev/wideband_controller-cache.lib +++ b/board_dev/wideband_controller-cache.lib @@ -96,38 +96,46 @@ X Pin_8 8 -200 -400 150 R 50 50 1 1 P ENDDRAW ENDDEF # -# Connector_Generic_Conn_02x05_Odd_Even +# Connector_Generic_Conn_02x07_Odd_Even # -DEF Connector_Generic_Conn_02x05_Odd_Even J 0 40 Y N 1 F N -F0 "J" 50 300 50 H V C CNN -F1 "Connector_Generic_Conn_02x05_Odd_Even" 50 -300 50 H V C CNN +DEF Connector_Generic_Conn_02x07_Odd_Even J 0 40 Y N 1 F N +F0 "J" 50 400 50 H V C CNN +F1 "Connector_Generic_Conn_02x07_Odd_Even" 50 -400 50 H V C CNN F2 "" 0 0 50 H I C CNN F3 "" 0 0 50 H I C CNN $FPLIST Connector*:*_2x??_* $ENDFPLIST DRAW +S -50 -295 0 -305 1 1 6 N S -50 -195 0 -205 1 1 6 N S -50 -95 0 -105 1 1 6 N S -50 5 0 -5 1 1 6 N S -50 105 0 95 1 1 6 N S -50 205 0 195 1 1 6 N -S -50 250 150 -250 1 1 10 f +S -50 305 0 295 1 1 6 N +S -50 350 150 -350 1 1 10 f +S 150 -295 100 -305 1 1 6 N S 150 -195 100 -205 1 1 6 N S 150 -95 100 -105 1 1 6 N S 150 5 100 -5 1 1 6 N S 150 105 100 95 1 1 6 N S 150 205 100 195 1 1 6 N -X Pin_1 1 -200 200 150 R 50 50 1 1 P -X Pin_10 10 300 -200 150 L 50 50 1 1 P -X Pin_2 2 300 200 150 L 50 50 1 1 P -X Pin_3 3 -200 100 150 R 50 50 1 1 P -X Pin_4 4 300 100 150 L 50 50 1 1 P -X Pin_5 5 -200 0 150 R 50 50 1 1 P -X Pin_6 6 300 0 150 L 50 50 1 1 P -X Pin_7 7 -200 -100 150 R 50 50 1 1 P -X Pin_8 8 300 -100 150 L 50 50 1 1 P -X Pin_9 9 -200 -200 150 R 50 50 1 1 P +S 150 305 100 295 1 1 6 N +X Pin_1 1 -200 300 150 R 50 50 1 1 P +X Pin_10 10 300 -100 150 L 50 50 1 1 P +X Pin_11 11 -200 -200 150 R 50 50 1 1 P +X Pin_12 12 300 -200 150 L 50 50 1 1 P +X Pin_13 13 -200 -300 150 R 50 50 1 1 P +X Pin_14 14 300 -300 150 L 50 50 1 1 P +X Pin_2 2 300 300 150 L 50 50 1 1 P +X Pin_3 3 -200 200 150 R 50 50 1 1 P +X Pin_4 4 300 200 150 L 50 50 1 1 P +X Pin_5 5 -200 100 150 R 50 50 1 1 P +X Pin_6 6 300 100 150 L 50 50 1 1 P +X Pin_7 7 -200 0 150 R 50 50 1 1 P +X Pin_8 8 300 0 150 L 50 50 1 1 P +X Pin_9 9 -200 -100 150 R 50 50 1 1 P ENDDRAW ENDDEF # diff --git a/board_dev/wideband_controller.kicad_pcb b/board_dev/wideband_controller.kicad_pcb index aa952a5..8413396 100644 --- a/board_dev/wideband_controller.kicad_pcb +++ b/board_dev/wideband_controller.kicad_pcb @@ -2,11 +2,11 @@ (general (thickness 1.6) - (drawings 6) - (tracks 554) + (drawings 8) + (tracks 604) (zones 0) (modules 58) - (nets 62) + (nets 64) ) (page A4) @@ -18,7 +18,7 @@ (34 B.Paste user hide) (35 F.Paste user hide) (36 B.SilkS user hide) - (37 F.SilkS user hide) + (37 F.SilkS user) (38 B.Mask user hide) (39 F.Mask user hide) (40 Dwgs.User user) @@ -115,48 +115,50 @@ (net 17 "Net-(C5-Pad1)") (net 18 "Net-(C6-Pad2)") (net 19 "Net-(C6-Pad1)") - (net 20 "Net-(J1-Pad8)") - (net 21 "Net-(J1-Pad7)") - (net 22 "Net-(J1-Pad6)") - (net 23 "Net-(R3-Pad2)") - (net 24 "Net-(R4-Pad2)") - (net 25 "Net-(R11-Pad1)") - (net 26 "Net-(R12-Pad1)") - (net 27 "Net-(R18-Pad1)") - (net 28 "Net-(R19-Pad1)") - (net 29 /Ip_dac) - (net 30 /Nernst_esr_drive) - (net 31 /Pump_Ref_Feedback) - (net 32 "Net-(U4-Pad30)") - (net 33 "Net-(U4-Pad29)") - (net 34 "Net-(U4-Pad20)") - (net 35 "Net-(U4-Pad19)") - (net 36 "Net-(U4-Pad18)") - (net 37 "Net-(U4-Pad16)") - (net 38 "Net-(U4-Pad15)") - (net 39 "Net-(U4-Pad14)") - (net 40 "Net-(U4-Pad11)") - (net 41 "Net-(U4-Pad10)") - (net 42 "Net-(U4-Pad9)") - (net 43 "Net-(U4-Pad3)") - (net 44 "Net-(U4-Pad2)") - (net 45 /CAN_TX) - (net 46 /CAN_RX) - (net 47 /VDDA) - (net 48 /SPI_MOSI) - (net 49 /SPI_MISO) - (net 50 /SPI_SCK) - (net 51 /SPI_CS) - (net 52 /heater_pwm) - (net 53 "Net-(Q1-Pad1)") - (net 54 "Net-(J2-Pad1)") - (net 55 "Net-(D1-Pad2)") - (net 56 "Net-(R29-Pad2)") - (net 57 "Net-(D2-Pad2)") - (net 58 "Net-(R32-Pad1)") - (net 59 "Net-(C3-Pad2)") - (net 60 "Net-(C3-Pad1)") - (net 61 "Net-(R17-Pad1)") + (net 20 "Net-(R3-Pad2)") + (net 21 "Net-(R4-Pad2)") + (net 22 "Net-(R11-Pad1)") + (net 23 "Net-(R12-Pad1)") + (net 24 "Net-(R18-Pad1)") + (net 25 "Net-(R19-Pad1)") + (net 26 /Ip_dac) + (net 27 /Nernst_esr_drive) + (net 28 /Pump_Ref_Feedback) + (net 29 "Net-(U4-Pad20)") + (net 30 "Net-(U4-Pad19)") + (net 31 "Net-(U4-Pad18)") + (net 32 "Net-(U4-Pad16)") + (net 33 "Net-(U4-Pad15)") + (net 34 "Net-(U4-Pad14)") + (net 35 "Net-(U4-Pad11)") + (net 36 "Net-(U4-Pad10)") + (net 37 "Net-(U4-Pad9)") + (net 38 "Net-(U4-Pad3)") + (net 39 "Net-(U4-Pad2)") + (net 40 /CAN_TX) + (net 41 /CAN_RX) + (net 42 /VDDA) + (net 43 /SPI_MOSI) + (net 44 /SPI_MISO) + (net 45 /SPI_SCK) + (net 46 /SPI_CS) + (net 47 /heater_pwm) + (net 48 "Net-(Q1-Pad1)") + (net 49 "Net-(J2-Pad1)") + (net 50 "Net-(D1-Pad2)") + (net 51 "Net-(R29-Pad2)") + (net 52 "Net-(D2-Pad2)") + (net 53 "Net-(R32-Pad1)") + (net 54 "Net-(C3-Pad2)") + (net 55 "Net-(C3-Pad1)") + (net 56 "Net-(R17-Pad1)") + (net 57 /UART_TX) + (net 58 /UART_RX) + (net 59 "Net-(J4-Pad10)") + (net 60 "Net-(J4-Pad9)") + (net 61 "Net-(J4-Pad8)") + (net 62 "Net-(J4-Pad2)") + (net 63 "Net-(J4-Pad1)") (net_class Default "This is the default net class." (clearance 0.1651) @@ -184,6 +186,8 @@ (add_net /SPI_SCK) (add_net /SWCLK) (add_net /SWDIO) + (add_net /UART_RX) + (add_net /UART_TX) (add_net /Un_sense) (add_net /VDDA) (add_net /Vm) @@ -199,10 +203,12 @@ (add_net "Net-(C6-Pad2)") (add_net "Net-(D1-Pad2)") (add_net "Net-(D2-Pad2)") - (add_net "Net-(J1-Pad6)") - (add_net "Net-(J1-Pad7)") - (add_net "Net-(J1-Pad8)") (add_net "Net-(J2-Pad1)") + (add_net "Net-(J4-Pad1)") + (add_net "Net-(J4-Pad10)") + (add_net "Net-(J4-Pad2)") + (add_net "Net-(J4-Pad8)") + (add_net "Net-(J4-Pad9)") (add_net "Net-(Q1-Pad1)") (add_net "Net-(R11-Pad1)") (add_net "Net-(R12-Pad1)") @@ -222,12 +228,118 @@ (add_net "Net-(U4-Pad19)") (add_net "Net-(U4-Pad2)") (add_net "Net-(U4-Pad20)") - (add_net "Net-(U4-Pad29)") (add_net "Net-(U4-Pad3)") - (add_net "Net-(U4-Pad30)") (add_net "Net-(U4-Pad9)") ) + (module Connector_PinHeader_1.27mm:PinHeader_2x07_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 5F869B72) + (at 89.281 100.076 90) + (descr "surface-mounted straight pin header, 2x07, 1.27mm pitch, double rows") + (tags "Surface mounted pin header SMD 2x07 1.27mm double row") + (path /5FAC09D3) + (attr smd) + (fp_text reference J4 (at 0 -5.505 90) (layer F.SilkS) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text value FTSH-107-01-F-DV-K (at 0 5.505 90) (layer F.Fab) hide + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_text user %R (at 0 0) (layer F.Fab) + (effects (font (size 1 1) (thickness 0.15))) + ) + (fp_line (start 4.3 -4.95) (end -4.3 -4.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 4.3 4.95) (end 4.3 -4.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.3 4.95) (end 4.3 4.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start -4.3 -4.95) (end -4.3 4.95) (layer F.CrtYd) (width 0.05)) + (fp_line (start 1.765 4.44) (end 1.765 4.505) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.765 4.44) (end -1.765 4.505) (layer F.SilkS) (width 0.12)) + (fp_line (start 1.765 -4.505) (end 1.765 -4.44) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.765 -4.505) (end -1.765 -4.44) (layer F.SilkS) (width 0.12)) + (fp_line (start -3.09 -4.44) (end -1.765 -4.44) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.765 4.505) (end 1.765 4.505) (layer F.SilkS) (width 0.12)) + (fp_line (start -1.765 -4.505) (end 1.765 -4.505) (layer F.SilkS) (width 0.12)) + (fp_line (start 2.75 4.01) (end 1.705 4.01) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 3.61) (end 2.75 4.01) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 3.61) (end 2.75 3.61) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 4.01) (end -1.705 4.01) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 3.61) (end -2.75 4.01) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 3.61) (end -2.75 3.61) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -3.61) (end 1.705 -3.61) (layer F.Fab) (width 0.1)) + (fp_line (start 2.75 -4.01) (end 2.75 -3.61) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 -4.01) (end 2.75 -4.01) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -3.61) (end -1.705 -3.61) (layer F.Fab) (width 0.1)) + (fp_line (start -2.75 -4.01) (end -2.75 -3.61) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 -4.01) (end -2.75 -4.01) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 -4.445) (end 1.705 4.445) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 -4.01) (end -1.27 -4.445) (layer F.Fab) (width 0.1)) + (fp_line (start -1.705 4.445) (end -1.705 -4.01) (layer F.Fab) (width 0.1)) + (fp_line (start -1.27 -4.445) (end 1.705 -4.445) (layer F.Fab) (width 0.1)) + (fp_line (start 1.705 4.445) (end -1.705 4.445) (layer F.Fab) (width 0.1)) + (pad 14 smd rect (at 1.95 3.81 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 57 /UART_TX)) + (pad 13 smd rect (at -1.95 3.81 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 58 /UART_RX)) + (pad 12 smd rect (at 1.95 2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 8 /nRESET)) + (pad 11 smd rect (at -1.95 2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 10 smd rect (at 1.95 1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 59 "Net-(J4-Pad10)")) + (pad 9 smd rect (at -1.95 1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 60 "Net-(J4-Pad9)")) + (pad 8 smd rect (at 1.95 0 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 61 "Net-(J4-Pad8)")) + (pad 7 smd rect (at -1.95 0 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 6 smd rect (at 1.95 -1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 9 /SWCLK)) + (pad 5 smd rect (at -1.95 -1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 1 GND)) + (pad 4 smd rect (at 1.95 -2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 10 /SWDIO)) + (pad 3 smd rect (at -1.95 -2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 7 +3V3)) + (pad 2 smd rect (at 1.95 -3.81 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 62 "Net-(J4-Pad2)")) + (pad 1 smd rect (at -1.95 -3.81 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) + (net 63 "Net-(J4-Pad1)")) + (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x07_P1.27mm_Vertical_SMD.wrl + (at (xyz 0 0 0)) + (scale (xyz 1 1 1)) + (rotate (xyz 0 0 0)) + ) + ) + (module Capacitor_SMD:C_0402_1005Metric (layer F.Cu) (tedit 5B301BBE) (tstamp 5F6A020F) (at 93.599 83.312 180) (descr "Capacitor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") @@ -252,9 +364,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 59 "Net-(C3-Pad2)")) + (net 54 "Net-(C3-Pad2)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 60 "Net-(C3-Pad1)")) + (net 55 "Net-(C3-Pad1)")) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -286,7 +398,7 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 58 "Net-(R32-Pad1)")) + (net 53 "Net-(R32-Pad1)")) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 2 /LSU_Rtrim)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -320,9 +432,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 59 "Net-(C3-Pad2)")) + (net 54 "Net-(C3-Pad2)")) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 60 "Net-(C3-Pad1)")) + (net 55 "Net-(C3-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -356,7 +468,7 @@ (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 13 /Vm)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 58 "Net-(R32-Pad1)")) + (net 53 "Net-(R32-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -388,9 +500,9 @@ (fp_line (start -0.5 -0.25) (end 0.5 -0.25) (layer F.Fab) (width 0.1)) (fp_line (start -0.5 0.25) (end -0.5 -0.25) (layer F.Fab) (width 0.1)) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 59 "Net-(C3-Pad2)")) + (net 54 "Net-(C3-Pad2)")) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 29 /Ip_dac)) + (net 26 /Ip_dac)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -475,11 +587,11 @@ (pad 8 smd roundrect (at 2.8625 1.95 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 19 "Net-(C6-Pad1)")) (pad 7 smd roundrect (at -2.8625 1.95 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 31 /Pump_Ref_Feedback)) + (net 28 /Pump_Ref_Feedback)) (pad 6 smd roundrect (at -2.8625 1.3 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 27 "Net-(R18-Pad1)")) + (net 24 "Net-(R18-Pad1)")) (pad 5 smd roundrect (at -2.8625 0.65 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 28 "Net-(R19-Pad1)")) + (net 25 "Net-(R19-Pad1)")) (pad 4 smd roundrect (at -2.8625 0 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 +3V3)) (pad 3 smd roundrect (at -2.8625 -0.65 180) (size 1.475 0.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)) @@ -492,94 +604,6 @@ ) ) - (module Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD (layer F.Cu) (tedit 59FED6E3) (tstamp 5F632CB3) - (at 89.662 99.06 90) - (descr "surface-mounted straight pin header, 2x05, 1.27mm pitch, double rows") - (tags "Surface mounted pin header SMD 2x05 1.27mm double row") - (path /5ECAA616) - (attr smd) - (fp_text reference J1 (at 0 -4.235 90) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_text value Conn_02x05_Odd_Even (at 0 4.235 90) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) - ) - (fp_line (start 4.3 -3.7) (end -4.3 -3.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 4.3 3.7) (end 4.3 -3.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -4.3 3.7) (end 4.3 3.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start -4.3 -3.7) (end -4.3 3.7) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.765 3.17) (end 1.765 3.235) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.765 3.17) (end -1.765 3.235) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.765 -3.235) (end 1.765 -3.17) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.765 -3.235) (end -1.765 -3.17) (layer F.SilkS) (width 0.12)) - (fp_line (start -3.09 -3.17) (end -1.765 -3.17) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.765 3.235) (end 1.765 3.235) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.765 -3.235) (end 1.765 -3.235) (layer F.SilkS) (width 0.12)) - (fp_line (start 2.75 2.74) (end 1.705 2.74) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 2.34) (end 2.75 2.74) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 2.34) (end 2.75 2.34) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 2.74) (end -1.705 2.74) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 2.34) (end -2.75 2.74) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 2.34) (end -2.75 2.34) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 1.47) (end 1.705 1.47) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 1.07) (end 2.75 1.47) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 1.07) (end 2.75 1.07) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 1.47) (end -1.705 1.47) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 1.07) (end -2.75 1.47) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 1.07) (end -2.75 1.07) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 0.2) (end 1.705 0.2) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 -0.2) (end 2.75 0.2) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 -0.2) (end 2.75 -0.2) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 0.2) (end -1.705 0.2) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 -0.2) (end -2.75 0.2) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 -0.2) (end -2.75 -0.2) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 -1.07) (end 1.705 -1.07) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 -1.47) (end 2.75 -1.07) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 -1.47) (end 2.75 -1.47) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 -1.07) (end -1.705 -1.07) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 -1.47) (end -2.75 -1.07) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 -1.47) (end -2.75 -1.47) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 -2.34) (end 1.705 -2.34) (layer F.Fab) (width 0.1)) - (fp_line (start 2.75 -2.74) (end 2.75 -2.34) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 -2.74) (end 2.75 -2.74) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 -2.34) (end -1.705 -2.34) (layer F.Fab) (width 0.1)) - (fp_line (start -2.75 -2.74) (end -2.75 -2.34) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 -2.74) (end -2.75 -2.74) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 -3.175) (end 1.705 3.175) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 -2.74) (end -1.27 -3.175) (layer F.Fab) (width 0.1)) - (fp_line (start -1.705 3.175) (end -1.705 -2.74) (layer F.Fab) (width 0.1)) - (fp_line (start -1.27 -3.175) (end 1.705 -3.175) (layer F.Fab) (width 0.1)) - (fp_line (start 1.705 3.175) (end -1.705 3.175) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 0) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) - ) - (pad 10 smd rect (at 1.95 2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 8 /nRESET)) - (pad 9 smd rect (at -1.95 2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 8 smd rect (at 1.95 1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 20 "Net-(J1-Pad8)")) - (pad 7 smd rect (at -1.95 1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 21 "Net-(J1-Pad7)")) - (pad 6 smd rect (at 1.95 0 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 22 "Net-(J1-Pad6)")) - (pad 5 smd rect (at -1.95 0 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 4 smd rect (at 1.95 -1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 9 /SWCLK)) - (pad 3 smd rect (at -1.95 -1.27 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 1 GND)) - (pad 2 smd rect (at 1.95 -2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 10 /SWDIO)) - (pad 1 smd rect (at -1.95 -2.54 90) (size 2.4 0.74) (layers F.Cu F.Paste F.Mask) - (net 7 +3V3)) - (model ${KISYS3DMOD}/Connector_PinHeader_1.27mm.3dshapes/PinHeader_2x05_P1.27mm_Vertical_SMD.wrl - (at (xyz 0 0 0)) - (scale (xyz 1 1 1)) - (rotate (xyz 0 0 0)) - ) - ) - (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F68BF1A) (at 90.043 78.74 270) (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") @@ -606,7 +630,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 +3V3)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 57 "Net-(D2-Pad2)")) + (net 52 "Net-(D2-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -642,7 +666,7 @@ (effects (font (size 0.4 0.4) (thickness 0.06))) ) (pad 2 smd roundrect (at 0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 57 "Net-(D2-Pad2)")) + (net 52 "Net-(D2-Pad2)")) (pad 1 smd roundrect (at -0.7875 0) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl @@ -653,7 +677,7 @@ ) (module Resistor_SMD:R_0402_1005Metric (layer F.Cu) (tedit 5B301BBD) (tstamp 5F688B63) - (at 89.027 92.583 90) + (at 89.535 92.456 90) (descr "Resistor SMD 0402 (1005 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: http://www.tortai-tech.com/upload/download/2011102023233369053.pdf), generated with kicad-footprint-generator") (tags resistor) (path /60749D41) @@ -676,7 +700,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 56 "Net-(R29-Pad2)")) + (net 51 "Net-(R29-Pad2)")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -718,53 +742,53 @@ (effects (font (size 1 1) (thickness 0.15))) ) (pad 32 smd roundrect (at -1.75 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 30 /Nernst_esr_drive)) + (net 27 /Nernst_esr_drive)) (pad 31 smd roundrect (at -1.25 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 56 "Net-(R29-Pad2)")) + (net 51 "Net-(R29-Pad2)")) (pad 30 smd roundrect (at -0.75 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 32 "Net-(U4-Pad30)")) + (net 58 /UART_RX)) (pad 29 smd roundrect (at -0.25 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 33 "Net-(U4-Pad29)")) + (net 57 /UART_TX)) (pad 28 smd roundrect (at 0.25 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 48 /SPI_MOSI)) + (net 43 /SPI_MOSI)) (pad 27 smd roundrect (at 0.75 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 49 /SPI_MISO)) + (net 44 /SPI_MISO)) (pad 26 smd roundrect (at 1.25 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 50 /SPI_SCK)) + (net 45 /SPI_SCK)) (pad 25 smd roundrect (at 1.75 -2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 51 /SPI_CS)) + (net 46 /SPI_CS)) (pad 24 smd roundrect (at 2.4375 -1.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 9 /SWCLK)) (pad 23 smd roundrect (at 2.4375 -1.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 10 /SWDIO)) (pad 22 smd roundrect (at 2.4375 -0.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 45 /CAN_TX)) + (net 40 /CAN_TX)) (pad 21 smd roundrect (at 2.4375 -0.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 46 /CAN_RX)) + (net 41 /CAN_RX)) (pad 20 smd roundrect (at 2.4375 0.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 34 "Net-(U4-Pad20)")) + (net 29 "Net-(U4-Pad20)")) (pad 19 smd roundrect (at 2.4375 0.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 35 "Net-(U4-Pad19)")) + (net 30 "Net-(U4-Pad19)")) (pad 18 smd roundrect (at 2.4375 1.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 36 "Net-(U4-Pad18)")) + (net 31 "Net-(U4-Pad18)")) (pad 17 smd roundrect (at 2.4375 1.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 +3V3)) (pad 16 smd roundrect (at 1.75 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 37 "Net-(U4-Pad16)")) + (net 32 "Net-(U4-Pad16)")) (pad 15 smd roundrect (at 1.25 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 38 "Net-(U4-Pad15)")) + (net 33 "Net-(U4-Pad15)")) (pad 14 smd roundrect (at 0.75 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 39 "Net-(U4-Pad14)")) + (net 34 "Net-(U4-Pad14)")) (pad 13 smd roundrect (at 0.25 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 52 /heater_pwm)) + (net 47 /heater_pwm)) (pad 12 smd roundrect (at -0.25 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 29 /Ip_dac)) + (net 26 /Ip_dac)) (pad 11 smd roundrect (at -0.75 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 40 "Net-(U4-Pad11)")) + (net 35 "Net-(U4-Pad11)")) (pad 10 smd roundrect (at -1.25 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 41 "Net-(U4-Pad10)")) + (net 36 "Net-(U4-Pad10)")) (pad 9 smd roundrect (at -1.75 2.4375 180) (size 0.25 0.875) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 42 "Net-(U4-Pad9)")) + (net 37 "Net-(U4-Pad9)")) (pad 8 smd roundrect (at -2.4375 1.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 14 /Ip_sense)) (pad 7 smd roundrect (at -2.4375 1.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) @@ -772,13 +796,13 @@ (pad 6 smd roundrect (at -2.4375 0.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 /Un_sense)) (pad 5 smd roundrect (at -2.4375 0.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 /VDDA)) + (net 42 /VDDA)) (pad 4 smd roundrect (at -2.4375 -0.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 8 /nRESET)) (pad 3 smd roundrect (at -2.4375 -0.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 43 "Net-(U4-Pad3)")) + (net 38 "Net-(U4-Pad3)")) (pad 2 smd roundrect (at -2.4375 -1.25 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 44 "Net-(U4-Pad2)")) + (net 39 "Net-(U4-Pad2)")) (pad 1 smd roundrect (at -2.4375 -1.75 180) (size 0.875 0.25) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 +3V3)) (pad "" smd roundrect (at 1.15 1.15 180) (size 0.93 0.93) (layers F.Paste) (roundrect_rratio 0.25)) @@ -823,9 +847,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 52 /heater_pwm)) + (net 47 /heater_pwm)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 55 "Net-(D1-Pad2)")) + (net 50 "Net-(D1-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -861,7 +885,7 @@ (effects (font (size 0.4 0.4) (thickness 0.06))) ) (pad 2 smd roundrect (at 0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 55 "Net-(D1-Pad2)")) + (net 50 "Net-(D1-Pad2)")) (pad 1 smd roundrect (at -0.7875 0 270) (size 0.875 0.95) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (model ${KISYS3DMOD}/LED_SMD.3dshapes/LED_0603_1608Metric.wrl @@ -995,7 +1019,7 @@ (pad 2 thru_hole oval (at 5.08 0 270) (size 2.08 3.6) (drill 1.4) (layers *.Cu *.Mask) (net 1 GND)) (pad 1 thru_hole roundrect (at 0 0 270) (size 2.08 3.6) (drill 1.4) (layers *.Cu *.Mask) (roundrect_rratio 0.120192) - (net 54 "Net-(J2-Pad1)")) + (net 49 "Net-(J2-Pad1)")) (model ${KISYS3DMOD}/Connector_Phoenix_MSTB.3dshapes/PhoenixContact_MSTBVA_2,5_6-G-5,08_1x06_P5.08mm_Vertical.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1047,11 +1071,11 @@ (pad "" smd rect (at 0.425 -1.525 90) (size 3.05 2.75) (layers F.Paste)) (pad "" smd rect (at 3.775 1.525 90) (size 3.05 2.75) (layers F.Paste)) (pad 2 smd rect (at 2.1 0 90) (size 6.4 5.8) (layers F.Cu F.Mask) - (net 54 "Net-(J2-Pad1)")) + (net 49 "Net-(J2-Pad1)")) (pad 3 smd rect (at -4.2 2.28 90) (size 2.2 1.2) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 1 smd rect (at -4.2 -2.28 90) (size 2.2 1.2) (layers F.Cu F.Paste F.Mask) - (net 53 "Net-(Q1-Pad1)")) + (net 48 "Net-(Q1-Pad1)")) (model ${KISYS3DMOD}/Package_TO_SOT_SMD.3dshapes/TO-252-2.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1059,50 +1083,50 @@ ) ) - (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F667357) - (at 82.677 82.677) + (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer B.Cu) (tedit 59FED5CC) (tstamp 5F667357) + (at 82.677 82.677 180) (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row") (tags "Through hole pin header THT 1x08 2.54mm single row") (path /601805CA) - (fp_text reference J3 (at 0 -2.33) (layer F.SilkS) hide - (effects (font (size 1 1) (thickness 0.15))) + (fp_text reference J3 (at 0 2.33) (layer B.SilkS) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (fp_text value Conn_01x08 (at 0 20.11) (layer F.Fab) - (effects (font (size 1 1) (thickness 0.15))) + (fp_text value Conn_01x08 (at 0 -20.11) (layer B.Fab) + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05)) - (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12)) - (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12)) - (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1)) - (fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1)) - (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1)) - (fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1)) - (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1)) - (fp_text user %R (at 0 8.89 90) (layer F.Fab) hide - (effects (font (size 1 1) (thickness 0.15))) + (fp_line (start 1.8 1.8) (end -1.8 1.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start 1.8 -19.55) (end 1.8 1.8) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.8 -19.55) (end 1.8 -19.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.8 1.8) (end -1.8 -19.55) (layer B.CrtYd) (width 0.05)) + (fp_line (start -1.33 1.33) (end 0 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 0) (end -1.33 1.33) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.27) (end 1.33 -1.27) (layer B.SilkS) (width 0.12)) + (fp_line (start 1.33 -1.27) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 -1.27) (end -1.33 -19.11) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.33 -19.11) (end 1.33 -19.11) (layer B.SilkS) (width 0.12)) + (fp_line (start -1.27 0.635) (end -0.635 1.27) (layer B.Fab) (width 0.1)) + (fp_line (start -1.27 -19.05) (end -1.27 0.635) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 -19.05) (end -1.27 -19.05) (layer B.Fab) (width 0.1)) + (fp_line (start 1.27 1.27) (end 1.27 -19.05) (layer B.Fab) (width 0.1)) + (fp_line (start -0.635 1.27) (end 1.27 1.27) (layer B.Fab) (width 0.1)) + (fp_text user %R (at 0 -8.89 270) (layer B.Fab) hide + (effects (font (size 1 1) (thickness 0.15)) (justify mirror)) ) - (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 48 /SPI_MOSI)) - (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 49 /SPI_MISO)) - (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 50 /SPI_SCK)) - (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 51 /SPI_CS)) - (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 45 /CAN_TX)) - (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) - (net 46 /CAN_RX)) - (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 8 thru_hole oval (at 0 -17.78 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 43 /SPI_MOSI)) + (pad 7 thru_hole oval (at 0 -15.24 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 44 /SPI_MISO)) + (pad 6 thru_hole oval (at 0 -12.7 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 45 /SPI_SCK)) + (pad 5 thru_hole oval (at 0 -10.16 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 46 /SPI_CS)) + (pad 4 thru_hole oval (at 0 -7.62 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 40 /CAN_TX)) + (pad 3 thru_hole oval (at 0 -5.08 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (net 41 /CAN_RX)) + (pad 2 thru_hole oval (at 0 -2.54 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 1 GND)) - (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) + (pad 1 thru_hole rect (at 0 0 180) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 6 +5V)) (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl (at (xyz 0 0 0)) @@ -1203,7 +1227,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 53 "Net-(Q1-Pad1)")) + (net 48 "Net-(Q1-Pad1)")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -1237,9 +1261,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 52 /heater_pwm)) + (net 47 /heater_pwm)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 53 "Net-(Q1-Pad1)")) + (net 48 "Net-(Q1-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1411,7 +1435,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 /VDDA)) + (net 42 /VDDA)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1445,7 +1469,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 14 /Ip_sense)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 61 "Net-(R17-Pad1)")) + (net 56 "Net-(R17-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1563,25 +1587,25 @@ (pad 11 smd rect (at 2.95 0) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 1 GND)) (pad 10 smd rect (at 2.95 0.65) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 26 "Net-(R12-Pad1)")) + (net 23 "Net-(R12-Pad1)")) (pad 9 smd rect (at 2.95 1.3) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 25 "Net-(R11-Pad1)")) + (net 22 "Net-(R11-Pad1)")) (pad 8 smd rect (at 2.95 1.95) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 61 "Net-(R17-Pad1)")) + (net 56 "Net-(R17-Pad1)")) (pad 7 smd rect (at -2.95 1.95) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 15 /Un_sense)) (pad 6 smd rect (at -2.95 1.3) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 23 "Net-(R3-Pad2)")) + (net 20 "Net-(R3-Pad2)")) (pad 5 smd rect (at -2.95 0.65) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 24 "Net-(R4-Pad2)")) + (net 21 "Net-(R4-Pad2)")) (pad 4 smd rect (at -2.95 0) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) (net 7 +3V3)) (pad 3 smd rect (at -2.95 -0.65) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 58 "Net-(R32-Pad1)")) + (net 53 "Net-(R32-Pad1)")) (pad 2 smd rect (at -2.95 -1.3) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 59 "Net-(C3-Pad2)")) + (net 54 "Net-(C3-Pad2)")) (pad 1 smd rect (at -2.95 -1.95) (size 1.45 0.45) (layers F.Cu F.Paste F.Mask) - (net 60 "Net-(C3-Pad1)")) + (net 55 "Net-(C3-Pad1)")) (model ${KISYS3DMOD}/Package_SO.3dshapes/TSSOP-14_4.4x5mm_P0.65mm.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1690,7 +1714,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 27 "Net-(R18-Pad1)")) + (net 24 "Net-(R18-Pad1)")) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 12 /LSU_Un_sense)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -1724,7 +1748,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 28 "Net-(R19-Pad1)")) + (net 25 "Net-(R19-Pad1)")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 19 "Net-(C6-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -1760,7 +1784,7 @@ (pad 2 smd roundrect (at 0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (pad 1 smd roundrect (at -0.485 0) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 28 "Net-(R19-Pad1)")) + (net 25 "Net-(R19-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1792,9 +1816,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 31 /Pump_Ref_Feedback)) + (net 28 /Pump_Ref_Feedback)) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 27 "Net-(R18-Pad1)")) + (net 24 "Net-(R18-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1930,7 +1954,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 15 /Un_sense)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 "Net-(R3-Pad2)")) + (net 20 "Net-(R3-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1964,7 +1988,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 "Net-(R4-Pad2)")) + (net 21 "Net-(R4-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -1996,7 +2020,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 24 "Net-(R4-Pad2)")) + (net 21 "Net-(R4-Pad2)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 12 /LSU_Un_sense)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2030,7 +2054,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 23 "Net-(R3-Pad2)")) + (net 20 "Net-(R3-Pad2)")) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 4 /LSU_Vm)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2064,9 +2088,9 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 25 "Net-(R11-Pad1)")) + (net 22 "Net-(R11-Pad1)")) (pad 1 smd roundrect (at -0.485 0 90) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 61 "Net-(R17-Pad1)")) + (net 56 "Net-(R17-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2100,7 +2124,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 13 /Vm)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 26 "Net-(R12-Pad1)")) + (net 23 "Net-(R12-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2134,7 +2158,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 5 /LSU_Ip)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 26 "Net-(R12-Pad1)")) + (net 23 "Net-(R12-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2168,7 +2192,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 2 /LSU_Rtrim)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 25 "Net-(R11-Pad1)")) + (net 22 "Net-(R11-Pad1)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2200,7 +2224,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 60 "Net-(C3-Pad1)")) + (net 55 "Net-(C3-Pad1)")) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 2 /LSU_Rtrim)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2302,7 +2326,7 @@ (effects (font (size 0.25 0.25) (thickness 0.04))) ) (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 30 /Nernst_esr_drive)) + (net 27 /Nernst_esr_drive)) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 11 "Net-(C2-Pad2)")) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl @@ -2338,7 +2362,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 7 +3V3)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 /VDDA)) + (net 42 /VDDA)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2372,7 +2396,7 @@ (pad 2 smd roundrect (at 0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 18 "Net-(C6-Pad2)")) (pad 1 smd roundrect (at -0.485 0 180) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 31 /Pump_Ref_Feedback)) + (net 28 /Pump_Ref_Feedback)) (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2476,7 +2500,7 @@ (pad 2 smd roundrect (at 0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) (net 1 GND)) (pad 1 smd roundrect (at -0.485 0 270) (size 0.59 0.64) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25) - (net 47 /VDDA)) + (net 42 /VDDA)) (model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/C_0402_1005Metric.wrl (at (xyz 0 0 0)) (scale (xyz 1 1 1)) @@ -2518,6 +2542,10 @@ ) ) + (gr_text 1 (at 84.455 103.124) (layer F.SilkS) + (effects (font (size 1 1) (thickness 0.15))) + ) + (gr_line (start 88.011 103.6955) (end 90.551 103.6955) (layer F.SilkS) (width 0.5)) (gr_text Power (at 87.884 76.708) (layer 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"Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMD" H 9675 1225 50 0001 C CNN -F 3 "~" H 9675 1225 50 0001 C CNN - 1 9675 1225 - 1 0 0 -1 -$EndComp -$Comp L power:+3.3V #PWR019 U 1 1 5ECABBC7 P 9475 1025 @@ -432,16 +421,14 @@ $EndComp $Comp L power:GND #PWR017 U 1 1 5ECABF9C -P 9375 1475 -F 0 "#PWR017" H 9375 1225 50 0001 C CNN -F 1 "GND" H 9380 1302 50 0000 C CNN -F 2 "" H 9375 1475 50 0001 C CNN -F 3 "" H 9375 1475 50 0001 C CNN - 1 9375 1475 - 1 0 0 -1 +P 9300 1225 +F 0 "#PWR017" H 9300 975 50 0001 C CNN +F 1 "GND" H 9305 1052 50 0000 C CNN +F 2 "" H 9300 1225 50 0001 C CNN +F 3 "" H 9300 1225 50 0001 C CNN + 1 9300 1225 + 0 1 1 0 $EndComp -Wire Wire Line - 9375 1475 9375 1425 Wire Wire Line 9375 1125 9475 1125 Wire Wire Line @@ -451,7 +438,6 @@ Wire Wire Line 9375 1225 9375 1125 Wire Wire Line 9475 1425 9375 1425 -Connection ~ 9375 1425 Wire Wire Line 9375 1425 9375 1225 Wire Wire Line @@ -1516,8 +1502,6 @@ Wire Wire Line 8850 2625 8375 2625 NoConn ~ 7375 2925 NoConn ~ 7375 2825 -NoConn ~ 7375 3825 -NoConn ~ 7375 3925 $Comp L power:GND #PWR0120 U 1 1 60687757 @@ -1539,8 +1523,6 @@ NoConn ~ 8375 2825 NoConn ~ 8375 2925 NoConn ~ 8375 3025 NoConn ~ 8375 3325 -NoConn ~ 8375 3425 -NoConn ~ 8375 3525 NoConn ~ 7375 3425 NoConn ~ 7375 3325 NoConn ~ 7375 3225 @@ -1852,4 +1834,37 @@ Wire Wire Line 4750 3450 4850 3450 Wire Wire Line 8375 2725 8850 2725 +$Comp +L Connector_Generic:Conn_02x07_Odd_Even J4 +U 1 1 5FAC09D3 +P 9675 1225 +F 0 "J4" H 9725 1742 50 0000 C CNN +F 1 "FTSH-107-01-F-DV-K" H 9725 1651 50 0000 C CNN +F 2 "Connector_PinHeader_1.27mm:PinHeader_2x07_P1.27mm_Vertical_SMD" H 9675 1225 50 0001 C CNN +F 3 "~" H 9675 1225 50 0001 C CNN + 1 9675 1225 + 1 0 0 -1 +$EndComp +NoConn ~ 9975 925 +NoConn ~ 9475 925 +Text Label 9100 1525 0 50 ~ 0 +UART_RX +Text Label 10325 1525 2 50 ~ 0 +UART_TX +Wire Wire Line + 9975 1525 10325 1525 +Wire Wire Line + 9300 1225 9375 1225 +Wire Wire Line + 9100 1525 9475 1525 +Text Label 6875 3925 0 50 ~ 0 +UART_RX +Text Label 6875 3825 0 50 ~ 0 +UART_TX +Wire Wire Line + 6875 3825 7375 3825 +Wire Wire Line + 7375 3925 6875 3925 +NoConn ~ 8375 3425 +NoConn ~ 8375 3525 $EndSCHEMATC