mirror of https://github.com/rusefi/wideband.git
Add max31855 driver
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@ -154,6 +154,7 @@ CPPSRC = $(ALLCPPSRC) \
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console/binary/tunerstudio_io_serial.cpp \
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console/binary/tunerstudio_commands.cpp \
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console/binary/FragmentEntry.cpp \
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max31855.cpp \
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main.cpp
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# List ASM source files here.
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@ -10,6 +10,9 @@
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#include "uart.h"
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#include "io_pins.h"
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#include "auxout.h"
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#include "max31855.h"
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#include "wideband_config.h"
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using namespace wbo;
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@ -35,6 +38,10 @@ int main() {
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InitUart();
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#endif
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#if (EGT_CHANNELS > 0)
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EgtThread.Start();
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#endif
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while(true)
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{
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auto fault = GetCurrentFault();
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@ -0,0 +1,135 @@
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#include <math.h>
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#include "hal.h"
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#include "io_pins.h"
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#include "wideband_config.h"
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#include "bit.h"
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#include "max31855.h"
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#ifdef HAL_USE_SPI
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static SPIConfig spi_config[2] =
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{
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{
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.circular = false,
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.end_cb = NULL,
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.ssport = EGT_CS0_PORT,
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.sspad = EGT_CS0_PIN,
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.cr1 =
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/* SPI_CR1_LSBFIRST | */
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((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
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/* SPI_CR1_CPOL | */ // = 0
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SPI_CR1_CPHA | // = 1
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0,
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.cr2 = 0
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},
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{
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.circular = false,
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.end_cb = NULL,
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.ssport = EGT_CS1_PORT,
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.sspad = EGT_CS1_PIN,
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.cr1 =
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/* SPI_CR1_LSBFIRST | */
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((3 << SPI_CR1_BR_Pos) & SPI_CR1_BR) | /* div = 16 */
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/* SPI_CR1_CPOL | */ // = 0
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SPI_CR1_CPHA | // = 1
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0,
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.cr2 = 0
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}
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};
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int Max31855Thread::spi_rx(SPIDriver *spi, int ch, uint32_t *data)
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{
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uint8_t rx[4];
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/* Acquire ownership of the bus. */
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spiAcquireBus(spi);
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/* Setup transfer parameters. */
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spiStart(spi, &spi_config[ch]);
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/* Slave Select assertion. */
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spiSelect(spi);
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//spiExchange(spi, 4, tx, rx);
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spiReceive(spi, 4, rx);
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/* Slave Select de-assertion. */
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spiUnselect(spi);
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/* Ownership release. */
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spiReleaseBus(spi);
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if (data) {
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*data = (rx[0] << 24) |
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(rx[1] << 16) |
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(rx[2] << 8) |
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(rx[3] << 0);
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}
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/* no errors for now */
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return 0;
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}
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int Max31855Thread::Read(int ch)
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{
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int ret;
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uint32_t data;
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ret = spi_rx(&EGT_SPI_PORT, ch, &data);
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if (ret)
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return ret;
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if (data == 0xffffffff) {
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state = MAX31855_NO_REPLY;
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return -1;
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}
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if (data & BIT(16)) {
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if (data & BIT(0))
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state = MAX31855_OPEN_CIRCUIT;
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else if (data & BIT(1))
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state = MAX31855_SHORT_TO_GND;
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else if (data & BIT(2))
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state = MAX31855_SHORT_TO_VCC;
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int_temp[ch] = NAN;
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temp[ch] = NAN;
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return -1;
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}
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state = MAX31855_OK;
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/* D[15:4] */
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int16_t tmp = (data >> 4) & 0xfff;
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/* extend sign */
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tmp = tmp << 4;
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tmp = tmp >> 4; /* shifting right signed is not a good idea */
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int_temp[ch] = (float)tmp * 0.0625;
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/* D[31:18] */
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tmp = (data >> 18) & 0x3fff;
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/* extend sign */
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tmp = tmp << 2;
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tmp = tmp >> 2; /* shifting right signed is not a good idea */
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temp[ch] = (float) tmp * 0.25;
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return 0;
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}
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void Max31855Thread::ThreadTask() {
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state = MAX31855_NO_REPLY;
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while (true) {
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int ch;
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for (ch = 0; ch < EGT_CHANNELS; ch++) {
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int ret = Read(ch);
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if (ret)
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continue;
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}
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chThdSleepMilliseconds(500);
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}
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}
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Max31855Thread EgtThread("egt");
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#endif /* HAL_USE_SPI */
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@ -0,0 +1,33 @@
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#pragma once
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#include "wideband_config.h"
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#include "thread_controller.h"
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#define MAX31855_THREAD_STACK (512)
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#define MAX31855_THREAD_PRIO (NORMALPRIO + 1)
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typedef enum {
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MAX31855_OK = 0,
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MAX31855_OPEN_CIRCUIT = 1,
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MAX31855_SHORT_TO_GND = 2,
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MAX31855_SHORT_TO_VCC = 3,
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MAX31855_NO_REPLY = 4,
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} Max31855State;
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class Max31855Thread : public ThreadController<MAX31855_THREAD_STACK> {
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private:
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int spi_rx(SPIDriver *spi, int ch, uint32_t *data);
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int Read(int ch);
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public:
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Max31855State state;
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float int_temp[EGT_CHANNELS];
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float temp[EGT_CHANNELS];
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Max31855Thread(const char* name)
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: ThreadController(name, MAX31855_THREAD_PRIO)
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{
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}
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void ThreadTask() override;
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};
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extern Max31855Thread EgtThread;
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@ -5,6 +5,7 @@
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#include "lambda_conversion.h"
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#include "sampling.h"
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#include "heater_control.h"
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#include "max31855.h"
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#include "fault.h"
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#include "uart.h"
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@ -47,7 +48,12 @@ static void UartThread(void*)
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describeHeaterState(GetHeaterState()), duty,
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describeFault(GetCurrentFault()));
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chnWrite(&SD1, (const uint8_t *)printBuffer, writeCount);
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chThdSleepMilliseconds(50);
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writeCount = chsnprintf(printBuffer, 200,
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"EGT: %d C (int %d C)\r\n",
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(int)EgtThread.temp[0], (int)EgtThread.int_temp[0]);
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chnWrite(&SD1, (const uint8_t *)printBuffer, writeCount);
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chThdSleepMilliseconds(50);
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}
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}
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@ -10,6 +10,10 @@
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#define AFR_CHANNELS 1
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#endif
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#ifndef EGT_CHANNELS
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#define EGT_CHANNELS 0
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#endif
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// *******************************
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// Nernst voltage & ESR sense
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// *******************************
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