From cdf632652b85ddacd47e5a0ad64636e5bf381578 Mon Sep 17 00:00:00 2001 From: Andrey G Date: Thu, 22 Dec 2022 19:08:03 +0300 Subject: [PATCH] f1_X: adjust CAN timings for 64MHz CPU clock (cAN clock is 32MHz) (#177) --- firmware/boards/f1_dual/port_shared.cpp | 4 ++-- firmware/boards/f1_rev2/port_shared.cpp | 4 ++-- firmware/boards/f1_rev3/port_shared.cpp | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/firmware/boards/f1_dual/port_shared.cpp b/firmware/boards/f1_dual/port_shared.cpp index ad7927d..3e2cbff 100644 --- a/firmware/boards/f1_dual/port_shared.cpp +++ b/firmware/boards/f1_dual/port_shared.cpp @@ -6,7 +6,7 @@ const CANConfig canConfig500 = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, /* - For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values + For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values */ - CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1), + CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1), }; diff --git a/firmware/boards/f1_rev2/port_shared.cpp b/firmware/boards/f1_rev2/port_shared.cpp index ad7927d..3e2cbff 100644 --- a/firmware/boards/f1_rev2/port_shared.cpp +++ b/firmware/boards/f1_rev2/port_shared.cpp @@ -6,7 +6,7 @@ const CANConfig canConfig500 = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, /* - For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values + For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values */ - CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1), + CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1), }; diff --git a/firmware/boards/f1_rev3/port_shared.cpp b/firmware/boards/f1_rev3/port_shared.cpp index ad7927d..3e2cbff 100644 --- a/firmware/boards/f1_rev3/port_shared.cpp +++ b/firmware/boards/f1_rev3/port_shared.cpp @@ -6,7 +6,7 @@ const CANConfig canConfig500 = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, /* - For 24MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=3, Seq 1=13 and Seq 2=2. Subtract '1' for register values + For 32MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=4, Seq 1=13 and Seq 2=2. Subtract '1' for register values */ - CAN_BTR_SJW(0) | CAN_BTR_BRP(2) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1), + CAN_BTR_SJW(0) | CAN_BTR_BRP(4 - 1) | CAN_BTR_TS1(13 - 1) | CAN_BTR_TS2(2 - 1), };