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CAN options (#42) 

Co-authored-by: rusefillc <sdfsdfqsf2334234234>
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rusefillc 2022-01-13 13:55:03 -05:00 committed by GitHub
parent 660dad473c
commit d9b83379f3
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3 changed files with 9 additions and 1 deletions
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3
firmware/boards/f0_module/port_shared.cpp
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@ -5,5 +5,8 @@
const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
/*
For 48MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=6, Seq 1=13 and Seq 2=2. Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1),
};

2
firmware/boards/f1_dave/mcuconf.h
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@ -35,6 +35,8 @@
/*
* HAL driver system settings.
* TL,DR: we run at 48MHz.
* It's not possible to run at 72 on HSI because of the PLL's limited configuration options, so 48MHz right now.
*/
#define STM32_NO_INIT FALSE
#define STM32_HSI_ENABLED TRUE

5
firmware/boards/f1_dave/port_shared.cpp
View File

@ -5,5 +5,8 @@
const CANConfig canConfig500 =
{
CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP,
0 // TODO: set bit timing! correctly!
/*
For 48MHz http://www.bittiming.can-wiki.info/ gives us Pre-scaler=6, Seq 1=13 and Seq 2=2. Subtract '1' for register values
*/
CAN_BTR_SJW(0) | CAN_BTR_BRP(5) | CAN_BTR_TS1(12) | CAN_BTR_TS2(1),
};