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<H1>[ZcF-general] Status update - Update of the Equihash Algorithm (#38)</H1>
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<B>Dag Arne Osvik</B>
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<A HREF="mailto:general%40lists.zfnd.org?Subject=Re%3A%20%5BZcF-general%5D%20Status%20update%20-%20Update%20of%20the%20Equihash%20Algorithm%20%28%2338%29&In-Reply-To=%3Ce7f4f164-7ba5-9ae2-6651-062b3b6ef8d4%40uni.lu%3E"
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TITLE="[ZcF-general] Status update - Update of the Equihash Algorithm (#38)">dagarne.osvik at uni.lu
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<I>Tue May 21 18:48:13 EDT 2019</I>
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<PRE>Dear all,
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Here is the current status for project #38:
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- My focus so far is to make a really good GPU implementation of
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Equihash 144,5.
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- Right now the speed of hashing and writing to main memory corresponds
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to 118 sol/s for Equihash 144,5 on a 1080 Ti. This is the only
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processing-intensive part of the solver, leaving most of the bandwidth
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for the matching stages. The resulting data structure passes
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verification performed on the CPU side.
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- The hashing code is in inline PTX (assembler portable between GPU
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generations), and further speedup is possible by going down to SASS
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(generation-specific assembler), but this is already fast enough that it
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makes more sense to complete the solution finding first.
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- I have been refining the algorithm for the matching stages over and
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over innumerable times to find an approach that matches the rather
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complex (and under-documented) high-latency memory hierarchy of GPUs.
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The result is an algorithm that parallelises almost all reading and
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writing for all memories. There is very little computation, so hopefully
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there will not be much slowdown due to contention between hashing and
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matching.
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- Expected main memory bandwidth requirement is below 5 GiB per 2 solutions.
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- I suspect the overall structure of a future FPGA implementation will
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be similar to my current design for GPU.
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- I have now started implementing a simplified version of the matching
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algorithm, aiming to have it working as soon as possible so I can move
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on to the final stage of rebuilding solutions.
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Best regards,
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Dag Arne
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</PRE>
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