43 lines
2.9 KiB
Tcl
43 lines
2.9 KiB
Tcl
# Find all the cdc_fifos and correctly set constraints for the rd and wr pointers that cross clock domains.
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#
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# Copyright (C) 2019 Benjamin Devlin and Zcash Foundation
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#
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# This program is free software: you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation, either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program. If not, see <https://www.gnu.org/licenses/>.
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set cdc_fifo_instance [get_cells -hierarchical -filter { ORIG_REF_NAME =~ "cdc_fifo" || REF_NAME =~ "cdc_fifo" } ]
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foreach child $cdc_fifo_instance {
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set name [get_property NAME $child]
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set wr_ptr_cells [get_cells -hierarchical -filter "NAME =~ $name/synchronizer_wr_ptr/* "]
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set clock [get_clocks -of_objects [get_pins -filter { NAME =~ "*dat_reg[1]*C" } -of_objects $wr_ptr_cells]]
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set clock_period [get_property PERIOD $clock]
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set_bus_skew -from [get_pins -filter { NAME =~ "*dat_reg[0]*C" } -of_objects $wr_ptr_cells] -to [get_pins -filter { NAME =~ "*dat_reg[1]*D" } -of_objects $wr_ptr_cells] [expr $clock_period/2]
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set_max_delay -from [get_pins -filter { NAME =~ "*dat_reg[0]*C" } -of_objects $wr_ptr_cells] -to [get_pins -filter { NAME =~ "*dat_reg[1]*D" } -of_objects $wr_ptr_cells] -datapath_only [expr $clock_period/2]
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set rd_ptr_cells [get_cells -hierarchical -filter "NAME =~ $name/synchronizer_rd_ptr/* "]
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set clock [get_clocks -of_objects [get_pins -filter { NAME =~ "*dat_reg[1]*C" } -of_objects $rd_ptr_cells]]
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set clock_period [get_property PERIOD $clock]
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set_bus_skew -from [get_pins -filter { NAME =~ "*dat_reg[0]*C" } -of_objects $rd_ptr_cells] -to [get_pins -filter { NAME =~ "*dat_reg[1]*D" } -of_objects $rd_ptr_cells] [expr $clock_period/2]
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set_max_delay -from [get_pins -filter { NAME =~ "*dat_reg[0]*C" } -of_objects $rd_ptr_cells] -to [get_pins -filter { NAME =~ "*dat_reg[1]*D" } -of_objects $rd_ptr_cells] -datapath_only [expr $clock_period/2]
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# This is only needed if the cell is using registers (not BRAM)
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set all_cells [get_cells -hierarchical -filter "NAME =~ $name/* "]
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catch {set_bus_skew -from [get_pins -filter { NAME =~ "*ram*C" } -of_objects $all_cells] -to [get_pins -filter { NAME =~ "*o_dat_b*D" } -of_objects $all_cells] [expr $clock_period/2]}
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catch {set_max_delay -from [get_pins -filter { NAME =~ "*ram*C" } -of_objects $all_cells] -to [get_pins -filter { NAME =~ "*o_dat_b*D" } -of_objects $all_cells] -datapath_only [expr $clock_period/2]}
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} |