PentHertz
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srsLTE
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5,447 Commits 3 Branches 23 Tags 67 MiB
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359 Commits

Author SHA1 Message Date
Xavier Arteaga 6d355ab61e SRSUE: Fix HO initial CFO 2020-04-02 13:52:23 +02:00
Xavier Arteaga cca3cccfbe Improved fading model generation 2020-03-26 08:23:07 +01:00
Xavier Arteaga a44a61d781 Fix HST channel emulator for keeping coherent phase between frames 2020-03-26 08:18:24 +01:00
Xavier Arteaga cd2f86687f Correction in AWGN generator 2020-03-24 12:16:28 +01:00
Xavier Arteaga 8e891b7038 Added AWGN channel to SRSUE and SRSENB 2020-03-24 12:16:28 +01:00
Xavier Arteaga c107b04f5a Implemented high performance AWGN generator 2020-03-24 12:16:28 +01:00
Xavier Arteaga b5be0b94b8 Added SIMD i32 add and and functions 2020-03-24 12:16:28 +01:00
Xavier Arteaga 8bf7acdeaf Added vector malloc for i32 and u32 2020-03-24 12:16:28 +01:00
Xavier Arteaga 2c93f6d20a Fix PUCCH DMRS correlation 2020-03-22 08:49:12 +01:00
Xavier Arteaga f3f03ad12d SRSUE PHY: Add extra debugging information to errors 2020-03-18 16:12:51 +01:00
Xavier Arteaga ada8772f57 Initial srenb TA compensation 2020-03-17 17:21:43 +01:00
Xavier Arteaga 0408d357a7 Minor fixes 2020-03-16 15:07:12 +01:00
Ismael Gomez 73447972d8
Fix issue with simultaneous CQI and ACK/NACK transmission in CA (#1067) 
* Fix memory corruption when phy calling mac scheduler and not yet initiated

* Do not drop CQI if collision with ACK/NACK and PUSCH

* Allocate CQI resources for SCell properly

* Use UE_PCELL_CC_IDX macro

* Protect ul_sched from being called if not yet started
 2020-03-16 13:10:21 +01:00
Xavier Arteaga e832769ae6 Updated copyright 2020-03-16 11:26:06 +01:00
yagoda 943d90bc48 consolidating different ringbuffer functionalities into one, adding unit tests for ringbuffer 2020-03-16 07:48:10 +01:00
Xavier Arteaga 5af89513eb use double precission for frequency in srsue and srsenb 2020-03-13 14:01:58 +01:00
Xavier Arteaga 834a081c09 Add EPRE measurement to PUSCH decoder 2020-03-13 14:01:58 +01:00
Xavier Arteaga 76408b195e Rename TX_DELAY and FDD_HARQ_DELAY_MS 2020-03-11 21:16:36 +01:00
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 2020-03-10 22:06:07 +00:00
Francisco Paisana 639f473042 fixed unsigned signed comparison 2020-03-10 14:17:49 +01:00
Francisco Paisana 1e63fa41cf made ue_cc_idx int to set to -1 for rar and bc allocs 2020-03-10 14:17:49 +01:00
Francisco Paisana f3c3c52fcd added ue_cc_idx to dci allocation 2020-03-10 14:17:49 +01:00
Xavier Arteaga 002a68e183 SRSENB: hard-coded parametrized PUCCH DMRS correlation threshold 2020-03-10 09:19:54 +01:00
Xavier Arteaga 64caa4321b Fix UL control decoding. Some minor aesthetic changes. 2020-03-10 09:19:54 +01:00
Xavier Arteaga 44a5ce172e Added vector srslte_vec_avg_power_sf 2020-03-10 09:19:54 +01:00
Ismael Gomez 4e12405fff
Remove radio_multi class and organize channels, ports and carrier buffers (#1019) 2020-03-06 15:26:48 +01:00
Xavier Arteaga a968fb02d3 Increase PUCCH correlatiion threasholds 2020-03-06 13:58:49 +01:00
Xavier Arteaga da701cd82b SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup. 2020-03-06 13:58:49 +01:00
Xavier Arteaga 47cbbcbd57 Improve PUSCH UCI decoder 2020-03-06 13:58:49 +01:00
Francisco Paisana a6320f93b8 remove remaining const_casts 2020-03-05 20:23:07 +00:00
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 2020-03-05 20:23:07 +00:00
Andre Puschmann e4b5fa122f add set_cell() call to PSCCH and allocate for max PRB in pscch_init() 2020-03-03 16:22:51 +01:00
Andre Puschmann 151ce10a96 remove SL specific CFO correction method 2020-03-03 16:22:51 +01:00
Andre Puschmann 09f7355870 use srslte_cell_sl_t in PSCCH 2020-03-03 16:22:51 +01:00
Andre Puschmann 14000f7ae7 adding phy_common_sl.{c,h} 2020-03-03 16:22:51 +01:00
Andre Puschmann 8b70ff7654 simplify SL chest and add RSRP and sync error measurements 2020-03-03 16:22:51 +01:00
Tiago Alves cabd9ae742 baseline implementation of pscch 2020-03-03 16:22:51 +01:00
Xavier Arteaga 125747ae4a Added external C to phy_common header and ACK/NACK feedack mode parser 2020-03-02 12:19:09 +01:00
Xavier Arteaga a4135e41a5 Added PUCCH collision checker 2020-03-02 12:19:09 +01:00
Xavier Arteaga 2fc0832f05 Addition of DL HARQ-ACK generation procedure for eNb DL and minor aesthetic changes 2020-03-02 12:19:09 +01:00
Xavier Arteaga e621853566 Minor aesthetics changes 2020-02-28 12:10:32 +01:00
Xavier Arteaga f261365c91 Initial EVM calculation commit and other easthetic changes 2020-02-28 12:10:32 +01:00
Pedro Alvarez aecfb151ce Apply clang-format to the lib in preperation for PR. 2020-02-20 20:53:27 +01:00
Ismael Gomez d8d10daebe
Fix bug in SRS using the previous grant to compute collision with PUSCH (#958) 2020-02-16 21:30:04 +01:00
Andre Puschmann 327aa97cfd add macro for invalid RNTI 0x0 2020-02-15 19:33:25 +01:00
Xavier Arteaga 67c07dfb56 Moved UL/DL PUCCH procedures into pucch_proc 2020-02-13 10:29:00 +01:00
Xavier Arteaga 7a20e3a51e Added boolean random generator 2020-02-13 10:29:00 +01:00
Xavier Arteaga 5dbc96458a Sets PUCCH decode threshold as macro 2020-02-13 10:29:00 +01:00
Xavier Arteaga bc10943a2b Added get max TB from DCI format 2020-02-13 10:29:00 +01:00
Xavier Arteaga 231431f569 SRSENB: enabled CA PUCCH decode in eNb 2020-02-13 10:29:00 +01:00