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srsLTE
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5003 Commits

Author SHA1 Message Date
Xavier Arteaga f75d0e5b26 Change M_SQRT2 and M_SQRT1_2 instead of sqrt(2) and 1/sqrt(2) 2019-12-02 09:47:22 +01:00
Andre Puschmann 0e89fa9f0d fixing two more issues reported by lgtm in asn1 libs 2019-11-29 16:42:22 +01:00
Vasil Velichkov 5f17575575 Check the format of modified lines only 
Use the -U0 option to generate a patch that contains only the modified
lines without any context
 2019-11-29 09:50:34 +01:00
Francisco Paisana dc4976f7f6 fixed header guard of threads file 2019-11-29 09:50:34 +01:00
Andre Puschmann 365cb2dfe2 assign msg-type to temp variable before logging ASN1 message in RRC 2019-11-29 09:50:34 +01:00
Andre Puschmann 5d63b493b6 fix printf parameter in asn1_utils 2019-11-29 09:50:34 +01:00
Francisco Paisana 6d4f746a61 moved tti_sched_result out of carrier_sched. Removed interdependencies between the two classes. Simplified ra_sched and bc_sched initialization 2019-11-28 20:22:40 +00:00
Francisco Paisana 7990e2f563 use of a common tti_params struct to store all values derived from tti_rx 2019-11-28 20:22:40 +00:00
Andre Puschmann 28b36c28ef add basic lgtm config 2019-11-28 17:35:09 +01:00
Andre Puschmann 16517397f5 add CMake option to force usage of MKL while default is fftw 2019-11-28 17:35:09 +01:00
Xavier Arteaga b4b1ab94af SRSUE RRC: new PHY unknown sync state, cell select waits for PHY in-sync 2019-11-28 16:33:35 +01:00
Xavier Arteaga 67935d2b99 SRSUE: RRC blocks MAC RA procedure during reestablishment 2019-11-28 16:33:35 +01:00
Xavier Arteaga ff2c0cd115 ZMQ: return error if no arguments provided 2019-11-28 16:33:35 +01:00
Xavier Arteaga ff77bcb782 ZMQ: Fix empty arguments SEGFAULT 2019-11-28 16:33:35 +01:00
Andre Puschmann 71c83bd0e0 fixing typo in RRC proc 2019-11-28 16:33:35 +01:00
Andre Puschmann 8ef0d6c6ca do not automatically consider cells for which a measurment has been received as "in sync" 
the in_sync flag has been misused in some parts of the code
receiving a PHY measurement for a cell does not automatically
mean that we are "in sync", as it is used in RRC as a condition
to indicate if we are camping on cell

the in_sync/out_of_sync condition should only be altered by the
corresponding functions sent from the PHY for the currently selected
cell (and not automatically for all cells)

the commit also removes the deletion of cells which are not "in sync"
from the list of neighbor cells. Instead, RRC calls a clean-up function
peridically that deletes old cells eventually.
 2019-11-28 16:33:35 +01:00
Xavier Arteaga f5e4ff9f4d SRSUE: RRC Reest Procedure Refactor 2019-11-28 16:33:35 +01:00
Xavier Arteaga dbdb699a78 SRSUE: minor RRC/PHY fixes 2019-11-28 16:33:35 +01:00
Xavier Arteaga f37a096f10 SRSUE: Refactored/Fixed RRC connection Re-establishment and minor CLang Format/Tidy fixes 2019-11-28 16:33:35 +01:00
Francisco Paisana 36c45c7d64 added the changes in the enb stack from next 2019-11-28 11:57:41 +00:00
Francisco Paisana 54992e72f1 fixed and simplified multiqueue task api to avoid dangling pointers. 2019-11-28 11:57:41 +00:00
Francisco Paisana 6746c5dfa5 pass task functor by copy to avoid dangling pointers 2019-11-28 11:57:41 +00:00
Francisco Paisana b2d3c2a150 fix compilation issue 2019-11-28 11:57:41 +00:00
Francisco Paisana ac4d3b9624 std::functions do not accept move-only captures. So I had to create a wrapper earlier. In this PR, I cleaned a bit the previous API for the code to be a bit more readable 2019-11-28 11:57:41 +00:00
Francisco Paisana c9f092e8e9 created a nullsink and a TESTASSERT for C 2019-11-28 11:44:54 +00:00
Francisco Paisana 0b962f19f4 fix compilation issue 2019-11-28 11:44:54 +00:00
Francisco Paisana 67ccaf1029 created a file with common test utils, including assertions, a logger specialized for tests that counts the number of errors and warnings during the test run and can print diagnostics on exit 2019-11-28 11:44:54 +00:00
Francisco Paisana 514b9045ca added begin/end methods to asn1 arrays and fixed v2x bug 2019-11-27 20:44:24 +01:00
Pedro Alvarez 26984c39b8 Add options to srslte_install_configs.sh to install clean configs. 2019-11-27 20:42:55 +01:00
Andre Puschmann 6e85b26367 enable ccache if found on system 2019-11-27 20:41:52 +01:00
Francisco Paisana 011b2168a6 grouped different sched params/args/derived params into a single struct to simplify the ctor api of different sched sub components 2019-11-27 15:20:55 +00:00
Andre Puschmann 9493e7492c add initial RLC AM NR status PDU packing code including tests 2019-11-26 16:52:14 +01:00
Andre Puschmann db2c43553e add basic rlc_am_base class containing data/control PDU check 2019-11-26 16:52:14 +01:00
Andre Puschmann cea212b9f9 add RLC AM NR PDU packing/unpacking test 2019-11-26 16:52:14 +01:00
Andre Puschmann b32a4cf294 add RLC AM NR PDU packing and unpacking 2019-11-26 16:52:14 +01:00
Xavier Arteaga 14b673a6ba
Update dft_fftw.c 2019-11-26 16:06:00 +01:00
Xavier Arteaga 865f6bd6d4 FFTW: fix FFTW wisdom file path under user's home folder 2019-11-26 16:01:43 +01:00
Xavier Arteaga f057e9ae67 BladeRF & ZMQ: more fixes 2019-11-26 13:00:40 +01:00
Andre Puschmann 4f83c27e93 fix some compilation warning in RF lib 2019-11-24 14:59:54 +01:00
Andre Puschmann 47019e26f6 fix signed/unsigned comparison warning 2019-11-24 14:59:54 +01:00
Andre Puschmann 4e2d9c6b60 specify MAC source files in UE 2019-11-24 14:59:54 +01:00
Andre Puschmann 2195012dc1 fix uninit var in cfg parser 2019-11-24 14:59:54 +01:00
Andre Puschmann 6a9c4d94b0 fix printf in scheduler test 2019-11-24 14:59:54 +01:00
Andre Puschmann b8dbffe0b5 rewrite RLC AM debug code 2019-11-24 14:59:54 +01:00
Andre Puschmann dc841ab029 printf in rlc_am 2019-11-24 14:59:54 +01:00
Andre Puschmann 6f72cbffab fix snprintf of uint64 for ARM 2019-11-24 14:59:54 +01:00
Xavier Arteaga 75c00ba1b0
Change .fftw_wisdom default path 2019-11-22 11:09:33 +01:00
Pedro Alvarez c6ddada488 Fix compilation issue when enabling TTCN3 2019-11-21 13:18:30 +01:00
Pedro Alvarez d4fb4d8c86 Fixup clang-format in pdcp before PR. 2019-11-21 13:18:30 +01:00
Pedro Alvarez 15613465cf Moving some initialization from init function to constructor in the PDCP entities. 2019-11-21 13:18:30 +01:00