Commit Graph

5243 Commits

Author SHA1 Message Date
Xavier Arteaga 96ffe1c3ad Commented class tti_semaphore 2020-03-06 12:24:28 +01:00
Andre Puschmann 4553ce7ff1 temporarily disable SCI checks for PSCCH file tests 2020-03-06 11:20:11 +01:00
Andre Puschmann e2892047e9 refactor UE shutdown
use alarm to give UE time to gracefully terminate
if the UE can't terminate and the alarm goes off, flush the logs
and exit
2020-03-05 21:33:17 +01:00
Francisco Paisana a6320f93b8 remove remaining const_casts 2020-03-05 20:23:07 +00:00
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 2020-03-05 20:23:07 +00:00
Francisco Paisana e9a599857a created a header for all common structs and helper functions 2020-03-05 20:23:07 +00:00
Francisco Paisana 02ccb8b32b fix wrong calculation of sched tx and rx delays 2020-03-05 20:23:07 +00:00
Andre Puschmann 73c8b02820 enb: loop over CC in MAC 2020-03-05 20:46:14 +01:00
Andre Puschmann 664170fec6 pcap: add CC index when writing PCAP 2020-03-05 20:46:14 +01:00
Andre Puschmann df31a5c4cc store CC idx in DL/UL HARQ entity 2020-03-05 20:46:14 +01:00
Andre Puschmann 33a410bda4 fix parsing of DL/UL earfcn in cell config
using a single earfcn or dl_freq value that gets set by default
in the [rf] section doesn't make sense in a enb config with more
than 1 cell, so we should actually remove the earfcn/freq setting in [rf]
and only configure the radio through the values in the cell list in rr.cfg
2020-03-05 20:46:14 +01:00
Andre Puschmann 87f1b2a939 catch exceptions from eNB config parser
since the eNB config gets more complex, especially with CA,
we need to catch potential parsing errors from libconfig,
print an error with the position of the error and gracefully
stop the enb
2020-03-05 20:46:14 +01:00
Francisco Paisana 43e67b8536 created a harq entity that handles all harq procs. This entity accepts as arg the number of harq procs. 2020-03-05 17:51:33 +00:00
Francisco Paisana 1c041b2c1d created harq entity class 2020-03-05 17:51:33 +00:00
Andre Puschmann dfb1cd1361 temporarily disabling enb_phy_test_1cell until it is fixed 2020-03-05 14:47:07 +01:00
Francisco Paisana 9f266161cf increase tbs until allocation is big enough to fit MAC subheader and RLC header 2020-03-05 12:47:43 +00:00
Ismael Gomez 1f3aee2fc0 Fix incorrect parameters 2020-03-05 13:26:16 +01:00
Francisco Paisana 7e840bde86 fix tb idx assignment in scheduler mac sdu alloc 2020-03-05 12:18:05 +00:00
Andre Puschmann 2e455908e8 fix issue compiling pssch_ue when RF driver wasn't found 2020-03-05 11:37:24 +01:00
Francisco Paisana d1356568e0 separated sf sched result from sf_sched class. The interface became way simpler. No need for finish_tti() method, sf_sched::new_tti() is called automatically when we access the sf_sched. 2020-03-05 00:04:21 +00:00
Francisco Paisana bb38fa7119 fixed tti resetting after tti end 2020-03-05 00:04:21 +00:00
Francisco Paisana 47b05118ad simplified msg3 allocation. Now we can allocate resources ahead of time (e.g. msg3 is 2 ttis ahead) using the sf_sched interface. It's guaranteed that the given allocations wont be erased when the respective tti starts 2020-03-05 00:04:21 +00:00
Francisco Paisana 8f7890c60a store mask results in separate variables for testing, and reset sf_sched state at the end of the tti 2020-03-05 00:04:21 +00:00
Pedro Alvarez afc209711c Fix jump depending on uninitialized variable in srsenb::sched_ue::set_bearer_cfg_unlocked 2020-03-04 22:03:17 +01:00
Francisco Paisana d848524d8b fix link error 2020-03-03 21:26:50 +00:00
Francisco Paisana aaa333c1ff removed some clang warnings 2020-03-03 21:26:50 +00:00
Francisco Paisana 62609fdc11 fixed some logs. Also now use one single log obj for all the asn1 2020-03-03 21:26:50 +00:00
Francisco Paisana 5bdc603113 added error macros 2020-03-03 21:26:17 +00:00
Francisco Paisana b37d9b9930 fixed msg4 setting in sched tester 2020-03-03 21:26:17 +00:00
Francisco Paisana 3cc94c3694 simplified mutexing of the scheduler. One single mutex for everything, and removed rwlock 2020-03-03 21:26:17 +00:00
Francisco Paisana 7210c35c6c checked all methods of srsenb::pdcp to see if they are called by different threads. Since it is all single-threaded, I removed the locks 2020-03-03 21:03:37 +00:00
Francisco Paisana fed06138b9 moved rach_detected to stack thread. Created a more friendly interface to enqueue tasks in stack 2020-03-03 21:03:21 +00:00
Francisco Paisana d10e950650 fix ue streamid assignment in s1ap 2020-03-03 21:19:09 +01:00
Andre Puschmann c79e202fd9 fix typo 2020-03-03 17:20:44 +01:00
Andre Puschmann 37c342af39 give enb_phy_tests individual names 2020-03-03 17:20:17 +01:00
Andre Puschmann 3adfbcadbc disbable three Sidelink tests that are currently failing on AVX2 2020-03-03 16:22:51 +01:00
Andre Puschmann c471f6c900 chest_sl: tiny refactor and comments 2020-03-03 16:22:51 +01:00
Andre Puschmann 3e51734a39 adopt sample path for sync_sl_test 2020-03-03 16:22:51 +01:00
Andre Puschmann e9e57153dc adding basic pssch_ue example 2020-03-03 16:22:51 +01:00
Andre Puschmann e4b5fa122f add set_cell() call to PSCCH and allocate for max PRB in pscch_init() 2020-03-03 16:22:51 +01:00
Andre Puschmann 151ce10a96 remove SL specific CFO correction method 2020-03-03 16:22:51 +01:00
Andre Puschmann 09f7355870 use srslte_cell_sl_t in PSCCH 2020-03-03 16:22:51 +01:00
Andre Puschmann 14000f7ae7 adding phy_common_sl.{c,h} 2020-03-03 16:22:51 +01:00
Andre Puschmann 8b70ff7654 simplify SL chest and add RSRP and sync error measurements 2020-03-03 16:22:51 +01:00
Andre Puschmann d85339187a pass offset parameter to CMW capture to compensate SFO 2020-03-03 16:22:51 +01:00
Tiago Alves cabd9ae742 baseline implementation of pscch 2020-03-03 16:22:51 +01:00
Andre Puschmann 8e4f2a4d59 add UE parameter to enable TTI stats calculations 2020-03-03 16:22:04 +01:00
Andre Puschmann a8bbe551ac move thread class into srslte namespace to avoid ambiguity between std::thread 2020-03-03 16:22:04 +01:00
Andre Puschmann 8b46f631c1 add basic TTI stats in stack 2020-03-03 16:22:04 +01:00
Andre Puschmann ae4cfb50f2 print warning to console if TUN interface couldn't be setup 2020-03-03 15:25:53 +01:00