mirror of https://github.com/rusefi/rusefi.git
736 lines
25 KiB
XML
736 lines
25 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<Root xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="SCHVerif.xsd">
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<Device>
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<DeviceID>0x451</DeviceID>
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<Vendor>STMicroelectronics</Vendor>
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<Type>MCU</Type>
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<CPU>Cortex-M7</CPU>
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<Name>STM32F76x/STM32F77x</Name>
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<Series>STM32F7</Series>
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<Description>ARM 32-bit Cortex-M7 based device</Description>
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<Configurations>
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<!-- JTAG_SWD Interface -->
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<Interface name="JTAG_SWD">
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<!-- 1MB Single Bank-->
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<Configuration number="0x0">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
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</DualBank>
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<FlashSize>
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<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0400"/>
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</FlashSize>
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</Configuration>
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<!-- 1MB Dual Bank-->
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<Configuration number="0x1">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x20000000" value="0x0"/>
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</DualBank>
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<FlashSize>
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<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0400"/>
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</FlashSize>
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</Configuration>
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<!-- 2MB Single Bank-->
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<Configuration number="0x2">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x20000000" value="0x20000000"/>
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</DualBank>
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<FlashSize>
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<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0800"/>
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</FlashSize>
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</Configuration>
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<!-- 2MB Dual Bank-->
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<Configuration number="0x3">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x20000000" value="0x0"/>
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</DualBank>
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<FlashSize>
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<ReadRegister address="0x1FF0F442" mask="0x0000FFFF" value="0x0800"/>
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</FlashSize>
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</Configuration>
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<!-- Dummy Config Dual bank-->
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<Configuration number="0x4">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x20000000" value="0x00000000"/>
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</DualBank>
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</Configuration>
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<!-- Dummy Config-->
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<Configuration number="0x5">
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<DualBank>
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<ReadRegister address="0x40023C14" mask="0x00000000" value="0x00000000"/>
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</DualBank>
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</Configuration>
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</Interface>
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<!-- Bootloader Interface -->
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<Interface name="Bootloader">
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<Configuration number="0x0"> <!-- 1MB Single Bank-->
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<DualBank reference="0x1">
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<ReadRegister address="0x1FFF0008" mask="1000EFFF" value="1000EFFF"/>
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</DualBank>
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</Configuration>
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<Configuration number="0x1"> <!-- 1MB Dual Bank-->
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<DualBank reference="0x0">
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<ReadRegister address="0x1FFF0008" mask="3000CFFF" value="3000CFFF"/>
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</DualBank>
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</Configuration>
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<Configuration number="0x2"> <!-- 2MB Single Bank-->
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<DualBank reference="0x1">
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<ReadRegister address="0x1FFF0008" mask="0x2000" value="0x2000"/>
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</DualBank>
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</Configuration>
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<Configuration number="0x3"> <!-- 2MB Single Bank-->
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<DualBank reference="0x1">
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<ReadRegister address="0x1FFF0008" mask="0x2000" value="0x0"/>
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</DualBank>
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</Configuration>
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</Interface>
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</Configurations>
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<!-- Peripherals -->
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<Peripherals>
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<!-- Embedded SRAM -->
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<Peripheral>
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<Name>Embedded SRAM</Name>
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<Type>Storage</Type>
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<Description/>
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<ErasedValue>0x00</ErasedValue>
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<Access>RWE</Access>
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<!-- 512 KB -->
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<Configuration>
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<Parameters address="0x20000000" name="SRAM" size="0x80000"/>
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<Description/>
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<Organization>Single</Organization>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x20000000" name="SRAM1" occurrence="0x1" size="0x80000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Embedded Flash -->
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<Peripheral>
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<Name>Embedded Flash</Name>
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<Type>Storage</Type>
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<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<FlashSize address="0x1FF0F442" default="0x200000"/>
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<BootloaderVersion address="0x1FF0EDBE"/>
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<!-- 2MB Single Bank -->
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<Configuration config="2,5">
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<Parameters address="0x08000000" name=" 2 Mbytes single bank Embedded Flash" size="0x200000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x20</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x8000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector4" occurrence="0x1" size="0x20000"/>
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</Field>
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<Field>
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<Parameters address="0x08040000" name="sector5" occurrence="0x7" size="0x40000"/>
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</Field>
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</Bank>
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</Configuration>
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<!-- 2MB Dual Bank -->
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<Configuration config="3,4">
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<Parameters address="0x08000000" name=" 2 Mbytes dual bank Embedded Flash" size="0x200000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector5" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08100000" name="sector12" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08110000" name="sector16" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08120000" name="sector17" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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<!-- 1MB Single Bank -->
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<Configuration config="0">
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<Parameters address="0x08000000" name=" 1 Mbyte single bank Embedded Flash" size="0x100000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x20</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x8000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector4" occurrence="0x1" size="0x20000"/>
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</Field>
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<Field>
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<Parameters address="0x08040000" name="sector5" occurrence="0x3" size="0x40000"/>
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</Field>
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</Bank>
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</Configuration>
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<!-- 1MB Dual Bank -->
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<Configuration config="1">
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<Parameters address="0x08000000" name=" 1 Mbyte dual bank Embedded Flash" size="0x100000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x08000000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08010000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x08020000" name="sector5" occurrence="0x3" size="0x20000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x08080000 " name="sector12" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x08090000" name="sector16" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x080A0000" name="sector17" occurrence="0x3" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- ITCM FLASH -->
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<Peripheral>
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<Name>ITCM Flash</Name>
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<Type>Storage</Type>
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<Description>The Flash memory interface manages CPU AHB I-Code and D-Code accesses to the Flash memory. It implements the erase and program Flash memory operations and the read and write protection mechanisms</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RWE</Access>
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<!-- 2MB Single Bank -->
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<Configuration config="0,2,5">
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<Parameters address="0x00200000" name=" 2 Mbytes single bank Embedded Flash" size="0x200000"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x20</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x00200000" name="sector0" occurrence="0x4" size="0x8000"/>
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</Field>
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<Field>
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<Parameters address="0x00220000" name="sector4" occurrence="0x1" size="0x20000"/>
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</Field>
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<Field>
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<Parameters address="0x00240000" name="sector5" occurrence="0x7" size="0x40000"/>
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</Field>
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</Bank>
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</Configuration>
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<!-- 2MB Dual Bank -->
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<Configuration config="1,3,4">
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<Parameters address="0x00200000" name=" 2 Mbytes dual bank Embedded Flash" size="0x200000"/>
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<Description/>
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<Organization>Dual</Organization>
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<Alignment>0x10</Alignment>
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<Bank name="Bank 1">
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<Field>
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<Parameters address="0x00200000" name="sector0" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x00210000" name="sector4" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x00220000" name="sector5" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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<Bank name="Bank 2">
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<Field>
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<Parameters address="0x00300000" name="sector12" occurrence="0x4" size="0x4000"/>
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</Field>
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<Field>
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<Parameters address="0x00310000" name="sector16" occurrence="0x1" size="0x10000"/>
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</Field>
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<Field>
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<Parameters address="0x00320000" name="sector17" occurrence="0x7" size="0x20000"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- OTP -->
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<Peripheral>
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<Name>OTP</Name>
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<Type>Storage</Type>
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<Description>The Data OTP memory block. It contains the one time programmable bits.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RW</Access>
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<!-- 1 KBytes single bank -->
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<Configuration>
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<Parameters address="0x1FF0F000" name=" 1 KBytes Data OTP" size="0x480"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="OTP">
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<Field>
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<Parameters address="0x1FF0F000" name="OTP" occurrence="0x1" size="0x480"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Mirror Option Bytes -->
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<Peripheral>
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<Name>MirrorOptionBytes</Name>
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<Type>Storage</Type>
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<Description>Mirror Option Bytes contains the extra area.</Description>
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<ErasedValue>0xFF</ErasedValue>
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<Access>RW</Access>
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<!-- 44 Bytes single bank -->
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<Configuration>
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<Parameters address="0x1FFF0000" name=" 44 Bytes Data MirrorOptionBytes" size="0x2C"/>
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<Description/>
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<Organization>Single</Organization>
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<Alignment>0x4</Alignment>
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<Bank name="MirrorOptionBytes">
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<Field>
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<Parameters address="0x1FFF0000" name="MirrorOptionBytes" occurrence="0x1" size="0x2C"/>
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</Field>
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</Bank>
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</Configuration>
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</Peripheral>
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<!-- Option Bytes -->
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<Peripheral>
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<Name>Option Bytes</Name>
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<Type>Configuration</Type>
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<Description/>
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<Access>RW</Access>
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<Bank interface="JTAG_SWD">
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<Parameters address="0x40023C14" name="Bank 1" size="0x8"/>
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<Category>
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<Name>Read Out Protection</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>RDP</Name>
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<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
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<BitOffset>0x8</BitOffset>
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<BitWidth>0x8</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0xAA">Level 0, no protection</Val>
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<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
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<Val value="0xCC">Level 2, chip protection</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>BOR Level</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>BOR_LEV</Name>
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<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
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<BitOffset>0x2</BitOffset>
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<BitWidth>0x2</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">BOR Level 3 (VBOR3), brownout threshold level 3</Val>
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<Val value="0x1">BOR Level 2 (VBOR2), brownout threshold level 2</Val>
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<Val value="0x2">BOR Level 1 (VBOR1), brownout threshold level 1</Val>
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<Val value="0x3">BOR off, POR/PDR reset threshold level is applied</Val>
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</Values>
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</Bit>
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</AssignedBits>
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</Field>
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</Category>
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<Category>
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<Name>User Configuration</Name>
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<Field>
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<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
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<AssignedBits>
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<Bit>
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<Name>IWDG_STOP</Name>
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<Description/>
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<BitOffset>0x1F</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Freeze IWDG counter in stop mode</Val>
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<Val value="0x1">IWDG counter active in stop mode</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>IWDG_STDBY</Name>
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<Description/>
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<BitOffset>0x1E</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Freeze IWDG counter in standby mode</Val>
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<Val value="0x1">IWDG counter active in standby mode</Val>
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</Values>
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</Bit>
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<Bit reference="DualBank">
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<Name>nDBANK</Name>
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<Description/>
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<BitOffset>0x1D</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
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<Values>
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<Val value="0x0">Flash in dual bank with 128 bits read access</Val>
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<Val value="0x1">Flash in single bank with 256 bits read access</Val>
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</Values>
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</Bit>
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<Bit config="1,3">
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<Name>nDBOOT</Name>
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<Description/>
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<BitOffset>0x1C</BitOffset>
|
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<BitWidth>0x1</BitWidth>
|
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<Access>RW</Access>
|
|
<Values>
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<Val value="0x0">Dual Boot enabled</Val>
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<Val value="0x1">Dual Boot disabled</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>WWDG_SW</Name>
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<Description/>
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<BitOffset>0x4</BitOffset>
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<BitWidth>0x1</BitWidth>
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<Access>RW</Access>
|
|
<Values>
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<Val value="0x0">Hardware window watchdog</Val>
|
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<Val value="0x1">Software window watchdog</Val>
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</Values>
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</Bit>
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<Bit>
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<Name>IWDG_SW</Name>
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<Description/>
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<BitOffset>0x5</BitOffset>
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<BitWidth>0x1</BitWidth>
|
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<Access>RW</Access>
|
|
<Values>
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<Val value="0x0">Hardware independent watchdog</Val>
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<Val value="0x1">Software independent watchdog</Val>
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</Values>
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</Bit>
|
|
<Bit>
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<Name>nRST_STOP</Name>
|
|
<Description/>
|
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<BitOffset>0x6</BitOffset>
|
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<BitWidth>0x1</BitWidth>
|
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<Access>RW</Access>
|
|
<Values>
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<Val value="0x0">Reset generated when entering Stop mode</Val>
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<Val value="0x1">No reset generated</Val>
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</Values>
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</Bit>
|
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<Bit>
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<Name>nRST_STDBY</Name>
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<Description/>
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<BitOffset>0x7</BitOffset>
|
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<BitWidth>0x1</BitWidth>
|
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<Access>RW</Access>
|
|
<Values>
|
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<Val value="0x0">Reset generated when entering Standby mode</Val>
|
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<Val value="0x1">No reset generated</Val>
|
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</Values>
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</Bit>
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</AssignedBits>
|
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</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot address Option Bytes</Name>
|
|
<Field>
|
|
<Parameters address="0x40023C18" name="FLASH_OPTCR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOOT_ADD0</Name>
|
|
<Description>Define the boot address when BOOT0=0</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x10</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x0"/>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>BOOT_ADD1</Name>
|
|
<Description>Define the boot address when BOOT0=1</Description>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x10</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x0"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x40023C14" name="FLASH_OPTCR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0,2,5">
|
|
<Name>nWRP0</Name>
|
|
<Description/>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0xC</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on this sector</Val>
|
|
<Val value="0x1">Write protection not active on this sector</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1,3,4">
|
|
<Name>nWRP0</Name>
|
|
<Description/>
|
|
<BitOffset>0x10</BitOffset>
|
|
<BitWidth>0x6</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on bank1 sector 2i and 2i+1</Val>
|
|
<Val value="0x1">Write protection not active on bank1 sector 2i, 2i+1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1,3,4">
|
|
<Name>nWRP6</Name>
|
|
<Description/>
|
|
<BitOffset>0x16</BitOffset>
|
|
<BitWidth>0x6</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on bank2 sector 2i and 2i+1</Val>
|
|
<Val value="0x1">Write protection not active on bank2 sector 2i, 2i+1</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
<Bank interface="Bootloader">
|
|
<Parameters address="0x1FFF0000" name="Bank 1" size="0x2C"/>
|
|
<Category>
|
|
<Name>Read Out Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>RDP</Name>
|
|
<Description>Read protection option byte. The read protection is used to protect the software code stored in Flash memory.</Description>
|
|
<BitOffset>0x8</BitOffset>
|
|
<BitWidth>0x8</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0xAA">Level 0, no protection</Val>
|
|
<Val value="0xBB">or any value other than 0xAA and 0xCC: Level 1, read protection</Val>
|
|
<Val value="0xCC">Level 2, chip protection</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>BOR Level</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOR_LEV</Name>
|
|
<Description>These bits contain the supply level threshold that activates/releases the reset. They can be written to program a new BOR level value into Flash memory</Description>
|
|
<BitOffset>0x2</BitOffset>
|
|
<BitWidth>0x2</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">BOR Level 3 (VBOR3), brownout threshold level 3</Val>
|
|
<Val value="0x1">BOR Level 2 (VBOR2), brownout threshold level 2</Val>
|
|
<Val value="0x2">BOR Level 1 (VBOR1), brownout threshold level 1</Val>
|
|
<Val value="0x3">BOR off, POR/PDR reset threshold level is applied</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>User Configuration</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFF0008" name="FLASH_OPTCR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>IWDG_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0xF</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in stop mode</Val>
|
|
<Val value="0x1">IWDG counter active in stop mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0xE</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Freeze IWDG counter in standby mode</Val>
|
|
<Val value="0x1">IWDG counter active in standby mode</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit reference="DualBank">
|
|
<Name>nDBANK</Name>
|
|
<Description/>
|
|
<BitOffset>0xD</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Flash in dual bank with 128 bits read access</Val>
|
|
<Val value="0x1">Flash in single bank with 256 bits read access</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1,3">
|
|
<Name>nDBOOT</Name>
|
|
<Description/>
|
|
<BitOffset>0xC</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Dual Boot enabled</Val>
|
|
<Val value="0x1">Dual Boot disabled</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x1FFF0000" name="FLASH_OPTCR" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>WWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x4</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware window watchdog</Val>
|
|
<Val value="0x1">Software window watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>IWDG_SW</Name>
|
|
<Description/>
|
|
<BitOffset>0x5</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Hardware independent watchdog</Val>
|
|
<Val value="0x1">Software independent watchdog</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STOP</Name>
|
|
<Description/>
|
|
<BitOffset>0x6</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Stop mode</Val>
|
|
<Val value="0x1">No reset generated</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit>
|
|
<Name>nRST_STDBY</Name>
|
|
<Description/>
|
|
<BitOffset>0x7</BitOffset>
|
|
<BitWidth>0x1</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values>
|
|
<Val value="0x0">Reset generated when entering Standby mode</Val>
|
|
<Val value="0x1">No reset generated</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Boot address Option Bytes</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFF0010" name="FLASH_OPTCR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOOT_ADD0</Name>
|
|
<Description>Define the boot address when BOOT0=0</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x10</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x0"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
<Field>
|
|
<Parameters address="0x1FFF0018" name="FLASH_OPTCR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit>
|
|
<Name>BOOT_ADD1</Name>
|
|
<Description>Define the boot address when BOOT0=1</Description>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x10</BitWidth>
|
|
<Access>RW</Access>
|
|
<Equation multiplier="0x4000" offset="0x0"/>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
<Category>
|
|
<Name>Write Protection</Name>
|
|
<Field>
|
|
<Parameters address="0x1FFF0008" name="FLASH_OPTCR1" size="0x4"/>
|
|
<AssignedBits>
|
|
<Bit config="0">
|
|
<Name>nWRP0</Name>
|
|
<Description/>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0xC</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on this sector</Val>
|
|
<Val value="0x1">Write protection not active on this sector</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1">
|
|
<Name>nWRP0</Name>
|
|
<Description/>
|
|
<BitOffset>0x0</BitOffset>
|
|
<BitWidth>0x6</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on bank1 sector 2i and 2i+1</Val>
|
|
<Val value="0x1">Write protection not active on bank1 sector 2i, 2i+1</Val>
|
|
</Values>
|
|
</Bit>
|
|
<Bit config="1">
|
|
<Name>nWRP6</Name>
|
|
<Description/>
|
|
<BitOffset>0x6</BitOffset>
|
|
<BitWidth>0x6</BitWidth>
|
|
<Access>RW</Access>
|
|
<Values ByBit="true">
|
|
<Val value="0x0">Write protection active on bank2 sector 2i and 2i+1</Val>
|
|
<Val value="0x1">Write protection not active on bank2 sector 2i, 2i+1</Val>
|
|
</Values>
|
|
</Bit>
|
|
</AssignedBits>
|
|
</Field>
|
|
</Category>
|
|
</Bank>
|
|
</Peripheral>
|
|
</Peripherals>
|
|
</Device>
|
|
</Root> |