FOME-Tech
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fome-fw
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Merge remote-tracking branch 'origin/master'

This commit is contained in:
rusefi 2020-06-21 17:06:43 -04:00
parent af82d63112 8ffa7e518f
commit a5cf1319ed
4 changed files with 3 additions and 21 deletions
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4
firmware/hw_layer/ports/kinetis/kinetis_common.cpp
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@ -10,10 +10,6 @@
#include "engine.h" #include "engine.h"
#include "pin_repository.h" #include "pin_repository.h"
extern ioportid_t PORTS[];
ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE};
#if HAL_USE_ADC || defined(__DOXYGEN__) #if HAL_USE_ADC || defined(__DOXYGEN__)
// ADC_CHANNEL_IN0 // PA2 (def=VIGN) // ADC_CHANNEL_IN0 // PA2 (def=VIGN)

9
firmware/hw_layer/ports/kinetis/kinetis_pins.cpp
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@ -20,10 +20,7 @@ static ioportid_t ports[] = {GPIOA,
GPIOB, GPIOB,
GPIOC, GPIOC,
GPIOD, GPIOD,
GPIOE, GPIOE
nullptr,
nullptr,
nullptr,
}; };
#define PIN_REPO_SIZE (sizeof(ports) / sizeof(ports[0])) * PORT_SIZE #define PIN_REPO_SIZE (sizeof(ports) / sizeof(ports[0])) * PORT_SIZE
@ -33,8 +30,6 @@ static const char *PIN_USED[PIN_REPO_SIZE + BOARD_EXT_PINREPOPINS];
#include "pin_repository.h" #include "pin_repository.h"
#include "io_pins.h" #include "io_pins.h"
extern ioportid_t PORTS[];
/** /**
* @deprecated - use hwPortname() instead * @deprecated - use hwPortname() instead
*/ */
@ -88,7 +83,7 @@ ioportid_t getHwPort(const char *msg, brain_pin_e brainPin) {
firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin); firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin);
return GPIO_NULL; return GPIO_NULL;
} }
return PORTS[(brainPin - GPIOA_0) / PORT_SIZE]; return ports[(brainPin - GPIOA_0) / PORT_SIZE];
} }
/** /**

6
firmware/hw_layer/ports/stm32/stm32_common.cpp
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@ -17,12 +17,6 @@
#if EFI_PROD_CODE #if EFI_PROD_CODE
#include "mpu_util.h" #include "mpu_util.h"
#include "backup_ram.h" #include "backup_ram.h"
extern ioportid_t PORTS[];
#if defined(STM32F4XX) || defined(STM32F7XX)
ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH };
#else
ioportid_t PORTS[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOF};
#endif /* defined(STM32F4XX) || defined(STM32F7XX) */
#endif /* EFI_PROD_CODE */ #endif /* EFI_PROD_CODE */
#if HAL_USE_ADC #if HAL_USE_ADC

5
firmware/hw_layer/ports/stm32/stm32_pins.cpp
View File

@ -47,9 +47,6 @@ static ioportid_t ports[] = {GPIOA,
// todo: move this into PinRepository class // todo: move this into PinRepository class
static const char *PIN_USED[PIN_REPO_SIZE + BOARD_EXT_PINREPOPINS]; static const char *PIN_USED[PIN_REPO_SIZE + BOARD_EXT_PINREPOPINS];
extern ioportid_t PORTS[];
/** /**
* @deprecated - use hwPortname() instead * @deprecated - use hwPortname() instead
*/ */
@ -131,7 +128,7 @@ ioportid_t getHwPort(const char *msg, brain_pin_e brainPin) {
firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin); firmwareError(CUSTOM_ERR_INVALID_PIN, "%s: Invalid brain_pin_e: %d", msg, brainPin);
return GPIO_NULL; return GPIO_NULL;
} }
return PORTS[(brainPin - GPIOA_0) / PORT_SIZE]; return ports[(brainPin - GPIOA_0) / PORT_SIZE];
} }
/** /**