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srsLTE
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131 Commits

Author SHA1 Message Date
Francisco Paisana 4217dba7e0 fix msg3 delayed allocation and update test 2020-03-13 08:30:42 +01:00
Andre Puschmann 074ffbbb1d remove braces and reformat code 2020-03-12 21:04:15 +01:00
Andre Puschmann 0e4f97d1a0 fix bug in MAC where new PHY RNTI was always registered for enb_cc_idx==0 2020-03-12 12:22:41 +01:00
Andre Puschmann ab210c5f3c tiny cosmetic changes to the error messages printing 0x and clear cc_idx use 2020-03-12 12:22:41 +01:00
Francisco Paisana d18b476e37 use utility macro for printing function name 2020-03-12 11:11:20 +00:00
yagoda f09c8324eb adding success/error macros in scheduler.cc 2020-03-12 11:11:20 +00:00
yagoda bfa451559b adding error logs to some scheduler function calls to ue_db to add clarity 2020-03-12 11:11:20 +00:00
Francisco Paisana 9b4a0baa87 activate scells in the phy 2020-03-11 21:56:33 +01:00
Francisco Paisana 7548402632 change scell activation interface to use arrays. Added a method to the scheduler to get the current set of activated carriers 2020-03-11 21:56:33 +01:00
Xavier Arteaga 76408b195e Rename TX_DELAY and FDD_HARQ_DELAY_MS 2020-03-11 21:16:36 +01:00
Andre Puschmann a8acd235f6 extend eNB MAC to support multiple CC per UE 
- add tx/rx softbuffers for each CC that a UE might have
- make sure to call assign correct buffers when iterating
  over the CC for UL/DL grant assignment
 2020-03-11 10:16:23 +01:00
Francisco Paisana dc8dca2a08 fix namespace-related compilation error 2020-03-10 22:06:07 +00:00
Francisco Paisana a744729007 use range of rbgs 2020-03-10 22:06:07 +00:00
Francisco Paisana 46579da1ff use signed integer to express the error 2020-03-10 22:06:07 +00:00
Francisco Paisana 9ad80ee29f added initial_dl_cqi to the enb rr.cfg parser 2020-03-10 22:06:07 +00:00
Francisco Paisana bcbb08ebae use initial_dl_cqi for first DL tx. 2020-03-10 22:06:07 +00:00
Francisco Paisana 3b937348a2 refactored some sched util methods 2020-03-10 22:06:07 +00:00
Francisco Paisana fad897cb35 DL scheduler metric now takes into account the min and max of RBGs possible. This is to forbid segmentation of SRB0 allocations 2020-03-10 22:06:07 +00:00
Francisco Paisana 6317750de2 fix computation of ranged of allowed sched dl bytes 2020-03-10 22:06:07 +00:00
Francisco Paisana 414259e83b fix allocation expected alloc bytes (min and max) 2020-03-10 22:06:07 +00:00
Francisco Paisana 639f473042 fixed unsigned signed comparison 2020-03-10 14:17:49 +01:00
Francisco Paisana 1e63fa41cf made ue_cc_idx int to set to -1 for rar and bc allocs 2020-03-10 14:17:49 +01:00
Francisco Paisana f3c3c52fcd added ue_cc_idx to dci allocation 2020-03-10 14:17:49 +01:00
Francisco Paisana e62972d38e fix fdd delays in scheduler 2020-03-10 14:17:49 +01:00
Andre Puschmann 2edecea33e fix SIB transmission for CA 
Avoid double buffering of SIBs in MAC as this would require one buffer for each CC.
Instead, use byte_buffer managed by RRC that contains packed SIBs to avoid
double memcpy for each SIB tx. Only use MAC provided buffer in error case.

Also avoid MAC calling RLC for each SIB and call RRC directly.
 2020-03-09 14:18:09 +01:00
Andre Puschmann 120ad76c63 refactor cell param handling and fix SIB transmissions 
- move cell specific eNB params to cell list in rr.conf
- make sure DL EARFCN and DL freq can be used to manually overwrite a single cell config
- fix SIB packing and transmission for multi cell configs
- introduce cell list to MAC
- adapt default enb.conf.example and rr.conf.example
 2020-03-06 16:20:44 +01:00
Xavier Arteaga da701cd82b SRSENB: Added PUSCH TA and EVM measurement. Some more PHY cleanup. 2020-03-06 13:58:49 +01:00
Pedro Alvarez bd3598f774 Moved srsEPC to the new S1AP library. Deleted liblte_s1ap.cc and liblte_s1ap.h. 2020-03-06 11:57:07 +00:00
Francisco Paisana ec1f1cc677 remove const_casts from scheduler. Fix ODR issue 2020-03-05 20:23:07 +00:00
Francisco Paisana e9a599857a created a header for all common structs and helper functions 2020-03-05 20:23:07 +00:00
Francisco Paisana 02ccb8b32b fix wrong calculation of sched tx and rx delays 2020-03-05 20:23:07 +00:00
Andre Puschmann 73c8b02820 enb: loop over CC in MAC 2020-03-05 20:46:14 +01:00
Andre Puschmann 664170fec6 pcap: add CC index when writing PCAP 2020-03-05 20:46:14 +01:00
Francisco Paisana 43e67b8536 created a harq entity that handles all harq procs. This entity accepts as arg the number of harq procs. 2020-03-05 17:51:33 +00:00
Francisco Paisana 1c041b2c1d created harq entity class 2020-03-05 17:51:33 +00:00
Francisco Paisana 9f266161cf increase tbs until allocation is big enough to fit MAC subheader and RLC header 2020-03-05 12:47:43 +00:00
Francisco Paisana 7e840bde86 fix tb idx assignment in scheduler mac sdu alloc 2020-03-05 12:18:05 +00:00
Francisco Paisana d1356568e0 separated sf sched result from sf_sched class. The interface became way simpler. No need for finish_tti() method, sf_sched::new_tti() is called automatically when we access the sf_sched. 2020-03-05 00:04:21 +00:00
Francisco Paisana bb38fa7119 fixed tti resetting after tti end 2020-03-05 00:04:21 +00:00
Francisco Paisana 47b05118ad simplified msg3 allocation. Now we can allocate resources ahead of time (e.g. msg3 is 2 ttis ahead) using the sf_sched interface. It's guaranteed that the given allocations wont be erased when the respective tti starts 2020-03-05 00:04:21 +00:00
Francisco Paisana 8f7890c60a store mask results in separate variables for testing, and reset sf_sched state at the end of the tti 2020-03-05 00:04:21 +00:00
Francisco Paisana 5bdc603113 added error macros 2020-03-03 21:26:17 +00:00
Francisco Paisana b37d9b9930 fixed msg4 setting in sched tester 2020-03-03 21:26:17 +00:00
Francisco Paisana 3cc94c3694 simplified mutexing of the scheduler. One single mutex for everything, and removed rwlock 2020-03-03 21:26:17 +00:00
Francisco Paisana fed06138b9 moved rach_detected to stack thread. Created a more friendly interface to enqueue tasks in stack 2020-03-03 21:03:21 +00:00
Francisco Paisana ad9e126299 test for different enb_cc_idxs as pcell. Bug fixes 2020-03-02 16:33:31 +00:00
Francisco Paisana 0f3ef11f8b now the scheduler only activates a scell after receiving a valid CQI for the SCell 2020-03-02 16:33:31 +00:00
Francisco Paisana 518f813f13 now the CA testing generation and simulation happen simultaneously. This way we can do more tti/event specific checks 2020-03-02 16:33:31 +00:00
Francisco Paisana b319f8dfcd created first version of CA test. Now we need to create actual asserts 2020-03-02 16:33:31 +00:00
Xavier Arteaga b45223c880 Fix minor MAC Clang warnings 2020-03-02 12:19:09 +01:00